2 * IDT Interprise 79RC32434 watchdog driver
4 * Copyright (C) 2006, Ondrej Zajicek <santiago@crfreenet.org>
5 * Copyright (C) 2008, Florian Fainelli <florian@openwrt.org>
8 * SoftDog 0.05: A Software Watchdog Device
10 * (c) Copyright 1996 Alan Cox <alan@lxorguk.ukuu.org.uk>,
11 * All Rights Reserved.
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; either version
16 * 2 of the License, or (at your option) any later version.
20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22 #include <linux/module.h> /* For module specific items */
23 #include <linux/moduleparam.h> /* For new moduleparam's */
24 #include <linux/types.h> /* For standard types (like size_t) */
25 #include <linux/errno.h> /* For the -ENODEV/... values */
26 #include <linux/kernel.h> /* For printk/panic/... */
27 #include <linux/fs.h> /* For file operations */
28 #include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV
30 #include <linux/watchdog.h> /* For the watchdog specific items */
31 #include <linux/init.h> /* For __init/__exit/... */
32 #include <linux/platform_device.h> /* For platform_driver framework */
33 #include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
34 #include <linux/uaccess.h> /* For copy_to_user/put_user/... */
35 #include <linux/io.h> /* For devm_ioremap_nocache */
37 #include <asm/mach-rc32434/integ.h> /* For the Watchdog registers */
46 static struct integ __iomem
*wdt_reg
;
48 static int expect_close
;
50 /* Board internal clock speed in Hz,
51 * the watchdog timer ticks at. */
52 extern unsigned int idt_cpu_freq
;
54 /* translate wtcompare value to seconds and vice versa */
55 #define WTCOMP2SEC(x) (x / idt_cpu_freq)
56 #define SEC2WTCOMP(x) (x * idt_cpu_freq)
58 /* Use a default timeout of 20s. This should be
59 * safe for CPU clock speeds up to 400MHz, as
60 * ((2 ^ 32) - 1) / (400MHz / 2) = 21s. */
61 #define WATCHDOG_TIMEOUT 20
63 static int timeout
= WATCHDOG_TIMEOUT
;
64 module_param(timeout
, int, 0);
65 MODULE_PARM_DESC(timeout
, "Watchdog timeout value, in seconds (default="
66 __MODULE_STRING(WATCHDOG_TIMEOUT
) ")");
68 static bool nowayout
= WATCHDOG_NOWAYOUT
;
69 module_param(nowayout
, bool, 0);
70 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default="
71 __MODULE_STRING(WATCHDOG_NOWAYOUT
) ")");
73 /* apply or and nand masks to data read from addr and write back */
74 #define SET_BITS(addr, or, nand) \
75 writel((readl(&addr) | or) & ~nand, &addr)
77 static int rc32434_wdt_set(int new_timeout
)
79 int max_to
= WTCOMP2SEC((u32
)-1);
81 if (new_timeout
< 0 || new_timeout
> max_to
) {
82 pr_err("timeout value must be between 0 and %d\n", max_to
);
85 timeout
= new_timeout
;
86 spin_lock(&rc32434_wdt_device
.io_lock
);
87 writel(SEC2WTCOMP(timeout
), &wdt_reg
->wtcompare
);
88 spin_unlock(&rc32434_wdt_device
.io_lock
);
93 static void rc32434_wdt_start(void)
97 spin_lock(&rc32434_wdt_device
.io_lock
);
99 /* zero the counter before enabling */
100 writel(0, &wdt_reg
->wtcount
);
102 /* don't generate a non-maskable interrupt,
103 * do a warm reset instead */
104 nand
= 1 << RC32434_ERR_WNE
;
105 or = 1 << RC32434_ERR_WRE
;
107 /* reset the ERRCS timeout bit in case it's set */
108 nand
|= 1 << RC32434_ERR_WTO
;
110 SET_BITS(wdt_reg
->errcs
, or, nand
);
112 /* set the timeout (either default or based on module param) */
113 rc32434_wdt_set(timeout
);
115 /* reset WTC timeout bit and enable WDT */
116 nand
= 1 << RC32434_WTC_TO
;
117 or = 1 << RC32434_WTC_EN
;
119 SET_BITS(wdt_reg
->wtc
, or, nand
);
121 spin_unlock(&rc32434_wdt_device
.io_lock
);
122 pr_info("Started watchdog timer\n");
125 static void rc32434_wdt_stop(void)
127 spin_lock(&rc32434_wdt_device
.io_lock
);
130 SET_BITS(wdt_reg
->wtc
, 0, 1 << RC32434_WTC_EN
);
132 spin_unlock(&rc32434_wdt_device
.io_lock
);
133 pr_info("Stopped watchdog timer\n");
136 static void rc32434_wdt_ping(void)
138 spin_lock(&rc32434_wdt_device
.io_lock
);
139 writel(0, &wdt_reg
->wtcount
);
140 spin_unlock(&rc32434_wdt_device
.io_lock
);
143 static int rc32434_wdt_open(struct inode
*inode
, struct file
*file
)
145 if (test_and_set_bit(0, &rc32434_wdt_device
.inuse
))
149 __module_get(THIS_MODULE
);
154 return nonseekable_open(inode
, file
);
157 static int rc32434_wdt_release(struct inode
*inode
, struct file
*file
)
159 if (expect_close
== 42) {
161 module_put(THIS_MODULE
);
163 pr_crit("device closed unexpectedly. WDT will not stop!\n");
166 clear_bit(0, &rc32434_wdt_device
.inuse
);
170 static ssize_t
rc32434_wdt_write(struct file
*file
, const char *data
,
171 size_t len
, loff_t
*ppos
)
177 /* In case it was set long ago */
180 for (i
= 0; i
!= len
; i
++) {
182 if (get_user(c
, data
+ i
))
194 static long rc32434_wdt_ioctl(struct file
*file
, unsigned int cmd
,
197 void __user
*argp
= (void __user
*)arg
;
200 static const struct watchdog_info ident
= {
201 .options
= WDIOF_SETTIMEOUT
|
202 WDIOF_KEEPALIVEPING
|
204 .identity
= "RC32434_WDT Watchdog",
207 case WDIOC_GETSUPPORT
:
208 if (copy_to_user(argp
, &ident
, sizeof(ident
)))
211 case WDIOC_GETSTATUS
:
212 case WDIOC_GETBOOTSTATUS
:
214 if (copy_to_user(argp
, &value
, sizeof(int)))
217 case WDIOC_SETOPTIONS
:
218 if (copy_from_user(&value
, argp
, sizeof(int)))
221 case WDIOS_ENABLECARD
:
224 case WDIOS_DISABLECARD
:
231 case WDIOC_KEEPALIVE
:
234 case WDIOC_SETTIMEOUT
:
235 if (copy_from_user(&new_timeout
, argp
, sizeof(int)))
237 if (rc32434_wdt_set(new_timeout
))
240 case WDIOC_GETTIMEOUT
:
241 return copy_to_user(argp
, &timeout
, sizeof(int));
249 static const struct file_operations rc32434_wdt_fops
= {
250 .owner
= THIS_MODULE
,
252 .write
= rc32434_wdt_write
,
253 .unlocked_ioctl
= rc32434_wdt_ioctl
,
254 .open
= rc32434_wdt_open
,
255 .release
= rc32434_wdt_release
,
258 static struct miscdevice rc32434_wdt_miscdev
= {
259 .minor
= WATCHDOG_MINOR
,
261 .fops
= &rc32434_wdt_fops
,
264 static int rc32434_wdt_probe(struct platform_device
*pdev
)
269 r
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "rb532_wdt_res");
271 pr_err("failed to retrieve resources\n");
275 wdt_reg
= devm_ioremap_nocache(&pdev
->dev
, r
->start
, resource_size(r
));
277 pr_err("failed to remap I/O resources\n");
281 spin_lock_init(&rc32434_wdt_device
.io_lock
);
283 /* Make sure the watchdog is not running */
286 /* Check that the heartbeat value is within it's range;
287 * if not reset to the default */
288 if (rc32434_wdt_set(timeout
)) {
289 rc32434_wdt_set(WATCHDOG_TIMEOUT
);
290 pr_info("timeout value must be between 0 and %d\n",
291 WTCOMP2SEC((u32
)-1));
294 ret
= misc_register(&rc32434_wdt_miscdev
);
296 pr_err("failed to register watchdog device\n");
300 pr_info("Watchdog Timer version " VERSION
", timer margin: %d sec\n",
306 static int rc32434_wdt_remove(struct platform_device
*pdev
)
308 misc_deregister(&rc32434_wdt_miscdev
);
312 static void rc32434_wdt_shutdown(struct platform_device
*pdev
)
317 static struct platform_driver rc32434_wdt_driver
= {
318 .probe
= rc32434_wdt_probe
,
319 .remove
= rc32434_wdt_remove
,
320 .shutdown
= rc32434_wdt_shutdown
,
322 .name
= "rc32434_wdt",
326 module_platform_driver(rc32434_wdt_driver
);
328 MODULE_AUTHOR("Ondrej Zajicek <santiago@crfreenet.org>,"
329 "Florian Fainelli <florian@openwrt.org>");
330 MODULE_DESCRIPTION("Driver for the IDT RC32434 SoC watchdog");
331 MODULE_LICENSE("GPL");
332 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);