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Linux 3.12.39
[linux/fpc-iii.git] / sound / pci / hda / patch_sigmatel.c
blob984b75ef11900dcb6a892980092e40506ba6ba0a
1 /*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7 * Matt Porter <mporter@embeddedalley.com>
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/jack.h>
35 #include <sound/tlv.h>
36 #include "hda_codec.h"
37 #include "hda_local.h"
38 #include "hda_auto_parser.h"
39 #include "hda_beep.h"
40 #include "hda_jack.h"
41 #include "hda_generic.h"
42
43 enum {
44 STAC_VREF_EVENT = 8,
45 STAC_PWR_EVENT,
46 };
47
48 enum {
49 STAC_REF,
50 STAC_9200_OQO,
51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
61 STAC_9200_M4,
62 STAC_9200_M4_2,
63 STAC_9200_PANASONIC,
64 STAC_9200_EAPD_INIT,
65 STAC_9200_MODELS
66 };
67
68 enum {
69 STAC_9205_REF,
70 STAC_9205_DELL_M42,
71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
73 STAC_9205_EAPD,
74 STAC_9205_MODELS
75 };
76
77 enum {
78 STAC_92HD73XX_NO_JD, /* no jack-detection */
79 STAC_92HD73XX_REF,
80 STAC_92HD73XX_INTEL,
81 STAC_DELL_M6_AMIC,
82 STAC_DELL_M6_DMIC,
83 STAC_DELL_M6_BOTH,
84 STAC_DELL_EQ,
85 STAC_ALIENWARE_M17X,
86 STAC_92HD89XX_HP_FRONT_JACK,
87 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
88 STAC_92HD73XX_ASUS_MOBO,
89 STAC_92HD73XX_MODELS
90 };
91
92 enum {
93 STAC_92HD83XXX_REF,
94 STAC_92HD83XXX_PWR_REF,
95 STAC_DELL_S14,
96 STAC_DELL_VOSTRO_3500,
97 STAC_92HD83XXX_HP_cNB11_INTQUAD,
98 STAC_HP_DV7_4000,
99 STAC_HP_ZEPHYR,
100 STAC_92HD83XXX_HP_LED,
101 STAC_92HD83XXX_HP_INV_LED,
102 STAC_92HD83XXX_HP_MIC_LED,
103 STAC_HP_LED_GPIO10,
104 STAC_92HD83XXX_HEADSET_JACK,
105 STAC_92HD83XXX_HP,
106 STAC_HP_ENVY_BASS,
107 STAC_HP_BNB13_EQ,
108 STAC_92HD83XXX_MODELS
109 };
110
111 enum {
112 STAC_92HD71BXX_REF,
113 STAC_DELL_M4_1,
114 STAC_DELL_M4_2,
115 STAC_DELL_M4_3,
116 STAC_HP_M4,
117 STAC_HP_DV4,
118 STAC_HP_DV5,
119 STAC_HP_HDX,
120 STAC_92HD71BXX_HP,
121 STAC_92HD71BXX_NO_DMIC,
122 STAC_92HD71BXX_NO_SMUX,
123 STAC_92HD71BXX_MODELS
124 };
125
126 enum {
127 STAC_925x_REF,
128 STAC_M1,
129 STAC_M1_2,
130 STAC_M2,
131 STAC_M2_2,
132 STAC_M3,
133 STAC_M5,
134 STAC_M6,
135 STAC_925x_MODELS
136 };
137
138 enum {
139 STAC_D945_REF,
140 STAC_D945GTP3,
141 STAC_D945GTP5,
142 STAC_INTEL_MAC_V1,
143 STAC_INTEL_MAC_V2,
144 STAC_INTEL_MAC_V3,
145 STAC_INTEL_MAC_V4,
146 STAC_INTEL_MAC_V5,
147 STAC_INTEL_MAC_AUTO,
148 STAC_ECS_202,
149 STAC_922X_DELL_D81,
150 STAC_922X_DELL_D82,
151 STAC_922X_DELL_M81,
152 STAC_922X_DELL_M82,
153 STAC_922X_INTEL_MAC_GPIO,
154 STAC_922X_MODELS
155 };
156
157 enum {
158 STAC_D965_REF_NO_JD, /* no jack-detection */
159 STAC_D965_REF,
160 STAC_D965_3ST,
161 STAC_D965_5ST,
162 STAC_D965_5ST_NO_FP,
163 STAC_D965_VERBS,
164 STAC_DELL_3ST,
165 STAC_DELL_BIOS,
166 STAC_DELL_BIOS_AMIC,
167 STAC_DELL_BIOS_SPDIF,
168 STAC_927X_DELL_DMIC,
169 STAC_927X_VOLKNOB,
170 STAC_927X_MODELS
171 };
172
173 enum {
174 STAC_9872_VAIO,
175 STAC_9872_MODELS
176 };
177
178 struct sigmatel_spec {
179 struct hda_gen_spec gen;
180
181 unsigned int eapd_switch: 1;
182 unsigned int linear_tone_beep:1;
183 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
184 unsigned int volknob_init:1; /* special volume-knob initialization */
185 unsigned int powerdown_adcs:1;
186 unsigned int have_spdif_mux:1;
187
188 /* gpio lines */
189 unsigned int eapd_mask;
190 unsigned int gpio_mask;
191 unsigned int gpio_dir;
192 unsigned int gpio_data;
193 unsigned int gpio_mute;
194 unsigned int gpio_led;
195 unsigned int gpio_led_polarity;
196 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
197 unsigned int vref_led;
198 int default_polarity;
199
200 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
201 unsigned int mic_enabled; /* current mic mute state (bitmask) */
202
203 /* stream */
204 unsigned int stream_delay;
205
206 /* analog loopback */
207 const struct snd_kcontrol_new *aloopback_ctl;
208 unsigned int aloopback;
209 unsigned char aloopback_mask;
210 unsigned char aloopback_shift;
211
212 /* power management */
213 unsigned int power_map_bits;
214 unsigned int num_pwrs;
215 const hda_nid_t *pwr_nids;
216 unsigned int active_adcs;
217
218 /* beep widgets */
219 hda_nid_t anabeep_nid;
220
221 /* SPDIF-out mux */
222 const char * const *spdif_labels;
223 struct hda_input_mux spdif_mux;
224 unsigned int cur_smux[2];
225 };
226
227 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
228 #define AC_VERB_IDT_GET_POWER_MAP 0xfec
229
230 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
231 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
232 0x0f, 0x10, 0x11
233 };
234
235 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
236 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
237 0x0f, 0x10
238 };
239
240 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
241 0x0a, 0x0d, 0x0f
242 };
243
244
245 /*
246 * PCM hooks
247 */
248 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
249 struct hda_codec *codec,
250 struct snd_pcm_substream *substream,
251 int action)
252 {
253 struct sigmatel_spec *spec = codec->spec;
254 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
255 msleep(spec->stream_delay);
256 }
257
258 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
259 struct hda_codec *codec,
260 struct snd_pcm_substream *substream,
261 int action)
262 {
263 struct sigmatel_spec *spec = codec->spec;
264 int i, idx = 0;
265
266 if (!spec->powerdown_adcs)
267 return;
268
269 for (i = 0; i < spec->gen.num_all_adcs; i++) {
270 if (spec->gen.all_adcs[i] == hinfo->nid) {
271 idx = i;
272 break;
273 }
274 }
275
276 switch (action) {
277 case HDA_GEN_PCM_ACT_OPEN:
278 msleep(40);
279 snd_hda_codec_write(codec, hinfo->nid, 0,
280 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
281 spec->active_adcs |= (1 << idx);
282 break;
283 case HDA_GEN_PCM_ACT_CLOSE:
284 snd_hda_codec_write(codec, hinfo->nid, 0,
285 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
286 spec->active_adcs &= ~(1 << idx);
287 break;
288 }
289 }
290
291 /*
292 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
293 * funky external mute control using GPIO pins.
294 */
295
296 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
297 unsigned int dir_mask, unsigned int data)
298 {
299 unsigned int gpiostate, gpiomask, gpiodir;
300
301 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
302
303 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
304 AC_VERB_GET_GPIO_DATA, 0);
305 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
306
307 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
308 AC_VERB_GET_GPIO_MASK, 0);
309 gpiomask |= mask;
310
311 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
312 AC_VERB_GET_GPIO_DIRECTION, 0);
313 gpiodir |= dir_mask;
314
315 /* Configure GPIOx as CMOS */
316 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
317
318 snd_hda_codec_write(codec, codec->afg, 0,
319 AC_VERB_SET_GPIO_MASK, gpiomask);
320 snd_hda_codec_read(codec, codec->afg, 0,
321 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
322
323 msleep(1);
324
325 snd_hda_codec_read(codec, codec->afg, 0,
326 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
327 }
328
329 /* hook for controlling mic-mute LED GPIO */
330 static void stac_capture_led_hook(struct hda_codec *codec,
331 struct snd_kcontrol *kcontrol,
332 struct snd_ctl_elem_value *ucontrol)
333 {
334 struct sigmatel_spec *spec = codec->spec;
335 unsigned int mask;
336 bool cur_mute, prev_mute;
337
338 if (!kcontrol || !ucontrol)
339 return;
340
341 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
342 prev_mute = !spec->mic_enabled;
343 if (ucontrol->value.integer.value[0] ||
344 ucontrol->value.integer.value[1])
345 spec->mic_enabled |= mask;
346 else
347 spec->mic_enabled &= ~mask;
348 cur_mute = !spec->mic_enabled;
349 if (cur_mute != prev_mute) {
350 if (cur_mute)
351 spec->gpio_data |= spec->mic_mute_led_gpio;
352 else
353 spec->gpio_data &= ~spec->mic_mute_led_gpio;
354 stac_gpio_set(codec, spec->gpio_mask,
355 spec->gpio_dir, spec->gpio_data);
356 }
357 }
358
359 static int stac_vrefout_set(struct hda_codec *codec,
360 hda_nid_t nid, unsigned int new_vref)
361 {
362 int error, pinctl;
363
364 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
365 pinctl = snd_hda_codec_read(codec, nid, 0,
366 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
367
368 if (pinctl < 0)
369 return pinctl;
370
371 pinctl &= 0xff;
372 pinctl &= ~AC_PINCTL_VREFEN;
373 pinctl |= (new_vref & AC_PINCTL_VREFEN);
374
375 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
376 if (error < 0)
377 return error;
378
379 return 1;
380 }
381
382 /* update mute-LED accoring to the master switch */
383 static void stac_update_led_status(struct hda_codec *codec, int enabled)
384 {
385 struct sigmatel_spec *spec = codec->spec;
386 int muted = !enabled;
387
388 if (!spec->gpio_led)
389 return;
390
391 /* LED state is inverted on these systems */
392 if (spec->gpio_led_polarity)
393 muted = !muted;
394
395 if (!spec->vref_mute_led_nid) {
396 if (muted)
397 spec->gpio_data |= spec->gpio_led;
398 else
399 spec->gpio_data &= ~spec->gpio_led;
400 stac_gpio_set(codec, spec->gpio_mask,
401 spec->gpio_dir, spec->gpio_data);
402 } else {
403 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
404 stac_vrefout_set(codec, spec->vref_mute_led_nid,
405 spec->vref_led);
406 }
407 }
408
409 /* vmaster hook to update mute LED */
410 static void stac_vmaster_hook(void *private_data, int val)
411 {
412 stac_update_led_status(private_data, val);
413 }
414
415 /* automute hook to handle GPIO mute and EAPD updates */
416 static void stac_update_outputs(struct hda_codec *codec)
417 {
418 struct sigmatel_spec *spec = codec->spec;
419
420 if (spec->gpio_mute)
421 spec->gen.master_mute =
422 !(snd_hda_codec_read(codec, codec->afg, 0,
423 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
424
425 snd_hda_gen_update_outputs(codec);
426
427 if (spec->eapd_mask && spec->eapd_switch) {
428 unsigned int val = spec->gpio_data;
429 if (spec->gen.speaker_muted)
430 val &= ~spec->eapd_mask;
431 else
432 val |= spec->eapd_mask;
433 if (spec->gpio_data != val) {
434 spec->gpio_data = val;
435 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
436 val);
437 }
438 }
439 }
440
441 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
442 bool enable, bool do_write)
443 {
444 struct sigmatel_spec *spec = codec->spec;
445 unsigned int idx, val;
446
447 for (idx = 0; idx < spec->num_pwrs; idx++) {
448 if (spec->pwr_nids[idx] == nid)
449 break;
450 }
451 if (idx >= spec->num_pwrs)
452 return;
453
454 idx = 1 << idx;
455
456 val = spec->power_map_bits;
457 if (enable)
458 val &= ~idx;
459 else
460 val |= idx;
461
462 /* power down unused output ports */
463 if (val != spec->power_map_bits) {
464 spec->power_map_bits = val;
465 if (do_write)
466 snd_hda_codec_write(codec, codec->afg, 0,
467 AC_VERB_IDT_SET_POWER_MAP, val);
468 }
469 }
470
471 /* update power bit per jack plug/unplug */
472 static void jack_update_power(struct hda_codec *codec,
473 struct hda_jack_tbl *jack)
474 {
475 struct sigmatel_spec *spec = codec->spec;
476 int i;
477
478 if (!spec->num_pwrs)
479 return;
480
481 if (jack && jack->nid) {
482 stac_toggle_power_map(codec, jack->nid,
483 snd_hda_jack_detect(codec, jack->nid),
484 true);
485 return;
486 }
487
488 /* update all jacks */
489 for (i = 0; i < spec->num_pwrs; i++) {
490 hda_nid_t nid = spec->pwr_nids[i];
491 jack = snd_hda_jack_tbl_get(codec, nid);
492 if (!jack || !jack->action)
493 continue;
494 if (jack->action == STAC_PWR_EVENT ||
495 jack->action <= HDA_GEN_LAST_EVENT)
496 stac_toggle_power_map(codec, nid,
497 snd_hda_jack_detect(codec, nid),
498 false);
499 }
500
501 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
502 spec->power_map_bits);
503 }
504
505 static void stac_hp_automute(struct hda_codec *codec,
506 struct hda_jack_tbl *jack)
507 {
508 snd_hda_gen_hp_automute(codec, jack);
509 jack_update_power(codec, jack);
510 }
511
512 static void stac_line_automute(struct hda_codec *codec,
513 struct hda_jack_tbl *jack)
514 {
515 snd_hda_gen_line_automute(codec, jack);
516 jack_update_power(codec, jack);
517 }
518
519 static void stac_mic_autoswitch(struct hda_codec *codec,
520 struct hda_jack_tbl *jack)
521 {
522 snd_hda_gen_mic_autoswitch(codec, jack);
523 jack_update_power(codec, jack);
524 }
525
526 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
527 {
528 unsigned int data;
529
530 data = snd_hda_codec_read(codec, codec->afg, 0,
531 AC_VERB_GET_GPIO_DATA, 0);
532 /* toggle VREF state based on GPIOx status */
533 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
534 !!(data & (1 << event->private_data)));
535 }
536
537 /* initialize the power map and enable the power event to jacks that
538 * haven't been assigned to automute
539 */
540 static void stac_init_power_map(struct hda_codec *codec)
541 {
542 struct sigmatel_spec *spec = codec->spec;
543 int i;
544
545 for (i = 0; i < spec->num_pwrs; i++) {
546 hda_nid_t nid = spec->pwr_nids[i];
547 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
548 def_conf = get_defcfg_connect(def_conf);
549 if (snd_hda_jack_tbl_get(codec, nid))
550 continue;
551 if (def_conf == AC_JACK_PORT_COMPLEX &&
552 spec->vref_mute_led_nid != nid &&
553 is_jack_detectable(codec, nid)) {
554 snd_hda_jack_detect_enable_callback(codec, nid,
555 STAC_PWR_EVENT,
556 jack_update_power);
557 } else {
558 if (def_conf == AC_JACK_PORT_NONE)
559 stac_toggle_power_map(codec, nid, false, false);
560 else
561 stac_toggle_power_map(codec, nid, true, false);
562 }
563 }
564 }
565
566 /*
567 */
568
569 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
570 int *valp)
571 {
572 return !snd_hda_get_int_hint(codec, key, valp);
573 }
574
575 /* override some hints from the hwdep entry */
576 static void stac_store_hints(struct hda_codec *codec)
577 {
578 struct sigmatel_spec *spec = codec->spec;
579 int val;
580
581 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
582 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
583 spec->gpio_mask;
584 }
585 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
586 spec->gpio_dir &= spec->gpio_mask;
587 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
588 spec->gpio_data &= spec->gpio_mask;
589 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
590 spec->eapd_mask &= spec->gpio_mask;
591 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
592 spec->gpio_mute &= spec->gpio_mask;
593 val = snd_hda_get_bool_hint(codec, "eapd_switch");
594 if (val >= 0)
595 spec->eapd_switch = val;
596 }
597
598 /*
599 * loopback controls
600 */
601
602 #define stac_aloopback_info snd_ctl_boolean_mono_info
603
604 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
605 struct snd_ctl_elem_value *ucontrol)
606 {
607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
608 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
609 struct sigmatel_spec *spec = codec->spec;
610
611 ucontrol->value.integer.value[0] = !!(spec->aloopback &
612 (spec->aloopback_mask << idx));
613 return 0;
614 }
615
616 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
617 struct snd_ctl_elem_value *ucontrol)
618 {
619 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
620 struct sigmatel_spec *spec = codec->spec;
621 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
622 unsigned int dac_mode;
623 unsigned int val, idx_val;
624
625 idx_val = spec->aloopback_mask << idx;
626 if (ucontrol->value.integer.value[0])
627 val = spec->aloopback | idx_val;
628 else
629 val = spec->aloopback & ~idx_val;
630 if (spec->aloopback == val)
631 return 0;
632
633 spec->aloopback = val;
634
635 /* Only return the bits defined by the shift value of the
636 * first two bytes of the mask
637 */
638 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
639 kcontrol->private_value & 0xFFFF, 0x0);
640 dac_mode >>= spec->aloopback_shift;
641
642 if (spec->aloopback & idx_val) {
643 snd_hda_power_up(codec);
644 dac_mode |= idx_val;
645 } else {
646 snd_hda_power_down(codec);
647 dac_mode &= ~idx_val;
648 }
649
650 snd_hda_codec_write_cache(codec, codec->afg, 0,
651 kcontrol->private_value >> 16, dac_mode);
652
653 return 1;
654 }
655
656 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
657 { \
658 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
659 .name = "Analog Loopback", \
660 .count = cnt, \
661 .info = stac_aloopback_info, \
662 .get = stac_aloopback_get, \
663 .put = stac_aloopback_put, \
664 .private_value = verb_read | (verb_write << 16), \
665 }
666
667 /*
668 * Mute LED handling on HP laptops
669 */
670
671 /* check whether it's a HP laptop with a docking port */
672 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
673 {
674 if (codec->vendor_id != 0x111d7605 &&
675 codec->vendor_id != 0x111d76d1)
676 return false;
677
678 switch (codec->subsystem_id) {
679 case 0x103c1618:
680 case 0x103c1619:
681 case 0x103c161a:
682 case 0x103c161b:
683 case 0x103c161c:
684 case 0x103c161d:
685 case 0x103c161e:
686 case 0x103c161f:
687
688 case 0x103c162a:
689 case 0x103c162b:
690
691 case 0x103c1630:
692 case 0x103c1631:
693
694 case 0x103c1633:
695 case 0x103c1634:
696 case 0x103c1635:
697
698 case 0x103c3587:
699 case 0x103c3588:
700 case 0x103c3589:
701 case 0x103c358a:
702
703 case 0x103c3667:
704 case 0x103c3668:
705 case 0x103c3669:
706
707 return true;
708 }
709 return false;
710 }
711
712 static bool hp_blike_system(u32 subsystem_id)
713 {
714 switch (subsystem_id) {
715 case 0x103c1520:
716 case 0x103c1521:
717 case 0x103c1523:
718 case 0x103c1524:
719 case 0x103c1525:
720 case 0x103c1722:
721 case 0x103c1723:
722 case 0x103c1724:
723 case 0x103c1725:
724 case 0x103c1726:
725 case 0x103c1727:
726 case 0x103c1728:
727 case 0x103c1729:
728 case 0x103c172a:
729 case 0x103c172b:
730 case 0x103c307e:
731 case 0x103c307f:
732 case 0x103c3080:
733 case 0x103c3081:
734 case 0x103c7007:
735 case 0x103c7008:
736 return true;
737 }
738 return false;
739 }
740
741 static void set_hp_led_gpio(struct hda_codec *codec)
742 {
743 struct sigmatel_spec *spec = codec->spec;
744 unsigned int gpio;
745
746 if (spec->gpio_led)
747 return;
748
749 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
750 gpio &= AC_GPIO_IO_COUNT;
751 if (gpio > 3)
752 spec->gpio_led = 0x08; /* GPIO 3 */
753 else
754 spec->gpio_led = 0x01; /* GPIO 0 */
755 }
756
757 /*
758 * This method searches for the mute LED GPIO configuration
759 * provided as OEM string in SMBIOS. The format of that string
760 * is HP_Mute_LED_P_G or HP_Mute_LED_P
761 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
762 * that corresponds to the NOT muted state of the master volume
763 * and G is the index of the GPIO to use as the mute LED control (0..9)
764 * If _G portion is missing it is assigned based on the codec ID
765 *
766 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
767 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
768 *
769 *
770 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
771 * SMBIOS - at least the ones I have seen do not have them - which include
772 * my own system (HP Pavilion dv6-1110ax) and my cousin's
773 * HP Pavilion dv9500t CTO.
774 * Need more information on whether it is true across the entire series.
775 * -- kunal
776 */
777 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
778 {
779 struct sigmatel_spec *spec = codec->spec;
780 const struct dmi_device *dev = NULL;
781
782 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
783 get_int_hint(codec, "gpio_led_polarity",
784 &spec->gpio_led_polarity);
785 return 1;
786 }
787
788 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
789 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
790 &spec->gpio_led_polarity,
791 &spec->gpio_led) == 2) {
792 unsigned int max_gpio;
793 max_gpio = snd_hda_param_read(codec, codec->afg,
794 AC_PAR_GPIO_CAP);
795 max_gpio &= AC_GPIO_IO_COUNT;
796 if (spec->gpio_led < max_gpio)
797 spec->gpio_led = 1 << spec->gpio_led;
798 else
799 spec->vref_mute_led_nid = spec->gpio_led;
800 return 1;
801 }
802 if (sscanf(dev->name, "HP_Mute_LED_%d",
803 &spec->gpio_led_polarity) == 1) {
804 set_hp_led_gpio(codec);
805 return 1;
806 }
807 /* BIOS bug: unfilled OEM string */
808 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
809 set_hp_led_gpio(codec);
810 if (default_polarity >= 0)
811 spec->gpio_led_polarity = default_polarity;
812 else
813 spec->gpio_led_polarity = 1;
814 return 1;
815 }
816 }
817
818 /*
819 * Fallback case - if we don't find the DMI strings,
820 * we statically set the GPIO - if not a B-series system
821 * and default polarity is provided
822 */
823 if (!hp_blike_system(codec->subsystem_id) &&
824 (default_polarity == 0 || default_polarity == 1)) {
825 set_hp_led_gpio(codec);
826 spec->gpio_led_polarity = default_polarity;
827 return 1;
828 }
829 return 0;
830 }
831
832 /* check whether a built-in speaker is included in parsed pins */
833 static bool has_builtin_speaker(struct hda_codec *codec)
834 {
835 struct sigmatel_spec *spec = codec->spec;
836 hda_nid_t *nid_pin;
837 int nids, i;
838
839 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
840 nid_pin = spec->gen.autocfg.line_out_pins;
841 nids = spec->gen.autocfg.line_outs;
842 } else {
843 nid_pin = spec->gen.autocfg.speaker_pins;
844 nids = spec->gen.autocfg.speaker_outs;
845 }
846
847 for (i = 0; i < nids; i++) {
848 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
849 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
850 return true;
851 }
852 return false;
853 }
854
855 /*
856 * PC beep controls
857 */
858
859 /* create PC beep volume controls */
860 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
861 hda_nid_t nid)
862 {
863 struct sigmatel_spec *spec = codec->spec;
864 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
865 struct snd_kcontrol_new *knew;
866 static struct snd_kcontrol_new abeep_mute_ctl =
867 HDA_CODEC_MUTE(NULL, 0, 0, 0);
868 static struct snd_kcontrol_new dbeep_mute_ctl =
869 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
870 static struct snd_kcontrol_new beep_vol_ctl =
871 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
872
873 /* check for mute support for the the amp */
874 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
875 const struct snd_kcontrol_new *temp;
876 if (spec->anabeep_nid == nid)
877 temp = &abeep_mute_ctl;
878 else
879 temp = &dbeep_mute_ctl;
880 knew = snd_hda_gen_add_kctl(&spec->gen,
881 "Beep Playback Switch", temp);
882 if (!knew)
883 return -ENOMEM;
884 knew->private_value =
885 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
886 }
887
888 /* check to see if there is volume support for the amp */
889 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
890 knew = snd_hda_gen_add_kctl(&spec->gen,
891 "Beep Playback Volume",
892 &beep_vol_ctl);
893 if (!knew)
894 return -ENOMEM;
895 knew->private_value =
896 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
897 }
898 return 0;
899 }
900
901 #ifdef CONFIG_SND_HDA_INPUT_BEEP
902 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
903
904 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
905 struct snd_ctl_elem_value *ucontrol)
906 {
907 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
908 ucontrol->value.integer.value[0] = codec->beep->enabled;
909 return 0;
910 }
911
912 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
913 struct snd_ctl_elem_value *ucontrol)
914 {
915 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
916 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
917 }
918
919 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
920 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
921 .name = "Beep Playback Switch",
922 .info = stac_dig_beep_switch_info,
923 .get = stac_dig_beep_switch_get,
924 .put = stac_dig_beep_switch_put,
925 };
926
927 static int stac_beep_switch_ctl(struct hda_codec *codec)
928 {
929 struct sigmatel_spec *spec = codec->spec;
930
931 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
932 return -ENOMEM;
933 return 0;
934 }
935 #endif
936
937 /*
938 * SPDIF-out mux controls
939 */
940
941 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
942 struct snd_ctl_elem_info *uinfo)
943 {
944 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
945 struct sigmatel_spec *spec = codec->spec;
946 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
947 }
948
949 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
950 struct snd_ctl_elem_value *ucontrol)
951 {
952 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
953 struct sigmatel_spec *spec = codec->spec;
954 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
955
956 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
957 return 0;
958 }
959
960 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
961 struct snd_ctl_elem_value *ucontrol)
962 {
963 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
964 struct sigmatel_spec *spec = codec->spec;
965 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
966
967 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
968 spec->gen.autocfg.dig_out_pins[smux_idx],
969 &spec->cur_smux[smux_idx]);
970 }
971
972 static struct snd_kcontrol_new stac_smux_mixer = {
973 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
974 .name = "IEC958 Playback Source",
975 /* count set later */
976 .info = stac_smux_enum_info,
977 .get = stac_smux_enum_get,
978 .put = stac_smux_enum_put,
979 };
980
981 static const char * const stac_spdif_labels[] = {
982 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
983 };
984
985 static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
986 {
987 struct sigmatel_spec *spec = codec->spec;
988 struct auto_pin_cfg *cfg = &spec->gen.autocfg;
989 const char * const *labels = spec->spdif_labels;
990 struct snd_kcontrol_new *kctl;
991 int i, num_cons;
992
993 if (cfg->dig_outs < 1)
994 return 0;
995
996 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
997 if (num_cons <= 1)
998 return 0;
999
1000 if (!labels)
1001 labels = stac_spdif_labels;
1002 for (i = 0; i < num_cons; i++) {
1003 if (snd_BUG_ON(!labels[i]))
1004 return -EINVAL;
1005 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
1006 }
1007
1008 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
1009 if (!kctl)
1010 return -ENOMEM;
1011 kctl->count = cfg->dig_outs;
1012
1013 return 0;
1014 }
1015
1016 /*
1017 */
1018
1019 static const struct hda_verb stac9200_core_init[] = {
1020 /* set dac0mux for dac converter */
1021 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1022 {}
1023 };
1024
1025 static const struct hda_verb stac9200_eapd_init[] = {
1026 /* set dac0mux for dac converter */
1027 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1028 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1029 {}
1030 };
1031
1032 static const struct hda_verb dell_eq_core_init[] = {
1033 /* set master volume to max value without distortion
1034 * and direct control */
1035 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
1036 {}
1037 };
1038
1039 static const struct hda_verb stac92hd73xx_core_init[] = {
1040 /* set master volume and direct control */
1041 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1042 {}
1043 };
1044
1045 static const struct hda_verb stac92hd83xxx_core_init[] = {
1046 /* power state controls amps */
1047 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
1048 {}
1049 };
1050
1051 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1052 { 0x22, 0x785, 0x43 },
1053 { 0x22, 0x782, 0xe0 },
1054 { 0x22, 0x795, 0x00 },
1055 {}
1056 };
1057
1058 static const struct hda_verb stac92hd71bxx_core_init[] = {
1059 /* set master volume and direct control */
1060 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1061 {}
1062 };
1063
1064 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1065 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1066 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1067 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1068 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1069 {}
1070 };
1071
1072 static const struct hda_verb stac925x_core_init[] = {
1073 /* set dac0mux for dac converter */
1074 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1075 /* mute the master volume */
1076 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1077 {}
1078 };
1079
1080 static const struct hda_verb stac922x_core_init[] = {
1081 /* set master volume and direct control */
1082 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1083 {}
1084 };
1085
1086 static const struct hda_verb d965_core_init[] = {
1087 /* unmute node 0x1b */
1088 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1089 /* select node 0x03 as DAC */
1090 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1091 {}
1092 };
1093
1094 static const struct hda_verb dell_3st_core_init[] = {
1095 /* don't set delta bit */
1096 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1097 /* unmute node 0x1b */
1098 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1099 /* select node 0x03 as DAC */
1100 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1101 {}
1102 };
1103
1104 static const struct hda_verb stac927x_core_init[] = {
1105 /* set master volume and direct control */
1106 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1107 /* enable analog pc beep path */
1108 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1109 {}
1110 };
1111
1112 static const struct hda_verb stac927x_volknob_core_init[] = {
1113 /* don't set delta bit */
1114 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1115 /* enable analog pc beep path */
1116 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1117 {}
1118 };
1119
1120 static const struct hda_verb stac9205_core_init[] = {
1121 /* set master volume and direct control */
1122 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1123 /* enable analog pc beep path */
1124 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1125 {}
1126 };
1127
1128 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1129 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1130
1131 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1132 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1133
1134 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1135 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1136
1137 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1138 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1139
1140 static const struct snd_kcontrol_new stac9205_loopback =
1141 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1142
1143 static const struct snd_kcontrol_new stac927x_loopback =
1144 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1145
1146 static const struct hda_pintbl ref9200_pin_configs[] = {
1147 { 0x08, 0x01c47010 },
1148 { 0x09, 0x01447010 },
1149 { 0x0d, 0x0221401f },
1150 { 0x0e, 0x01114010 },
1151 { 0x0f, 0x02a19020 },
1152 { 0x10, 0x01a19021 },
1153 { 0x11, 0x90100140 },
1154 { 0x12, 0x01813122 },
1155 {}
1156 };
1157
1158 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1159 { 0x08, 0x400000fe },
1160 { 0x09, 0x404500f4 },
1161 { 0x0d, 0x400100f0 },
1162 { 0x0e, 0x90110010 },
1163 { 0x0f, 0x400100f1 },
1164 { 0x10, 0x02a1902e },
1165 { 0x11, 0x500000f2 },
1166 { 0x12, 0x500000f3 },
1167 {}
1168 };
1169
1170 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1171 { 0x08, 0x400000fe },
1172 { 0x09, 0x404500f4 },
1173 { 0x0d, 0x400100f0 },
1174 { 0x0e, 0x90110010 },
1175 { 0x0f, 0x400100f1 },
1176 { 0x10, 0x02a1902e },
1177 { 0x11, 0x500000f2 },
1178 { 0x12, 0x500000f3 },
1179 {}
1180 };
1181
1182 /*
1183 STAC 9200 pin configs for
1184 102801A8
1185 102801DE
1186 102801E8
1187 */
1188 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1189 { 0x08, 0x400001f0 },
1190 { 0x09, 0x400001f1 },
1191 { 0x0d, 0x02214030 },
1192 { 0x0e, 0x01014010 },
1193 { 0x0f, 0x02a19020 },
1194 { 0x10, 0x01a19021 },
1195 { 0x11, 0x90100140 },
1196 { 0x12, 0x01813122 },
1197 {}
1198 };
1199
1200 /*
1201 STAC 9200 pin configs for
1202 102801C0
1203 102801C1
1204 */
1205 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1206 { 0x08, 0x400001f0 },
1207 { 0x09, 0x400001f1 },
1208 { 0x0d, 0x0221401f },
1209 { 0x0e, 0x01014010 },
1210 { 0x0f, 0x01813020 },
1211 { 0x10, 0x02a19021 },
1212 { 0x11, 0x90100140 },
1213 { 0x12, 0x400001f2 },
1214 {}
1215 };
1216
1217 /*
1218 STAC 9200 pin configs for
1219 102801C4 (Dell Dimension E310)
1220 102801C5
1221 102801C7
1222 102801D9
1223 102801DA
1224 102801E3
1225 */
1226 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1227 { 0x08, 0x400001f0 },
1228 { 0x09, 0x400001f1 },
1229 { 0x0d, 0x0221401f },
1230 { 0x0e, 0x01014010 },
1231 { 0x0f, 0x01813020 },
1232 { 0x10, 0x01a19021 },
1233 { 0x11, 0x90100140 },
1234 { 0x12, 0x400001f2 },
1235 {}
1236 };
1237
1238
1239 /*
1240 STAC 9200-32 pin configs for
1241 102801B5 (Dell Inspiron 630m)
1242 102801D8 (Dell Inspiron 640m)
1243 */
1244 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1245 { 0x08, 0x40c003fa },
1246 { 0x09, 0x03441340 },
1247 { 0x0d, 0x0321121f },
1248 { 0x0e, 0x90170310 },
1249 { 0x0f, 0x408003fb },
1250 { 0x10, 0x03a11020 },
1251 { 0x11, 0x401003fc },
1252 { 0x12, 0x403003fd },
1253 {}
1254 };
1255
1256 /*
1257 STAC 9200-32 pin configs for
1258 102801C2 (Dell Latitude D620)
1259 102801C8
1260 102801CC (Dell Latitude D820)
1261 102801D4
1262 102801D6
1263 */
1264 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1265 { 0x08, 0x40c003fa },
1266 { 0x09, 0x0144131f },
1267 { 0x0d, 0x0321121f },
1268 { 0x0e, 0x90170310 },
1269 { 0x0f, 0x90a70321 },
1270 { 0x10, 0x03a11020 },
1271 { 0x11, 0x401003fb },
1272 { 0x12, 0x40f000fc },
1273 {}
1274 };
1275
1276 /*
1277 STAC 9200-32 pin configs for
1278 102801CE (Dell XPS M1710)
1279 102801CF (Dell Precision M90)
1280 */
1281 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1282 { 0x08, 0x40c003fa },
1283 { 0x09, 0x01441340 },
1284 { 0x0d, 0x0421421f },
1285 { 0x0e, 0x90170310 },
1286 { 0x0f, 0x408003fb },
1287 { 0x10, 0x04a1102e },
1288 { 0x11, 0x90170311 },
1289 { 0x12, 0x403003fc },
1290 {}
1291 };
1292
1293 /*
1294 STAC 9200-32 pin configs for
1295 102801C9
1296 102801CA
1297 102801CB (Dell Latitude 120L)
1298 102801D3
1299 */
1300 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1301 { 0x08, 0x40c003fa },
1302 { 0x09, 0x404003fb },
1303 { 0x0d, 0x0321121f },
1304 { 0x0e, 0x90170310 },
1305 { 0x0f, 0x408003fc },
1306 { 0x10, 0x03a11020 },
1307 { 0x11, 0x401003fd },
1308 { 0x12, 0x403003fe },
1309 {}
1310 };
1311
1312 /*
1313 STAC 9200-32 pin configs for
1314 102801BD (Dell Inspiron E1505n)
1315 102801EE
1316 102801EF
1317 */
1318 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1319 { 0x08, 0x40c003fa },
1320 { 0x09, 0x01441340 },
1321 { 0x0d, 0x0421121f },
1322 { 0x0e, 0x90170310 },
1323 { 0x0f, 0x408003fb },
1324 { 0x10, 0x04a11020 },
1325 { 0x11, 0x401003fc },
1326 { 0x12, 0x403003fd },
1327 {}
1328 };
1329
1330 /*
1331 STAC 9200-32 pin configs for
1332 102801F5 (Dell Inspiron 1501)
1333 102801F6
1334 */
1335 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1336 { 0x08, 0x40c003fa },
1337 { 0x09, 0x404003fb },
1338 { 0x0d, 0x0421121f },
1339 { 0x0e, 0x90170310 },
1340 { 0x0f, 0x408003fc },
1341 { 0x10, 0x04a11020 },
1342 { 0x11, 0x401003fd },
1343 { 0x12, 0x403003fe },
1344 {}
1345 };
1346
1347 /*
1348 STAC 9200-32
1349 102801CD (Dell Inspiron E1705/9400)
1350 */
1351 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1352 { 0x08, 0x40c003fa },
1353 { 0x09, 0x01441340 },
1354 { 0x0d, 0x0421121f },
1355 { 0x0e, 0x90170310 },
1356 { 0x0f, 0x90170310 },
1357 { 0x10, 0x04a11020 },
1358 { 0x11, 0x90170310 },
1359 { 0x12, 0x40f003fc },
1360 {}
1361 };
1362
1363 static const struct hda_pintbl oqo9200_pin_configs[] = {
1364 { 0x08, 0x40c000f0 },
1365 { 0x09, 0x404000f1 },
1366 { 0x0d, 0x0221121f },
1367 { 0x0e, 0x02211210 },
1368 { 0x0f, 0x90170111 },
1369 { 0x10, 0x90a70120 },
1370 { 0x11, 0x400000f2 },
1371 { 0x12, 0x400000f3 },
1372 {}
1373 };
1374
1375
1376 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1377 const struct hda_fixup *fix, int action)
1378 {
1379 struct sigmatel_spec *spec = codec->spec;
1380
1381 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1382 spec->gpio_mask = spec->gpio_dir = 0x09;
1383 spec->gpio_data = 0x00;
1384 /* CF-74 has no headphone detection, and the driver should *NOT*
1385 * do detection and HP/speaker toggle because the hardware does it.
1386 */
1387 spec->gen.suppress_auto_mute = 1;
1388 }
1389 }
1390
1391
1392 static const struct hda_fixup stac9200_fixups[] = {
1393 [STAC_REF] = {
1394 .type = HDA_FIXUP_PINS,
1395 .v.pins = ref9200_pin_configs,
1396 },
1397 [STAC_9200_OQO] = {
1398 .type = HDA_FIXUP_PINS,
1399 .v.pins = oqo9200_pin_configs,
1400 .chained = true,
1401 .chain_id = STAC_9200_EAPD_INIT,
1402 },
1403 [STAC_9200_DELL_D21] = {
1404 .type = HDA_FIXUP_PINS,
1405 .v.pins = dell9200_d21_pin_configs,
1406 },
1407 [STAC_9200_DELL_D22] = {
1408 .type = HDA_FIXUP_PINS,
1409 .v.pins = dell9200_d22_pin_configs,
1410 },
1411 [STAC_9200_DELL_D23] = {
1412 .type = HDA_FIXUP_PINS,
1413 .v.pins = dell9200_d23_pin_configs,
1414 },
1415 [STAC_9200_DELL_M21] = {
1416 .type = HDA_FIXUP_PINS,
1417 .v.pins = dell9200_m21_pin_configs,
1418 },
1419 [STAC_9200_DELL_M22] = {
1420 .type = HDA_FIXUP_PINS,
1421 .v.pins = dell9200_m22_pin_configs,
1422 },
1423 [STAC_9200_DELL_M23] = {
1424 .type = HDA_FIXUP_PINS,
1425 .v.pins = dell9200_m23_pin_configs,
1426 },
1427 [STAC_9200_DELL_M24] = {
1428 .type = HDA_FIXUP_PINS,
1429 .v.pins = dell9200_m24_pin_configs,
1430 },
1431 [STAC_9200_DELL_M25] = {
1432 .type = HDA_FIXUP_PINS,
1433 .v.pins = dell9200_m25_pin_configs,
1434 },
1435 [STAC_9200_DELL_M26] = {
1436 .type = HDA_FIXUP_PINS,
1437 .v.pins = dell9200_m26_pin_configs,
1438 },
1439 [STAC_9200_DELL_M27] = {
1440 .type = HDA_FIXUP_PINS,
1441 .v.pins = dell9200_m27_pin_configs,
1442 },
1443 [STAC_9200_M4] = {
1444 .type = HDA_FIXUP_PINS,
1445 .v.pins = gateway9200_m4_pin_configs,
1446 .chained = true,
1447 .chain_id = STAC_9200_EAPD_INIT,
1448 },
1449 [STAC_9200_M4_2] = {
1450 .type = HDA_FIXUP_PINS,
1451 .v.pins = gateway9200_m4_2_pin_configs,
1452 .chained = true,
1453 .chain_id = STAC_9200_EAPD_INIT,
1454 },
1455 [STAC_9200_PANASONIC] = {
1456 .type = HDA_FIXUP_FUNC,
1457 .v.func = stac9200_fixup_panasonic,
1458 },
1459 [STAC_9200_EAPD_INIT] = {
1460 .type = HDA_FIXUP_VERBS,
1461 .v.verbs = (const struct hda_verb[]) {
1462 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1463 {}
1464 },
1465 },
1466 };
1467
1468 static const struct hda_model_fixup stac9200_models[] = {
1469 { .id = STAC_REF, .name = "ref" },
1470 { .id = STAC_9200_OQO, .name = "oqo" },
1471 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1472 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1473 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1474 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1475 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1476 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1477 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1478 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1479 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1480 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1481 { .id = STAC_9200_M4, .name = "gateway-m4" },
1482 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1483 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1484 {}
1485 };
1486
1487 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1488 /* SigmaTel reference board */
1489 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1490 "DFI LanParty", STAC_REF),
1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1492 "DFI LanParty", STAC_REF),
1493 /* Dell laptops have BIOS problem */
1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1495 "unknown Dell", STAC_9200_DELL_D21),
1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1497 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1499 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1501 "unknown Dell", STAC_9200_DELL_D22),
1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1503 "unknown Dell", STAC_9200_DELL_D22),
1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1505 "Dell Latitude D620", STAC_9200_DELL_M22),
1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1507 "unknown Dell", STAC_9200_DELL_D23),
1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1509 "unknown Dell", STAC_9200_DELL_D23),
1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1511 "unknown Dell", STAC_9200_DELL_M22),
1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1513 "unknown Dell", STAC_9200_DELL_M24),
1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1515 "unknown Dell", STAC_9200_DELL_M24),
1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1517 "Dell Latitude 120L", STAC_9200_DELL_M24),
1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1519 "Dell Latitude D820", STAC_9200_DELL_M22),
1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1521 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1523 "Dell XPS M1710", STAC_9200_DELL_M23),
1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1525 "Dell Precision M90", STAC_9200_DELL_M23),
1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1527 "unknown Dell", STAC_9200_DELL_M22),
1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1529 "unknown Dell", STAC_9200_DELL_M22),
1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1531 "unknown Dell", STAC_9200_DELL_M22),
1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1533 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1535 "unknown Dell", STAC_9200_DELL_D23),
1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1537 "unknown Dell", STAC_9200_DELL_D23),
1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1539 "unknown Dell", STAC_9200_DELL_D21),
1540 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1541 "unknown Dell", STAC_9200_DELL_D23),
1542 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1543 "unknown Dell", STAC_9200_DELL_D21),
1544 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1545 "unknown Dell", STAC_9200_DELL_M25),
1546 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1547 "unknown Dell", STAC_9200_DELL_M25),
1548 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1549 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1550 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1551 "unknown Dell", STAC_9200_DELL_M26),
1552 /* Panasonic */
1553 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1554 /* Gateway machines needs EAPD to be set on resume */
1555 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1556 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1557 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1558 /* OQO Mobile */
1559 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1560 {} /* terminator */
1561 };
1562
1563 static const struct hda_pintbl ref925x_pin_configs[] = {
1564 { 0x07, 0x40c003f0 },
1565 { 0x08, 0x424503f2 },
1566 { 0x0a, 0x01813022 },
1567 { 0x0b, 0x02a19021 },
1568 { 0x0c, 0x90a70320 },
1569 { 0x0d, 0x02214210 },
1570 { 0x10, 0x01019020 },
1571 { 0x11, 0x9033032e },
1572 {}
1573 };
1574
1575 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1576 { 0x07, 0x40c003f4 },
1577 { 0x08, 0x424503f2 },
1578 { 0x0a, 0x400000f3 },
1579 { 0x0b, 0x02a19020 },
1580 { 0x0c, 0x40a000f0 },
1581 { 0x0d, 0x90100210 },
1582 { 0x10, 0x400003f1 },
1583 { 0x11, 0x9033032e },
1584 {}
1585 };
1586
1587 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1588 { 0x07, 0x40c003f4 },
1589 { 0x08, 0x424503f2 },
1590 { 0x0a, 0x400000f3 },
1591 { 0x0b, 0x02a19020 },
1592 { 0x0c, 0x40a000f0 },
1593 { 0x0d, 0x90100210 },
1594 { 0x10, 0x400003f1 },
1595 { 0x11, 0x9033032e },
1596 {}
1597 };
1598
1599 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1600 { 0x07, 0x40c003f4 },
1601 { 0x08, 0x424503f2 },
1602 { 0x0a, 0x400000f3 },
1603 { 0x0b, 0x02a19020 },
1604 { 0x0c, 0x40a000f0 },
1605 { 0x0d, 0x90100210 },
1606 { 0x10, 0x400003f1 },
1607 { 0x11, 0x9033032e },
1608 {}
1609 };
1610
1611 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1612 { 0x07, 0x40c003f4 },
1613 { 0x08, 0x424503f2 },
1614 { 0x0a, 0x400000f3 },
1615 { 0x0b, 0x02a19020 },
1616 { 0x0c, 0x40a000f0 },
1617 { 0x0d, 0x90100210 },
1618 { 0x10, 0x400003f1 },
1619 { 0x11, 0x9033032e },
1620 {}
1621 };
1622
1623 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1624 { 0x07, 0x40c003f4 },
1625 { 0x08, 0x424503f2 },
1626 { 0x0a, 0x400000f3 },
1627 { 0x0b, 0x02a19020 },
1628 { 0x0c, 0x40a000f0 },
1629 { 0x0d, 0x90100210 },
1630 { 0x10, 0x400003f1 },
1631 { 0x11, 0x503303f3 },
1632 {}
1633 };
1634
1635 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1636 { 0x07, 0x40c003f4 },
1637 { 0x08, 0x424503f2 },
1638 { 0x0a, 0x400000f3 },
1639 { 0x0b, 0x02a19020 },
1640 { 0x0c, 0x40a000f0 },
1641 { 0x0d, 0x90100210 },
1642 { 0x10, 0x400003f1 },
1643 { 0x11, 0x9033032e },
1644 {}
1645 };
1646
1647 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1648 { 0x07, 0x40c003f4 },
1649 { 0x08, 0x424503f2 },
1650 { 0x0a, 0x400000f3 },
1651 { 0x0b, 0x02a19020 },
1652 { 0x0c, 0x40a000f0 },
1653 { 0x0d, 0x90100210 },
1654 { 0x10, 0x400003f1 },
1655 { 0x11, 0x90330320 },
1656 {}
1657 };
1658
1659 static const struct hda_fixup stac925x_fixups[] = {
1660 [STAC_REF] = {
1661 .type = HDA_FIXUP_PINS,
1662 .v.pins = ref925x_pin_configs,
1663 },
1664 [STAC_M1] = {
1665 .type = HDA_FIXUP_PINS,
1666 .v.pins = stac925xM1_pin_configs,
1667 },
1668 [STAC_M1_2] = {
1669 .type = HDA_FIXUP_PINS,
1670 .v.pins = stac925xM1_2_pin_configs,
1671 },
1672 [STAC_M2] = {
1673 .type = HDA_FIXUP_PINS,
1674 .v.pins = stac925xM2_pin_configs,
1675 },
1676 [STAC_M2_2] = {
1677 .type = HDA_FIXUP_PINS,
1678 .v.pins = stac925xM2_2_pin_configs,
1679 },
1680 [STAC_M3] = {
1681 .type = HDA_FIXUP_PINS,
1682 .v.pins = stac925xM3_pin_configs,
1683 },
1684 [STAC_M5] = {
1685 .type = HDA_FIXUP_PINS,
1686 .v.pins = stac925xM5_pin_configs,
1687 },
1688 [STAC_M6] = {
1689 .type = HDA_FIXUP_PINS,
1690 .v.pins = stac925xM6_pin_configs,
1691 },
1692 };
1693
1694 static const struct hda_model_fixup stac925x_models[] = {
1695 { .id = STAC_REF, .name = "ref" },
1696 { .id = STAC_M1, .name = "m1" },
1697 { .id = STAC_M1_2, .name = "m1-2" },
1698 { .id = STAC_M2, .name = "m2" },
1699 { .id = STAC_M2_2, .name = "m2-2" },
1700 { .id = STAC_M3, .name = "m3" },
1701 { .id = STAC_M5, .name = "m5" },
1702 { .id = STAC_M6, .name = "m6" },
1703 {}
1704 };
1705
1706 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1707 /* SigmaTel reference board */
1708 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1709 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1710 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1711
1712 /* Default table for unknown ID */
1713 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1714
1715 /* gateway machines are checked via codec ssid */
1716 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1717 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1718 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1719 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1720 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1721 /* Not sure about the brand name for those */
1722 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1723 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1724 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1725 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1726 {} /* terminator */
1727 };
1728
1729 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1730 { 0x0a, 0x02214030 },
1731 { 0x0b, 0x02a19040 },
1732 { 0x0c, 0x01a19020 },
1733 { 0x0d, 0x02214030 },
1734 { 0x0e, 0x0181302e },
1735 { 0x0f, 0x01014010 },
1736 { 0x10, 0x01014020 },
1737 { 0x11, 0x01014030 },
1738 { 0x12, 0x02319040 },
1739 { 0x13, 0x90a000f0 },
1740 { 0x14, 0x90a000f0 },
1741 { 0x22, 0x01452050 },
1742 { 0x23, 0x01452050 },
1743 {}
1744 };
1745
1746 static const struct hda_pintbl dell_m6_pin_configs[] = {
1747 { 0x0a, 0x0321101f },
1748 { 0x0b, 0x4f00000f },
1749 { 0x0c, 0x4f0000f0 },
1750 { 0x0d, 0x90170110 },
1751 { 0x0e, 0x03a11020 },
1752 { 0x0f, 0x0321101f },
1753 { 0x10, 0x4f0000f0 },
1754 { 0x11, 0x4f0000f0 },
1755 { 0x12, 0x4f0000f0 },
1756 { 0x13, 0x90a60160 },
1757 { 0x14, 0x4f0000f0 },
1758 { 0x22, 0x4f0000f0 },
1759 { 0x23, 0x4f0000f0 },
1760 {}
1761 };
1762
1763 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1764 { 0x0a, 0x0321101f },
1765 { 0x0b, 0x0321101f },
1766 { 0x0c, 0x03a11020 },
1767 { 0x0d, 0x03014020 },
1768 { 0x0e, 0x90170110 },
1769 { 0x0f, 0x4f0000f0 },
1770 { 0x10, 0x4f0000f0 },
1771 { 0x11, 0x4f0000f0 },
1772 { 0x12, 0x4f0000f0 },
1773 { 0x13, 0x90a60160 },
1774 { 0x14, 0x4f0000f0 },
1775 { 0x22, 0x4f0000f0 },
1776 { 0x23, 0x904601b0 },
1777 {}
1778 };
1779
1780 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1781 { 0x0a, 0x02214230 },
1782 { 0x0b, 0x02A19240 },
1783 { 0x0c, 0x01013214 },
1784 { 0x0d, 0x01014210 },
1785 { 0x0e, 0x01A19250 },
1786 { 0x0f, 0x01011212 },
1787 { 0x10, 0x01016211 },
1788 {}
1789 };
1790
1791 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1792 { 0x0a, 0x02214030 },
1793 { 0x0b, 0x02A19010 },
1794 {}
1795 };
1796
1797 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1798 { 0x0e, 0x400000f0 },
1799 {}
1800 };
1801
1802 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1803 const struct hda_fixup *fix, int action)
1804 {
1805 struct sigmatel_spec *spec = codec->spec;
1806
1807 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1808 return;
1809
1810 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1811 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1812 }
1813
1814 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1815 {
1816 struct sigmatel_spec *spec = codec->spec;
1817
1818 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1819 spec->eapd_switch = 0;
1820 }
1821
1822 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1823 const struct hda_fixup *fix, int action)
1824 {
1825 struct sigmatel_spec *spec = codec->spec;
1826
1827 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1828 return;
1829
1830 stac92hd73xx_fixup_dell(codec);
1831 snd_hda_add_verbs(codec, dell_eq_core_init);
1832 spec->volknob_init = 1;
1833 }
1834
1835 /* Analog Mics */
1836 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1837 const struct hda_fixup *fix, int action)
1838 {
1839 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1840 return;
1841
1842 stac92hd73xx_fixup_dell(codec);
1843 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1844 }
1845
1846 /* Digital Mics */
1847 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1848 const struct hda_fixup *fix, int action)
1849 {
1850 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1851 return;
1852
1853 stac92hd73xx_fixup_dell(codec);
1854 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1855 }
1856
1857 /* Both */
1858 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1859 const struct hda_fixup *fix, int action)
1860 {
1861 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1862 return;
1863
1864 stac92hd73xx_fixup_dell(codec);
1865 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1866 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1867 }
1868
1869 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1870 const struct hda_fixup *fix, int action)
1871 {
1872 struct sigmatel_spec *spec = codec->spec;
1873
1874 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1875 return;
1876
1877 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1878 spec->eapd_switch = 0;
1879 }
1880
1881 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1882 const struct hda_fixup *fix, int action)
1883 {
1884 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1885 codec->no_jack_detect = 1;
1886 }
1887
1888 static const struct hda_fixup stac92hd73xx_fixups[] = {
1889 [STAC_92HD73XX_REF] = {
1890 .type = HDA_FIXUP_FUNC,
1891 .v.func = stac92hd73xx_fixup_ref,
1892 },
1893 [STAC_DELL_M6_AMIC] = {
1894 .type = HDA_FIXUP_FUNC,
1895 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1896 },
1897 [STAC_DELL_M6_DMIC] = {
1898 .type = HDA_FIXUP_FUNC,
1899 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1900 },
1901 [STAC_DELL_M6_BOTH] = {
1902 .type = HDA_FIXUP_FUNC,
1903 .v.func = stac92hd73xx_fixup_dell_m6_both,
1904 },
1905 [STAC_DELL_EQ] = {
1906 .type = HDA_FIXUP_FUNC,
1907 .v.func = stac92hd73xx_fixup_dell_eq,
1908 },
1909 [STAC_ALIENWARE_M17X] = {
1910 .type = HDA_FIXUP_FUNC,
1911 .v.func = stac92hd73xx_fixup_alienware_m17x,
1912 },
1913 [STAC_92HD73XX_INTEL] = {
1914 .type = HDA_FIXUP_PINS,
1915 .v.pins = intel_dg45id_pin_configs,
1916 },
1917 [STAC_92HD73XX_NO_JD] = {
1918 .type = HDA_FIXUP_FUNC,
1919 .v.func = stac92hd73xx_fixup_no_jd,
1920 },
1921 [STAC_92HD89XX_HP_FRONT_JACK] = {
1922 .type = HDA_FIXUP_PINS,
1923 .v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1924 },
1925 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1926 .type = HDA_FIXUP_PINS,
1927 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1928 },
1929 [STAC_92HD73XX_ASUS_MOBO] = {
1930 .type = HDA_FIXUP_PINS,
1931 .v.pins = (const struct hda_pintbl[]) {
1932 /* enable 5.1 and SPDIF out */
1933 { 0x0c, 0x01014411 },
1934 { 0x0d, 0x01014410 },
1935 { 0x0e, 0x01014412 },
1936 { 0x22, 0x014b1180 },
1937 { }
1938 }
1939 },
1940 };
1941
1942 static const struct hda_model_fixup stac92hd73xx_models[] = {
1943 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1944 { .id = STAC_92HD73XX_REF, .name = "ref" },
1945 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1946 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1947 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1948 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1949 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1950 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1951 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
1952 {}
1953 };
1954
1955 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1956 /* SigmaTel reference board */
1957 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1958 "DFI LanParty", STAC_92HD73XX_REF),
1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1960 "DFI LanParty", STAC_92HD73XX_REF),
1961 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1962 "Intel DG45ID", STAC_92HD73XX_INTEL),
1963 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1964 "Intel DG45FC", STAC_92HD73XX_INTEL),
1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1966 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1968 "unknown Dell", STAC_DELL_M6_DMIC),
1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1970 "unknown Dell", STAC_DELL_M6_BOTH),
1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1972 "unknown Dell", STAC_DELL_M6_BOTH),
1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1974 "unknown Dell", STAC_DELL_M6_AMIC),
1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1976 "unknown Dell", STAC_DELL_M6_AMIC),
1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1978 "unknown Dell", STAC_DELL_M6_DMIC),
1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1980 "unknown Dell", STAC_DELL_M6_DMIC),
1981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1982 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1984 "Dell Studio 17", STAC_DELL_M6_DMIC),
1985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1986 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1988 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1990 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1992 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1993 /* codec SSID matching */
1994 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1995 "Alienware M17x", STAC_ALIENWARE_M17X),
1996 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1997 "Alienware M17x", STAC_ALIENWARE_M17X),
1998 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1999 "Alienware M17x R3", STAC_DELL_EQ),
2000 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
2001 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
2002 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
2003 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
2004 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
2005 STAC_92HD73XX_ASUS_MOBO),
2006 {} /* terminator */
2007 };
2008
2009 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2010 { 0x0a, 0x02214030 },
2011 { 0x0b, 0x02211010 },
2012 { 0x0c, 0x02a19020 },
2013 { 0x0d, 0x02170130 },
2014 { 0x0e, 0x01014050 },
2015 { 0x0f, 0x01819040 },
2016 { 0x10, 0x01014020 },
2017 { 0x11, 0x90a3014e },
2018 { 0x1f, 0x01451160 },
2019 { 0x20, 0x98560170 },
2020 {}
2021 };
2022
2023 static const struct hda_pintbl dell_s14_pin_configs[] = {
2024 { 0x0a, 0x0221403f },
2025 { 0x0b, 0x0221101f },
2026 { 0x0c, 0x02a19020 },
2027 { 0x0d, 0x90170110 },
2028 { 0x0e, 0x40f000f0 },
2029 { 0x0f, 0x40f000f0 },
2030 { 0x10, 0x40f000f0 },
2031 { 0x11, 0x90a60160 },
2032 { 0x1f, 0x40f000f0 },
2033 { 0x20, 0x40f000f0 },
2034 {}
2035 };
2036
2037 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2038 { 0x0a, 0x02a11020 },
2039 { 0x0b, 0x0221101f },
2040 { 0x0c, 0x400000f0 },
2041 { 0x0d, 0x90170110 },
2042 { 0x0e, 0x400000f1 },
2043 { 0x0f, 0x400000f2 },
2044 { 0x10, 0x400000f3 },
2045 { 0x11, 0x90a60160 },
2046 { 0x1f, 0x400000f4 },
2047 { 0x20, 0x400000f5 },
2048 {}
2049 };
2050
2051 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2052 { 0x0a, 0x03a12050 },
2053 { 0x0b, 0x0321201f },
2054 { 0x0c, 0x40f000f0 },
2055 { 0x0d, 0x90170110 },
2056 { 0x0e, 0x40f000f0 },
2057 { 0x0f, 0x40f000f0 },
2058 { 0x10, 0x90170110 },
2059 { 0x11, 0xd5a30140 },
2060 { 0x1f, 0x40f000f0 },
2061 { 0x20, 0x40f000f0 },
2062 {}
2063 };
2064
2065 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2066 { 0x0a, 0x01813050 },
2067 { 0x0b, 0x0421201f },
2068 { 0x0c, 0x04a1205e },
2069 { 0x0d, 0x96130310 },
2070 { 0x0e, 0x96130310 },
2071 { 0x0f, 0x0101401f },
2072 { 0x10, 0x1111611f },
2073 { 0x11, 0xd5a30130 },
2074 {}
2075 };
2076
2077 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2078 { 0x0a, 0x40f000f0 },
2079 { 0x0b, 0x0221101f },
2080 { 0x0c, 0x02a11020 },
2081 { 0x0d, 0x92170110 },
2082 { 0x0e, 0x40f000f0 },
2083 { 0x0f, 0x92170110 },
2084 { 0x10, 0x40f000f0 },
2085 { 0x11, 0xd5a30130 },
2086 { 0x1f, 0x40f000f0 },
2087 { 0x20, 0x40f000f0 },
2088 {}
2089 };
2090
2091 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2092 const struct hda_fixup *fix, int action)
2093 {
2094 struct sigmatel_spec *spec = codec->spec;
2095
2096 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2097 return;
2098
2099 if (hp_bnb2011_with_dock(codec)) {
2100 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2101 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2102 }
2103
2104 if (find_mute_led_cfg(codec, spec->default_polarity))
2105 snd_printd("mute LED gpio %d polarity %d\n",
2106 spec->gpio_led,
2107 spec->gpio_led_polarity);
2108 }
2109
2110 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2111 const struct hda_fixup *fix, int action)
2112 {
2113 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2114 return;
2115
2116 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2117 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2118 }
2119
2120 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2121 const struct hda_fixup *fix, int action)
2122 {
2123 struct sigmatel_spec *spec = codec->spec;
2124
2125 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2126 spec->default_polarity = 0;
2127 }
2128
2129 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2130 const struct hda_fixup *fix, int action)
2131 {
2132 struct sigmatel_spec *spec = codec->spec;
2133
2134 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2135 spec->default_polarity = 1;
2136 }
2137
2138 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2139 const struct hda_fixup *fix, int action)
2140 {
2141 struct sigmatel_spec *spec = codec->spec;
2142
2143 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2144 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2145 }
2146
2147 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2148 const struct hda_fixup *fix, int action)
2149 {
2150 struct sigmatel_spec *spec = codec->spec;
2151
2152 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2153 spec->gpio_led = 0x10; /* GPIO4 */
2154 spec->default_polarity = 0;
2155 }
2156 }
2157
2158 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2159 const struct hda_fixup *fix, int action)
2160 {
2161 struct sigmatel_spec *spec = codec->spec;
2162
2163 if (action == HDA_FIXUP_ACT_PRE_PROBE)
2164 spec->headset_jack = 1;
2165 }
2166
2167 static const struct hda_verb hp_bnb13_eq_verbs[] = {
2168 /* 44.1KHz base */
2169 { 0x22, 0x7A6, 0x3E },
2170 { 0x22, 0x7A7, 0x68 },
2171 { 0x22, 0x7A8, 0x17 },
2172 { 0x22, 0x7A9, 0x3E },
2173 { 0x22, 0x7AA, 0x68 },
2174 { 0x22, 0x7AB, 0x17 },
2175 { 0x22, 0x7AC, 0x00 },
2176 { 0x22, 0x7AD, 0x80 },
2177 { 0x22, 0x7A6, 0x83 },
2178 { 0x22, 0x7A7, 0x2F },
2179 { 0x22, 0x7A8, 0xD1 },
2180 { 0x22, 0x7A9, 0x83 },
2181 { 0x22, 0x7AA, 0x2F },
2182 { 0x22, 0x7AB, 0xD1 },
2183 { 0x22, 0x7AC, 0x01 },
2184 { 0x22, 0x7AD, 0x80 },
2185 { 0x22, 0x7A6, 0x3E },
2186 { 0x22, 0x7A7, 0x68 },
2187 { 0x22, 0x7A8, 0x17 },
2188 { 0x22, 0x7A9, 0x3E },
2189 { 0x22, 0x7AA, 0x68 },
2190 { 0x22, 0x7AB, 0x17 },
2191 { 0x22, 0x7AC, 0x02 },
2192 { 0x22, 0x7AD, 0x80 },
2193 { 0x22, 0x7A6, 0x7C },
2194 { 0x22, 0x7A7, 0xC6 },
2195 { 0x22, 0x7A8, 0x0C },
2196 { 0x22, 0x7A9, 0x7C },
2197 { 0x22, 0x7AA, 0xC6 },
2198 { 0x22, 0x7AB, 0x0C },
2199 { 0x22, 0x7AC, 0x03 },
2200 { 0x22, 0x7AD, 0x80 },
2201 { 0x22, 0x7A6, 0xC3 },
2202 { 0x22, 0x7A7, 0x25 },
2203 { 0x22, 0x7A8, 0xAF },
2204 { 0x22, 0x7A9, 0xC3 },
2205 { 0x22, 0x7AA, 0x25 },
2206 { 0x22, 0x7AB, 0xAF },
2207 { 0x22, 0x7AC, 0x04 },
2208 { 0x22, 0x7AD, 0x80 },
2209 { 0x22, 0x7A6, 0x3E },
2210 { 0x22, 0x7A7, 0x85 },
2211 { 0x22, 0x7A8, 0x73 },
2212 { 0x22, 0x7A9, 0x3E },
2213 { 0x22, 0x7AA, 0x85 },
2214 { 0x22, 0x7AB, 0x73 },
2215 { 0x22, 0x7AC, 0x05 },
2216 { 0x22, 0x7AD, 0x80 },
2217 { 0x22, 0x7A6, 0x85 },
2218 { 0x22, 0x7A7, 0x39 },
2219 { 0x22, 0x7A8, 0xC7 },
2220 { 0x22, 0x7A9, 0x85 },
2221 { 0x22, 0x7AA, 0x39 },
2222 { 0x22, 0x7AB, 0xC7 },
2223 { 0x22, 0x7AC, 0x06 },
2224 { 0x22, 0x7AD, 0x80 },
2225 { 0x22, 0x7A6, 0x3C },
2226 { 0x22, 0x7A7, 0x90 },
2227 { 0x22, 0x7A8, 0xB0 },
2228 { 0x22, 0x7A9, 0x3C },
2229 { 0x22, 0x7AA, 0x90 },
2230 { 0x22, 0x7AB, 0xB0 },
2231 { 0x22, 0x7AC, 0x07 },
2232 { 0x22, 0x7AD, 0x80 },
2233 { 0x22, 0x7A6, 0x7A },
2234 { 0x22, 0x7A7, 0xC6 },
2235 { 0x22, 0x7A8, 0x39 },
2236 { 0x22, 0x7A9, 0x7A },
2237 { 0x22, 0x7AA, 0xC6 },
2238 { 0x22, 0x7AB, 0x39 },
2239 { 0x22, 0x7AC, 0x08 },
2240 { 0x22, 0x7AD, 0x80 },
2241 { 0x22, 0x7A6, 0xC4 },
2242 { 0x22, 0x7A7, 0xE9 },
2243 { 0x22, 0x7A8, 0xDC },
2244 { 0x22, 0x7A9, 0xC4 },
2245 { 0x22, 0x7AA, 0xE9 },
2246 { 0x22, 0x7AB, 0xDC },
2247 { 0x22, 0x7AC, 0x09 },
2248 { 0x22, 0x7AD, 0x80 },
2249 { 0x22, 0x7A6, 0x3D },
2250 { 0x22, 0x7A7, 0xE1 },
2251 { 0x22, 0x7A8, 0x0D },
2252 { 0x22, 0x7A9, 0x3D },
2253 { 0x22, 0x7AA, 0xE1 },
2254 { 0x22, 0x7AB, 0x0D },
2255 { 0x22, 0x7AC, 0x0A },
2256 { 0x22, 0x7AD, 0x80 },
2257 { 0x22, 0x7A6, 0x89 },
2258 { 0x22, 0x7A7, 0xB6 },
2259 { 0x22, 0x7A8, 0xEB },
2260 { 0x22, 0x7A9, 0x89 },
2261 { 0x22, 0x7AA, 0xB6 },
2262 { 0x22, 0x7AB, 0xEB },
2263 { 0x22, 0x7AC, 0x0B },
2264 { 0x22, 0x7AD, 0x80 },
2265 { 0x22, 0x7A6, 0x39 },
2266 { 0x22, 0x7A7, 0x9D },
2267 { 0x22, 0x7A8, 0xFE },
2268 { 0x22, 0x7A9, 0x39 },
2269 { 0x22, 0x7AA, 0x9D },
2270 { 0x22, 0x7AB, 0xFE },
2271 { 0x22, 0x7AC, 0x0C },
2272 { 0x22, 0x7AD, 0x80 },
2273 { 0x22, 0x7A6, 0x76 },
2274 { 0x22, 0x7A7, 0x49 },
2275 { 0x22, 0x7A8, 0x15 },
2276 { 0x22, 0x7A9, 0x76 },
2277 { 0x22, 0x7AA, 0x49 },
2278 { 0x22, 0x7AB, 0x15 },
2279 { 0x22, 0x7AC, 0x0D },
2280 { 0x22, 0x7AD, 0x80 },
2281 { 0x22, 0x7A6, 0xC8 },
2282 { 0x22, 0x7A7, 0x80 },
2283 { 0x22, 0x7A8, 0xF5 },
2284 { 0x22, 0x7A9, 0xC8 },
2285 { 0x22, 0x7AA, 0x80 },
2286 { 0x22, 0x7AB, 0xF5 },
2287 { 0x22, 0x7AC, 0x0E },
2288 { 0x22, 0x7AD, 0x80 },
2289 { 0x22, 0x7A6, 0x40 },
2290 { 0x22, 0x7A7, 0x00 },
2291 { 0x22, 0x7A8, 0x00 },
2292 { 0x22, 0x7A9, 0x40 },
2293 { 0x22, 0x7AA, 0x00 },
2294 { 0x22, 0x7AB, 0x00 },
2295 { 0x22, 0x7AC, 0x0F },
2296 { 0x22, 0x7AD, 0x80 },
2297 { 0x22, 0x7A6, 0x90 },
2298 { 0x22, 0x7A7, 0x68 },
2299 { 0x22, 0x7A8, 0xF1 },
2300 { 0x22, 0x7A9, 0x90 },
2301 { 0x22, 0x7AA, 0x68 },
2302 { 0x22, 0x7AB, 0xF1 },
2303 { 0x22, 0x7AC, 0x10 },
2304 { 0x22, 0x7AD, 0x80 },
2305 { 0x22, 0x7A6, 0x34 },
2306 { 0x22, 0x7A7, 0x47 },
2307 { 0x22, 0x7A8, 0x6C },
2308 { 0x22, 0x7A9, 0x34 },
2309 { 0x22, 0x7AA, 0x47 },
2310 { 0x22, 0x7AB, 0x6C },
2311 { 0x22, 0x7AC, 0x11 },
2312 { 0x22, 0x7AD, 0x80 },
2313 { 0x22, 0x7A6, 0x6F },
2314 { 0x22, 0x7A7, 0x97 },
2315 { 0x22, 0x7A8, 0x0F },
2316 { 0x22, 0x7A9, 0x6F },
2317 { 0x22, 0x7AA, 0x97 },
2318 { 0x22, 0x7AB, 0x0F },
2319 { 0x22, 0x7AC, 0x12 },
2320 { 0x22, 0x7AD, 0x80 },
2321 { 0x22, 0x7A6, 0xCB },
2322 { 0x22, 0x7A7, 0xB8 },
2323 { 0x22, 0x7A8, 0x94 },
2324 { 0x22, 0x7A9, 0xCB },
2325 { 0x22, 0x7AA, 0xB8 },
2326 { 0x22, 0x7AB, 0x94 },
2327 { 0x22, 0x7AC, 0x13 },
2328 { 0x22, 0x7AD, 0x80 },
2329 { 0x22, 0x7A6, 0x40 },
2330 { 0x22, 0x7A7, 0x00 },
2331 { 0x22, 0x7A8, 0x00 },
2332 { 0x22, 0x7A9, 0x40 },
2333 { 0x22, 0x7AA, 0x00 },
2334 { 0x22, 0x7AB, 0x00 },
2335 { 0x22, 0x7AC, 0x14 },
2336 { 0x22, 0x7AD, 0x80 },
2337 { 0x22, 0x7A6, 0x95 },
2338 { 0x22, 0x7A7, 0x76 },
2339 { 0x22, 0x7A8, 0x5B },
2340 { 0x22, 0x7A9, 0x95 },
2341 { 0x22, 0x7AA, 0x76 },
2342 { 0x22, 0x7AB, 0x5B },
2343 { 0x22, 0x7AC, 0x15 },
2344 { 0x22, 0x7AD, 0x80 },
2345 { 0x22, 0x7A6, 0x31 },
2346 { 0x22, 0x7A7, 0xAC },
2347 { 0x22, 0x7A8, 0x31 },
2348 { 0x22, 0x7A9, 0x31 },
2349 { 0x22, 0x7AA, 0xAC },
2350 { 0x22, 0x7AB, 0x31 },
2351 { 0x22, 0x7AC, 0x16 },
2352 { 0x22, 0x7AD, 0x80 },
2353 { 0x22, 0x7A6, 0x6A },
2354 { 0x22, 0x7A7, 0x89 },
2355 { 0x22, 0x7A8, 0xA5 },
2356 { 0x22, 0x7A9, 0x6A },
2357 { 0x22, 0x7AA, 0x89 },
2358 { 0x22, 0x7AB, 0xA5 },
2359 { 0x22, 0x7AC, 0x17 },
2360 { 0x22, 0x7AD, 0x80 },
2361 { 0x22, 0x7A6, 0xCE },
2362 { 0x22, 0x7A7, 0x53 },
2363 { 0x22, 0x7A8, 0xCF },
2364 { 0x22, 0x7A9, 0xCE },
2365 { 0x22, 0x7AA, 0x53 },
2366 { 0x22, 0x7AB, 0xCF },
2367 { 0x22, 0x7AC, 0x18 },
2368 { 0x22, 0x7AD, 0x80 },
2369 { 0x22, 0x7A6, 0x40 },
2370 { 0x22, 0x7A7, 0x00 },
2371 { 0x22, 0x7A8, 0x00 },
2372 { 0x22, 0x7A9, 0x40 },
2373 { 0x22, 0x7AA, 0x00 },
2374 { 0x22, 0x7AB, 0x00 },
2375 { 0x22, 0x7AC, 0x19 },
2376 { 0x22, 0x7AD, 0x80 },
2377 /* 48KHz base */
2378 { 0x22, 0x7A6, 0x3E },
2379 { 0x22, 0x7A7, 0x88 },
2380 { 0x22, 0x7A8, 0xDC },
2381 { 0x22, 0x7A9, 0x3E },
2382 { 0x22, 0x7AA, 0x88 },
2383 { 0x22, 0x7AB, 0xDC },
2384 { 0x22, 0x7AC, 0x1A },
2385 { 0x22, 0x7AD, 0x80 },
2386 { 0x22, 0x7A6, 0x82 },
2387 { 0x22, 0x7A7, 0xEE },
2388 { 0x22, 0x7A8, 0x46 },
2389 { 0x22, 0x7A9, 0x82 },
2390 { 0x22, 0x7AA, 0xEE },
2391 { 0x22, 0x7AB, 0x46 },
2392 { 0x22, 0x7AC, 0x1B },
2393 { 0x22, 0x7AD, 0x80 },
2394 { 0x22, 0x7A6, 0x3E },
2395 { 0x22, 0x7A7, 0x88 },
2396 { 0x22, 0x7A8, 0xDC },
2397 { 0x22, 0x7A9, 0x3E },
2398 { 0x22, 0x7AA, 0x88 },
2399 { 0x22, 0x7AB, 0xDC },
2400 { 0x22, 0x7AC, 0x1C },
2401 { 0x22, 0x7AD, 0x80 },
2402 { 0x22, 0x7A6, 0x7D },
2403 { 0x22, 0x7A7, 0x09 },
2404 { 0x22, 0x7A8, 0x28 },
2405 { 0x22, 0x7A9, 0x7D },
2406 { 0x22, 0x7AA, 0x09 },
2407 { 0x22, 0x7AB, 0x28 },
2408 { 0x22, 0x7AC, 0x1D },
2409 { 0x22, 0x7AD, 0x80 },
2410 { 0x22, 0x7A6, 0xC2 },
2411 { 0x22, 0x7A7, 0xE5 },
2412 { 0x22, 0x7A8, 0xB4 },
2413 { 0x22, 0x7A9, 0xC2 },
2414 { 0x22, 0x7AA, 0xE5 },
2415 { 0x22, 0x7AB, 0xB4 },
2416 { 0x22, 0x7AC, 0x1E },
2417 { 0x22, 0x7AD, 0x80 },
2418 { 0x22, 0x7A6, 0x3E },
2419 { 0x22, 0x7A7, 0xA3 },
2420 { 0x22, 0x7A8, 0x1F },
2421 { 0x22, 0x7A9, 0x3E },
2422 { 0x22, 0x7AA, 0xA3 },
2423 { 0x22, 0x7AB, 0x1F },
2424 { 0x22, 0x7AC, 0x1F },
2425 { 0x22, 0x7AD, 0x80 },
2426 { 0x22, 0x7A6, 0x84 },
2427 { 0x22, 0x7A7, 0xCA },
2428 { 0x22, 0x7A8, 0xF1 },
2429 { 0x22, 0x7A9, 0x84 },
2430 { 0x22, 0x7AA, 0xCA },
2431 { 0x22, 0x7AB, 0xF1 },
2432 { 0x22, 0x7AC, 0x20 },
2433 { 0x22, 0x7AD, 0x80 },
2434 { 0x22, 0x7A6, 0x3C },
2435 { 0x22, 0x7A7, 0xD5 },
2436 { 0x22, 0x7A8, 0x9C },
2437 { 0x22, 0x7A9, 0x3C },
2438 { 0x22, 0x7AA, 0xD5 },
2439 { 0x22, 0x7AB, 0x9C },
2440 { 0x22, 0x7AC, 0x21 },
2441 { 0x22, 0x7AD, 0x80 },
2442 { 0x22, 0x7A6, 0x7B },
2443 { 0x22, 0x7A7, 0x35 },
2444 { 0x22, 0x7A8, 0x0F },
2445 { 0x22, 0x7A9, 0x7B },
2446 { 0x22, 0x7AA, 0x35 },
2447 { 0x22, 0x7AB, 0x0F },
2448 { 0x22, 0x7AC, 0x22 },
2449 { 0x22, 0x7AD, 0x80 },
2450 { 0x22, 0x7A6, 0xC4 },
2451 { 0x22, 0x7A7, 0x87 },
2452 { 0x22, 0x7A8, 0x45 },
2453 { 0x22, 0x7A9, 0xC4 },
2454 { 0x22, 0x7AA, 0x87 },
2455 { 0x22, 0x7AB, 0x45 },
2456 { 0x22, 0x7AC, 0x23 },
2457 { 0x22, 0x7AD, 0x80 },
2458 { 0x22, 0x7A6, 0x3E },
2459 { 0x22, 0x7A7, 0x0A },
2460 { 0x22, 0x7A8, 0x78 },
2461 { 0x22, 0x7A9, 0x3E },
2462 { 0x22, 0x7AA, 0x0A },
2463 { 0x22, 0x7AB, 0x78 },
2464 { 0x22, 0x7AC, 0x24 },
2465 { 0x22, 0x7AD, 0x80 },
2466 { 0x22, 0x7A6, 0x88 },
2467 { 0x22, 0x7A7, 0xE2 },
2468 { 0x22, 0x7A8, 0x05 },
2469 { 0x22, 0x7A9, 0x88 },
2470 { 0x22, 0x7AA, 0xE2 },
2471 { 0x22, 0x7AB, 0x05 },
2472 { 0x22, 0x7AC, 0x25 },
2473 { 0x22, 0x7AD, 0x80 },
2474 { 0x22, 0x7A6, 0x3A },
2475 { 0x22, 0x7A7, 0x1A },
2476 { 0x22, 0x7A8, 0xA3 },
2477 { 0x22, 0x7A9, 0x3A },
2478 { 0x22, 0x7AA, 0x1A },
2479 { 0x22, 0x7AB, 0xA3 },
2480 { 0x22, 0x7AC, 0x26 },
2481 { 0x22, 0x7AD, 0x80 },
2482 { 0x22, 0x7A6, 0x77 },
2483 { 0x22, 0x7A7, 0x1D },
2484 { 0x22, 0x7A8, 0xFB },
2485 { 0x22, 0x7A9, 0x77 },
2486 { 0x22, 0x7AA, 0x1D },
2487 { 0x22, 0x7AB, 0xFB },
2488 { 0x22, 0x7AC, 0x27 },
2489 { 0x22, 0x7AD, 0x80 },
2490 { 0x22, 0x7A6, 0xC7 },
2491 { 0x22, 0x7A7, 0xDA },
2492 { 0x22, 0x7A8, 0xE5 },
2493 { 0x22, 0x7A9, 0xC7 },
2494 { 0x22, 0x7AA, 0xDA },
2495 { 0x22, 0x7AB, 0xE5 },
2496 { 0x22, 0x7AC, 0x28 },
2497 { 0x22, 0x7AD, 0x80 },
2498 { 0x22, 0x7A6, 0x40 },
2499 { 0x22, 0x7A7, 0x00 },
2500 { 0x22, 0x7A8, 0x00 },
2501 { 0x22, 0x7A9, 0x40 },
2502 { 0x22, 0x7AA, 0x00 },
2503 { 0x22, 0x7AB, 0x00 },
2504 { 0x22, 0x7AC, 0x29 },
2505 { 0x22, 0x7AD, 0x80 },
2506 { 0x22, 0x7A6, 0x8E },
2507 { 0x22, 0x7A7, 0xD7 },
2508 { 0x22, 0x7A8, 0x22 },
2509 { 0x22, 0x7A9, 0x8E },
2510 { 0x22, 0x7AA, 0xD7 },
2511 { 0x22, 0x7AB, 0x22 },
2512 { 0x22, 0x7AC, 0x2A },
2513 { 0x22, 0x7AD, 0x80 },
2514 { 0x22, 0x7A6, 0x35 },
2515 { 0x22, 0x7A7, 0x26 },
2516 { 0x22, 0x7A8, 0xC6 },
2517 { 0x22, 0x7A9, 0x35 },
2518 { 0x22, 0x7AA, 0x26 },
2519 { 0x22, 0x7AB, 0xC6 },
2520 { 0x22, 0x7AC, 0x2B },
2521 { 0x22, 0x7AD, 0x80 },
2522 { 0x22, 0x7A6, 0x71 },
2523 { 0x22, 0x7A7, 0x28 },
2524 { 0x22, 0x7A8, 0xDE },
2525 { 0x22, 0x7A9, 0x71 },
2526 { 0x22, 0x7AA, 0x28 },
2527 { 0x22, 0x7AB, 0xDE },
2528 { 0x22, 0x7AC, 0x2C },
2529 { 0x22, 0x7AD, 0x80 },
2530 { 0x22, 0x7A6, 0xCA },
2531 { 0x22, 0x7A7, 0xD9 },
2532 { 0x22, 0x7A8, 0x3A },
2533 { 0x22, 0x7A9, 0xCA },
2534 { 0x22, 0x7AA, 0xD9 },
2535 { 0x22, 0x7AB, 0x3A },
2536 { 0x22, 0x7AC, 0x2D },
2537 { 0x22, 0x7AD, 0x80 },
2538 { 0x22, 0x7A6, 0x40 },
2539 { 0x22, 0x7A7, 0x00 },
2540 { 0x22, 0x7A8, 0x00 },
2541 { 0x22, 0x7A9, 0x40 },
2542 { 0x22, 0x7AA, 0x00 },
2543 { 0x22, 0x7AB, 0x00 },
2544 { 0x22, 0x7AC, 0x2E },
2545 { 0x22, 0x7AD, 0x80 },
2546 { 0x22, 0x7A6, 0x93 },
2547 { 0x22, 0x7A7, 0x5E },
2548 { 0x22, 0x7A8, 0xD8 },
2549 { 0x22, 0x7A9, 0x93 },
2550 { 0x22, 0x7AA, 0x5E },
2551 { 0x22, 0x7AB, 0xD8 },
2552 { 0x22, 0x7AC, 0x2F },
2553 { 0x22, 0x7AD, 0x80 },
2554 { 0x22, 0x7A6, 0x32 },
2555 { 0x22, 0x7A7, 0xB7 },
2556 { 0x22, 0x7A8, 0xB1 },
2557 { 0x22, 0x7A9, 0x32 },
2558 { 0x22, 0x7AA, 0xB7 },
2559 { 0x22, 0x7AB, 0xB1 },
2560 { 0x22, 0x7AC, 0x30 },
2561 { 0x22, 0x7AD, 0x80 },
2562 { 0x22, 0x7A6, 0x6C },
2563 { 0x22, 0x7A7, 0xA1 },
2564 { 0x22, 0x7A8, 0x28 },
2565 { 0x22, 0x7A9, 0x6C },
2566 { 0x22, 0x7AA, 0xA1 },
2567 { 0x22, 0x7AB, 0x28 },
2568 { 0x22, 0x7AC, 0x31 },
2569 { 0x22, 0x7AD, 0x80 },
2570 { 0x22, 0x7A6, 0xCD },
2571 { 0x22, 0x7A7, 0x48 },
2572 { 0x22, 0x7A8, 0x4F },
2573 { 0x22, 0x7A9, 0xCD },
2574 { 0x22, 0x7AA, 0x48 },
2575 { 0x22, 0x7AB, 0x4F },
2576 { 0x22, 0x7AC, 0x32 },
2577 { 0x22, 0x7AD, 0x80 },
2578 { 0x22, 0x7A6, 0x40 },
2579 { 0x22, 0x7A7, 0x00 },
2580 { 0x22, 0x7A8, 0x00 },
2581 { 0x22, 0x7A9, 0x40 },
2582 { 0x22, 0x7AA, 0x00 },
2583 { 0x22, 0x7AB, 0x00 },
2584 { 0x22, 0x7AC, 0x33 },
2585 { 0x22, 0x7AD, 0x80 },
2586 /* common */
2587 { 0x22, 0x782, 0xC1 },
2588 { 0x22, 0x771, 0x2C },
2589 { 0x22, 0x772, 0x2C },
2590 { 0x22, 0x788, 0x04 },
2591 { 0x01, 0x7B0, 0x08 },
2592 {}
2593 };
2594
2595 static const struct hda_fixup stac92hd83xxx_fixups[] = {
2596 [STAC_92HD83XXX_REF] = {
2597 .type = HDA_FIXUP_PINS,
2598 .v.pins = ref92hd83xxx_pin_configs,
2599 },
2600 [STAC_92HD83XXX_PWR_REF] = {
2601 .type = HDA_FIXUP_PINS,
2602 .v.pins = ref92hd83xxx_pin_configs,
2603 },
2604 [STAC_DELL_S14] = {
2605 .type = HDA_FIXUP_PINS,
2606 .v.pins = dell_s14_pin_configs,
2607 },
2608 [STAC_DELL_VOSTRO_3500] = {
2609 .type = HDA_FIXUP_PINS,
2610 .v.pins = dell_vostro_3500_pin_configs,
2611 },
2612 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2613 .type = HDA_FIXUP_PINS,
2614 .v.pins = hp_cNB11_intquad_pin_configs,
2615 .chained = true,
2616 .chain_id = STAC_92HD83XXX_HP,
2617 },
2618 [STAC_92HD83XXX_HP] = {
2619 .type = HDA_FIXUP_FUNC,
2620 .v.func = stac92hd83xxx_fixup_hp,
2621 },
2622 [STAC_HP_DV7_4000] = {
2623 .type = HDA_FIXUP_PINS,
2624 .v.pins = hp_dv7_4000_pin_configs,
2625 .chained = true,
2626 .chain_id = STAC_92HD83XXX_HP,
2627 },
2628 [STAC_HP_ZEPHYR] = {
2629 .type = HDA_FIXUP_FUNC,
2630 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2631 .chained = true,
2632 .chain_id = STAC_92HD83XXX_HP,
2633 },
2634 [STAC_92HD83XXX_HP_LED] = {
2635 .type = HDA_FIXUP_FUNC,
2636 .v.func = stac92hd83xxx_fixup_hp_led,
2637 .chained = true,
2638 .chain_id = STAC_92HD83XXX_HP,
2639 },
2640 [STAC_92HD83XXX_HP_INV_LED] = {
2641 .type = HDA_FIXUP_FUNC,
2642 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2643 .chained = true,
2644 .chain_id = STAC_92HD83XXX_HP,
2645 },
2646 [STAC_92HD83XXX_HP_MIC_LED] = {
2647 .type = HDA_FIXUP_FUNC,
2648 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2649 .chained = true,
2650 .chain_id = STAC_92HD83XXX_HP,
2651 },
2652 [STAC_HP_LED_GPIO10] = {
2653 .type = HDA_FIXUP_FUNC,
2654 .v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2655 .chained = true,
2656 .chain_id = STAC_92HD83XXX_HP,
2657 },
2658 [STAC_92HD83XXX_HEADSET_JACK] = {
2659 .type = HDA_FIXUP_FUNC,
2660 .v.func = stac92hd83xxx_fixup_headset_jack,
2661 },
2662 [STAC_HP_ENVY_BASS] = {
2663 .type = HDA_FIXUP_PINS,
2664 .v.pins = (const struct hda_pintbl[]) {
2665 { 0x0f, 0x90170111 },
2666 {}
2667 },
2668 },
2669 [STAC_HP_BNB13_EQ] = {
2670 .type = HDA_FIXUP_VERBS,
2671 .v.verbs = hp_bnb13_eq_verbs,
2672 .chained = true,
2673 .chain_id = STAC_92HD83XXX_HP_MIC_LED,
2674 },
2675 };
2676
2677 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2678 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2679 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2680 { .id = STAC_DELL_S14, .name = "dell-s14" },
2681 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2682 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2683 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2684 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2685 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2686 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2687 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2688 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2689 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2690 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2691 {}
2692 };
2693
2694 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2695 /* SigmaTel reference board */
2696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2697 "DFI LanParty", STAC_92HD83XXX_REF),
2698 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2699 "DFI LanParty", STAC_92HD83XXX_REF),
2700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2701 "unknown Dell", STAC_DELL_S14),
2702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2703 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2705 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2707 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2709 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2711 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2713 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2715 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2717 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2718 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2719 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2720 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2721 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2722 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2723 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2724 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2725 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2726 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2727 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2728 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2729 "HP Pavilion dv7", STAC_HP_DV7_4000),
2730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2731 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2733 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2735 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2736 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2737 "HP Folio 13", STAC_HP_LED_GPIO10),
2738 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2739 "HP Folio", STAC_HP_BNB13_EQ),
2740 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2741 "HP bNB13", STAC_HP_BNB13_EQ),
2742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2743 "HP bNB13", STAC_HP_BNB13_EQ),
2744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2745 "HP bNB13", STAC_HP_BNB13_EQ),
2746 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2747 "HP bNB13", STAC_HP_BNB13_EQ),
2748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2749 "HP bNB13", STAC_HP_BNB13_EQ),
2750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2751 "HP bNB13", STAC_HP_BNB13_EQ),
2752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2753 "HP bNB13", STAC_HP_BNB13_EQ),
2754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2755 "HP bNB13", STAC_HP_BNB13_EQ),
2756 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2757 "HP bNB13", STAC_HP_BNB13_EQ),
2758 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2759 "HP bNB13", STAC_HP_BNB13_EQ),
2760 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2761 "HP bNB13", STAC_HP_BNB13_EQ),
2762 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2763 "HP bNB13", STAC_HP_BNB13_EQ),
2764 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2765 "HP bNB13", STAC_HP_BNB13_EQ),
2766 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2767 "HP bNB13", STAC_HP_BNB13_EQ),
2768 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2769 "HP bNB13", STAC_HP_BNB13_EQ),
2770 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2771 "HP bNB13", STAC_HP_BNB13_EQ),
2772 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2773 "HP bNB13", STAC_HP_BNB13_EQ),
2774 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2775 "HP bNB13", STAC_HP_BNB13_EQ),
2776 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2777 "HP bNB13", STAC_HP_BNB13_EQ),
2778 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2779 "HP bNB13", STAC_HP_BNB13_EQ),
2780 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2781 "HP bNB13", STAC_HP_BNB13_EQ),
2782 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2783 "HP bNB13", STAC_HP_BNB13_EQ),
2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2785 "HP bNB13", STAC_HP_BNB13_EQ),
2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2787 "HP bNB13", STAC_HP_BNB13_EQ),
2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2789 "HP bNB13", STAC_HP_BNB13_EQ),
2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2791 "HP bNB13", STAC_HP_BNB13_EQ),
2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2793 "HP bNB13", STAC_HP_BNB13_EQ),
2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2795 "HP bNB13", STAC_HP_BNB13_EQ),
2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2797 "HP bNB13", STAC_HP_BNB13_EQ),
2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2799 "HP bNB13", STAC_HP_BNB13_EQ),
2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2801 "HP bNB13", STAC_HP_BNB13_EQ),
2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2803 "HP bNB13", STAC_HP_BNB13_EQ),
2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2805 "HP bNB13", STAC_HP_BNB13_EQ),
2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2807 "HP bNB13", STAC_HP_BNB13_EQ),
2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2809 "HP bNB13", STAC_HP_BNB13_EQ),
2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2811 "HP bNB13", STAC_HP_BNB13_EQ),
2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2813 "HP bNB13", STAC_HP_BNB13_EQ),
2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2815 "HP bNB13", STAC_HP_BNB13_EQ),
2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2817 "HP bNB13", STAC_HP_BNB13_EQ),
2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2819 "HP bNB13", STAC_HP_BNB13_EQ),
2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2821 "HP bNB13", STAC_HP_BNB13_EQ),
2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2823 "HP bNB13", STAC_HP_BNB13_EQ),
2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2825 "HP bNB13", STAC_HP_BNB13_EQ),
2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2827 "HP bNB13", STAC_HP_BNB13_EQ),
2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2829 "HP bNB13", STAC_HP_BNB13_EQ),
2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2831 "HP bNB13", STAC_HP_BNB13_EQ),
2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2833 "HP bNB13", STAC_HP_BNB13_EQ),
2834 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2835 "HP", STAC_92HD83XXX_HP_MIC_LED),
2836 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2837 "HP", STAC_92HD83XXX_HP_MIC_LED),
2838 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2839 "HP", STAC_92HD83XXX_HP_MIC_LED),
2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2841 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2843 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2845 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2847 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2849 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2851 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2853 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2855 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2857 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2859 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2861 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2863 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2865 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2867 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2869 "HP", STAC_HP_ZEPHYR),
2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2871 "HP Mini", STAC_92HD83XXX_HP_LED),
2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2873 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2875 "HP Mini", STAC_92HD83XXX_HP_LED),
2876 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2877 {} /* terminator */
2878 };
2879
2880 /* HP dv7 bass switch - GPIO5 */
2881 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2882 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2883 struct snd_ctl_elem_value *ucontrol)
2884 {
2885 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2886 struct sigmatel_spec *spec = codec->spec;
2887 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2888 return 0;
2889 }
2890
2891 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2892 struct snd_ctl_elem_value *ucontrol)
2893 {
2894 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2895 struct sigmatel_spec *spec = codec->spec;
2896 unsigned int gpio_data;
2897
2898 gpio_data = (spec->gpio_data & ~0x20) |
2899 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2900 if (gpio_data == spec->gpio_data)
2901 return 0;
2902 spec->gpio_data = gpio_data;
2903 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2904 return 1;
2905 }
2906
2907 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2908 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2909 .info = stac_hp_bass_gpio_info,
2910 .get = stac_hp_bass_gpio_get,
2911 .put = stac_hp_bass_gpio_put,
2912 };
2913
2914 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2915 {
2916 struct sigmatel_spec *spec = codec->spec;
2917
2918 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2919 &stac_hp_bass_sw_ctrl))
2920 return -ENOMEM;
2921
2922 spec->gpio_mask |= 0x20;
2923 spec->gpio_dir |= 0x20;
2924 spec->gpio_data |= 0x20;
2925 return 0;
2926 }
2927
2928 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2929 { 0x0a, 0x02214030 },
2930 { 0x0b, 0x02a19040 },
2931 { 0x0c, 0x01a19020 },
2932 { 0x0d, 0x01014010 },
2933 { 0x0e, 0x0181302e },
2934 { 0x0f, 0x01014010 },
2935 { 0x14, 0x01019020 },
2936 { 0x18, 0x90a000f0 },
2937 { 0x19, 0x90a000f0 },
2938 { 0x1e, 0x01452050 },
2939 { 0x1f, 0x01452050 },
2940 {}
2941 };
2942
2943 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2944 { 0x0a, 0x0421101f },
2945 { 0x0b, 0x04a11221 },
2946 { 0x0c, 0x40f000f0 },
2947 { 0x0d, 0x90170110 },
2948 { 0x0e, 0x23a1902e },
2949 { 0x0f, 0x23014250 },
2950 { 0x14, 0x40f000f0 },
2951 { 0x18, 0x90a000f0 },
2952 { 0x19, 0x40f000f0 },
2953 { 0x1e, 0x4f0000f0 },
2954 { 0x1f, 0x4f0000f0 },
2955 {}
2956 };
2957
2958 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2959 { 0x0a, 0x0421101f },
2960 { 0x0b, 0x04a11221 },
2961 { 0x0c, 0x90a70330 },
2962 { 0x0d, 0x90170110 },
2963 { 0x0e, 0x23a1902e },
2964 { 0x0f, 0x23014250 },
2965 { 0x14, 0x40f000f0 },
2966 { 0x18, 0x40f000f0 },
2967 { 0x19, 0x40f000f0 },
2968 { 0x1e, 0x044413b0 },
2969 { 0x1f, 0x044413b0 },
2970 {}
2971 };
2972
2973 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2974 { 0x0a, 0x0421101f },
2975 { 0x0b, 0x04a11221 },
2976 { 0x0c, 0x90a70330 },
2977 { 0x0d, 0x90170110 },
2978 { 0x0e, 0x40f000f0 },
2979 { 0x0f, 0x40f000f0 },
2980 { 0x14, 0x40f000f0 },
2981 { 0x18, 0x90a000f0 },
2982 { 0x19, 0x40f000f0 },
2983 { 0x1e, 0x044413b0 },
2984 { 0x1f, 0x044413b0 },
2985 {}
2986 };
2987
2988 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2989 const struct hda_fixup *fix, int action)
2990 {
2991 struct sigmatel_spec *spec = codec->spec;
2992
2993 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2994 return;
2995
2996 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2997 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2998 }
2999
3000 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3001 const struct hda_fixup *fix, int action)
3002 {
3003 struct sigmatel_spec *spec = codec->spec;
3004 struct hda_jack_tbl *jack;
3005
3006 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3007 return;
3008
3009 /* Enable VREF power saving on GPIO1 detect */
3010 snd_hda_codec_write_cache(codec, codec->afg, 0,
3011 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3012 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3013 STAC_VREF_EVENT,
3014 stac_vref_event);
3015 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3016 if (jack)
3017 jack->private_data = 0x02;
3018
3019 spec->gpio_mask |= 0x02;
3020
3021 /* enable internal microphone */
3022 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3023 }
3024
3025 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3026 const struct hda_fixup *fix, int action)
3027 {
3028 struct sigmatel_spec *spec = codec->spec;
3029
3030 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3031 return;
3032 spec->gpio_led = 0x01;
3033 }
3034
3035 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3036 const struct hda_fixup *fix, int action)
3037 {
3038 unsigned int cap;
3039
3040 switch (action) {
3041 case HDA_FIXUP_ACT_PRE_PROBE:
3042 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3043 break;
3044
3045 case HDA_FIXUP_ACT_PROBE:
3046 /* enable bass on HP dv7 */
3047 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3048 cap &= AC_GPIO_IO_COUNT;
3049 if (cap >= 6)
3050 stac_add_hp_bass_switch(codec);
3051 break;
3052 }
3053 }
3054
3055 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3056 const struct hda_fixup *fix, int action)
3057 {
3058 struct sigmatel_spec *spec = codec->spec;
3059
3060 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3061 return;
3062 spec->gpio_led = 0x08;
3063 }
3064
3065
3066 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3067 const struct hda_fixup *fix, int action)
3068 {
3069 struct sigmatel_spec *spec = codec->spec;
3070
3071 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3072 return;
3073
3074 if (hp_blike_system(codec->subsystem_id)) {
3075 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
3076 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3077 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
3078 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
3079 /* It was changed in the BIOS to just satisfy MS DTM.
3080 * Lets turn it back into slaved HP
3081 */
3082 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
3083 | (AC_JACK_HP_OUT <<
3084 AC_DEFCFG_DEVICE_SHIFT);
3085 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
3086 | AC_DEFCFG_SEQUENCE)))
3087 | 0x1f;
3088 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
3089 }
3090 }
3091
3092 if (find_mute_led_cfg(codec, 1))
3093 snd_printd("mute LED gpio %d polarity %d\n",
3094 spec->gpio_led,
3095 spec->gpio_led_polarity);
3096
3097 }
3098
3099 static const struct hda_fixup stac92hd71bxx_fixups[] = {
3100 [STAC_92HD71BXX_REF] = {
3101 .type = HDA_FIXUP_FUNC,
3102 .v.func = stac92hd71bxx_fixup_ref,
3103 },
3104 [STAC_DELL_M4_1] = {
3105 .type = HDA_FIXUP_PINS,
3106 .v.pins = dell_m4_1_pin_configs,
3107 },
3108 [STAC_DELL_M4_2] = {
3109 .type = HDA_FIXUP_PINS,
3110 .v.pins = dell_m4_2_pin_configs,
3111 },
3112 [STAC_DELL_M4_3] = {
3113 .type = HDA_FIXUP_PINS,
3114 .v.pins = dell_m4_3_pin_configs,
3115 },
3116 [STAC_HP_M4] = {
3117 .type = HDA_FIXUP_FUNC,
3118 .v.func = stac92hd71bxx_fixup_hp_m4,
3119 .chained = true,
3120 .chain_id = STAC_92HD71BXX_HP,
3121 },
3122 [STAC_HP_DV4] = {
3123 .type = HDA_FIXUP_FUNC,
3124 .v.func = stac92hd71bxx_fixup_hp_dv4,
3125 .chained = true,
3126 .chain_id = STAC_HP_DV5,
3127 },
3128 [STAC_HP_DV5] = {
3129 .type = HDA_FIXUP_FUNC,
3130 .v.func = stac92hd71bxx_fixup_hp_dv5,
3131 .chained = true,
3132 .chain_id = STAC_92HD71BXX_HP,
3133 },
3134 [STAC_HP_HDX] = {
3135 .type = HDA_FIXUP_FUNC,
3136 .v.func = stac92hd71bxx_fixup_hp_hdx,
3137 .chained = true,
3138 .chain_id = STAC_92HD71BXX_HP,
3139 },
3140 [STAC_92HD71BXX_HP] = {
3141 .type = HDA_FIXUP_FUNC,
3142 .v.func = stac92hd71bxx_fixup_hp,
3143 },
3144 };
3145
3146 static const struct hda_model_fixup stac92hd71bxx_models[] = {
3147 { .id = STAC_92HD71BXX_REF, .name = "ref" },
3148 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3149 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3150 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3151 { .id = STAC_HP_M4, .name = "hp-m4" },
3152 { .id = STAC_HP_DV4, .name = "hp-dv4" },
3153 { .id = STAC_HP_DV5, .name = "hp-dv5" },
3154 { .id = STAC_HP_HDX, .name = "hp-hdx" },
3155 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3156 {}
3157 };
3158
3159 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3160 /* SigmaTel reference board */
3161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3162 "DFI LanParty", STAC_92HD71BXX_REF),
3163 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3164 "DFI LanParty", STAC_92HD71BXX_REF),
3165 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3166 "HP", STAC_HP_DV5),
3167 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3168 "HP", STAC_HP_DV5),
3169 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3170 "HP dv4-7", STAC_HP_DV4),
3171 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3172 "HP dv4-7", STAC_HP_DV5),
3173 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3174 "HP HDX", STAC_HP_HDX), /* HDX18 */
3175 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3176 "HP mini 1000", STAC_HP_M4),
3177 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3178 "HP HDX", STAC_HP_HDX), /* HDX16 */
3179 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3180 "HP dv6", STAC_HP_DV5),
3181 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3182 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3183 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3184 "HP DV6", STAC_HP_DV5),
3185 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3186 "HP", STAC_HP_DV5),
3187 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3189 "unknown Dell", STAC_DELL_M4_1),
3190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3191 "unknown Dell", STAC_DELL_M4_1),
3192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3193 "unknown Dell", STAC_DELL_M4_1),
3194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3195 "unknown Dell", STAC_DELL_M4_1),
3196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3197 "unknown Dell", STAC_DELL_M4_1),
3198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3199 "unknown Dell", STAC_DELL_M4_1),
3200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3201 "unknown Dell", STAC_DELL_M4_1),
3202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3203 "unknown Dell", STAC_DELL_M4_2),
3204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3205 "unknown Dell", STAC_DELL_M4_2),
3206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3207 "unknown Dell", STAC_DELL_M4_2),
3208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3209 "unknown Dell", STAC_DELL_M4_2),
3210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3211 "unknown Dell", STAC_DELL_M4_3),
3212 {} /* terminator */
3213 };
3214
3215 static const struct hda_pintbl ref922x_pin_configs[] = {
3216 { 0x0a, 0x01014010 },
3217 { 0x0b, 0x01016011 },
3218 { 0x0c, 0x01012012 },
3219 { 0x0d, 0x0221401f },
3220 { 0x0e, 0x01813122 },
3221 { 0x0f, 0x01011014 },
3222 { 0x10, 0x01441030 },
3223 { 0x11, 0x01c41030 },
3224 { 0x15, 0x40000100 },
3225 { 0x1b, 0x40000100 },
3226 {}
3227 };
3228
3229 /*
3230 STAC 922X pin configs for
3231 102801A7
3232 102801AB
3233 102801A9
3234 102801D1
3235 102801D2
3236 */
3237 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3238 { 0x0a, 0x02214030 },
3239 { 0x0b, 0x01a19021 },
3240 { 0x0c, 0x01111012 },
3241 { 0x0d, 0x01114010 },
3242 { 0x0e, 0x02a19020 },
3243 { 0x0f, 0x01117011 },
3244 { 0x10, 0x400001f0 },
3245 { 0x11, 0x400001f1 },
3246 { 0x15, 0x01813122 },
3247 { 0x1b, 0x400001f2 },
3248 {}
3249 };
3250
3251 /*
3252 STAC 922X pin configs for
3253 102801AC
3254 102801D0
3255 */
3256 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3257 { 0x0a, 0x02214030 },
3258 { 0x0b, 0x01a19021 },
3259 { 0x0c, 0x01111012 },
3260 { 0x0d, 0x01114010 },
3261 { 0x0e, 0x02a19020 },
3262 { 0x0f, 0x01117011 },
3263 { 0x10, 0x01451140 },
3264 { 0x11, 0x400001f0 },
3265 { 0x15, 0x01813122 },
3266 { 0x1b, 0x400001f1 },
3267 {}
3268 };
3269
3270 /*
3271 STAC 922X pin configs for
3272 102801BF
3273 */
3274 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3275 { 0x0a, 0x0321101f },
3276 { 0x0b, 0x01112024 },
3277 { 0x0c, 0x01111222 },
3278 { 0x0d, 0x91174220 },
3279 { 0x0e, 0x03a11050 },
3280 { 0x0f, 0x01116221 },
3281 { 0x10, 0x90a70330 },
3282 { 0x11, 0x01452340 },
3283 { 0x15, 0x40C003f1 },
3284 { 0x1b, 0x405003f0 },
3285 {}
3286 };
3287
3288 /*
3289 STAC 9221 A1 pin configs for
3290 102801D7 (Dell XPS M1210)
3291 */
3292 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3293 { 0x0a, 0x02211211 },
3294 { 0x0b, 0x408103ff },
3295 { 0x0c, 0x02a1123e },
3296 { 0x0d, 0x90100310 },
3297 { 0x0e, 0x408003f1 },
3298 { 0x0f, 0x0221121f },
3299 { 0x10, 0x03451340 },
3300 { 0x11, 0x40c003f2 },
3301 { 0x15, 0x508003f3 },
3302 { 0x1b, 0x405003f4 },
3303 {}
3304 };
3305
3306 static const struct hda_pintbl d945gtp3_pin_configs[] = {
3307 { 0x0a, 0x0221401f },
3308 { 0x0b, 0x01a19022 },
3309 { 0x0c, 0x01813021 },
3310 { 0x0d, 0x01014010 },
3311 { 0x0e, 0x40000100 },
3312 { 0x0f, 0x40000100 },
3313 { 0x10, 0x40000100 },
3314 { 0x11, 0x40000100 },
3315 { 0x15, 0x02a19120 },
3316 { 0x1b, 0x40000100 },
3317 {}
3318 };
3319
3320 static const struct hda_pintbl d945gtp5_pin_configs[] = {
3321 { 0x0a, 0x0221401f },
3322 { 0x0b, 0x01011012 },
3323 { 0x0c, 0x01813024 },
3324 { 0x0d, 0x01014010 },
3325 { 0x0e, 0x01a19021 },
3326 { 0x0f, 0x01016011 },
3327 { 0x10, 0x01452130 },
3328 { 0x11, 0x40000100 },
3329 { 0x15, 0x02a19320 },
3330 { 0x1b, 0x40000100 },
3331 {}
3332 };
3333
3334 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3335 { 0x0a, 0x0121e21f },
3336 { 0x0b, 0x400000ff },
3337 { 0x0c, 0x9017e110 },
3338 { 0x0d, 0x400000fd },
3339 { 0x0e, 0x400000fe },
3340 { 0x0f, 0x0181e020 },
3341 { 0x10, 0x1145e030 },
3342 { 0x11, 0x11c5e240 },
3343 { 0x15, 0x400000fc },
3344 { 0x1b, 0x400000fb },
3345 {}
3346 };
3347
3348 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3349 { 0x0a, 0x0121e21f },
3350 { 0x0b, 0x90a7012e },
3351 { 0x0c, 0x9017e110 },
3352 { 0x0d, 0x400000fd },
3353 { 0x0e, 0x400000fe },
3354 { 0x0f, 0x0181e020 },
3355 { 0x10, 0x1145e230 },
3356 { 0x11, 0x500000fa },
3357 { 0x15, 0x400000fc },
3358 { 0x1b, 0x400000fb },
3359 {}
3360 };
3361
3362 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3363 { 0x0a, 0x0121e21f },
3364 { 0x0b, 0x90a7012e },
3365 { 0x0c, 0x9017e110 },
3366 { 0x0d, 0x400000fd },
3367 { 0x0e, 0x400000fe },
3368 { 0x0f, 0x0181e020 },
3369 { 0x10, 0x1145e230 },
3370 { 0x11, 0x11c5e240 },
3371 { 0x15, 0x400000fc },
3372 { 0x1b, 0x400000fb },
3373 {}
3374 };
3375
3376 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3377 { 0x0a, 0x0321e21f },
3378 { 0x0b, 0x03a1e02e },
3379 { 0x0c, 0x9017e110 },
3380 { 0x0d, 0x9017e11f },
3381 { 0x0e, 0x400000fe },
3382 { 0x0f, 0x0381e020 },
3383 { 0x10, 0x1345e230 },
3384 { 0x11, 0x13c5e240 },
3385 { 0x15, 0x400000fc },
3386 { 0x1b, 0x400000fb },
3387 {}
3388 };
3389
3390 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3391 { 0x0a, 0x0321e21f },
3392 { 0x0b, 0x03a1e02e },
3393 { 0x0c, 0x9017e110 },
3394 { 0x0d, 0x9017e11f },
3395 { 0x0e, 0x400000fe },
3396 { 0x0f, 0x0381e020 },
3397 { 0x10, 0x1345e230 },
3398 { 0x11, 0x13c5e240 },
3399 { 0x15, 0x400000fc },
3400 { 0x1b, 0x400000fb },
3401 {}
3402 };
3403
3404 static const struct hda_pintbl ecs202_pin_configs[] = {
3405 { 0x0a, 0x0221401f },
3406 { 0x0b, 0x02a19020 },
3407 { 0x0c, 0x01a19020 },
3408 { 0x0d, 0x01114010 },
3409 { 0x0e, 0x408000f0 },
3410 { 0x0f, 0x01813022 },
3411 { 0x10, 0x074510a0 },
3412 { 0x11, 0x40c400f1 },
3413 { 0x15, 0x9037012e },
3414 { 0x1b, 0x40e000f2 },
3415 {}
3416 };
3417
3418 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3419 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3420 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3421 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3422 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3423 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3424 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3425 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3426 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3427 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3428 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3429 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3430 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3431 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3432 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3433 {}
3434 };
3435
3436 static const struct hda_fixup stac922x_fixups[];
3437
3438 /* remap the fixup from codec SSID and apply it */
3439 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3440 const struct hda_fixup *fix,
3441 int action)
3442 {
3443 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3444 return;
3445 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3446 stac922x_fixups);
3447 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
3448 snd_hda_apply_fixup(codec, action);
3449 }
3450
3451 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3452 const struct hda_fixup *fix,
3453 int action)
3454 {
3455 struct sigmatel_spec *spec = codec->spec;
3456
3457 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3458 spec->gpio_mask = spec->gpio_dir = 0x03;
3459 spec->gpio_data = 0x03;
3460 }
3461 }
3462
3463 static const struct hda_fixup stac922x_fixups[] = {
3464 [STAC_D945_REF] = {
3465 .type = HDA_FIXUP_PINS,
3466 .v.pins = ref922x_pin_configs,
3467 },
3468 [STAC_D945GTP3] = {
3469 .type = HDA_FIXUP_PINS,
3470 .v.pins = d945gtp3_pin_configs,
3471 },
3472 [STAC_D945GTP5] = {
3473 .type = HDA_FIXUP_PINS,
3474 .v.pins = d945gtp5_pin_configs,
3475 },
3476 [STAC_INTEL_MAC_AUTO] = {
3477 .type = HDA_FIXUP_FUNC,
3478 .v.func = stac922x_fixup_intel_mac_auto,
3479 },
3480 [STAC_INTEL_MAC_V1] = {
3481 .type = HDA_FIXUP_PINS,
3482 .v.pins = intel_mac_v1_pin_configs,
3483 .chained = true,
3484 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3485 },
3486 [STAC_INTEL_MAC_V2] = {
3487 .type = HDA_FIXUP_PINS,
3488 .v.pins = intel_mac_v2_pin_configs,
3489 .chained = true,
3490 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3491 },
3492 [STAC_INTEL_MAC_V3] = {
3493 .type = HDA_FIXUP_PINS,
3494 .v.pins = intel_mac_v3_pin_configs,
3495 .chained = true,
3496 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3497 },
3498 [STAC_INTEL_MAC_V4] = {
3499 .type = HDA_FIXUP_PINS,
3500 .v.pins = intel_mac_v4_pin_configs,
3501 .chained = true,
3502 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3503 },
3504 [STAC_INTEL_MAC_V5] = {
3505 .type = HDA_FIXUP_PINS,
3506 .v.pins = intel_mac_v5_pin_configs,
3507 .chained = true,
3508 .chain_id = STAC_922X_INTEL_MAC_GPIO,
3509 },
3510 [STAC_922X_INTEL_MAC_GPIO] = {
3511 .type = HDA_FIXUP_FUNC,
3512 .v.func = stac922x_fixup_intel_mac_gpio,
3513 },
3514 [STAC_ECS_202] = {
3515 .type = HDA_FIXUP_PINS,
3516 .v.pins = ecs202_pin_configs,
3517 },
3518 [STAC_922X_DELL_D81] = {
3519 .type = HDA_FIXUP_PINS,
3520 .v.pins = dell_922x_d81_pin_configs,
3521 },
3522 [STAC_922X_DELL_D82] = {
3523 .type = HDA_FIXUP_PINS,
3524 .v.pins = dell_922x_d82_pin_configs,
3525 },
3526 [STAC_922X_DELL_M81] = {
3527 .type = HDA_FIXUP_PINS,
3528 .v.pins = dell_922x_m81_pin_configs,
3529 },
3530 [STAC_922X_DELL_M82] = {
3531 .type = HDA_FIXUP_PINS,
3532 .v.pins = dell_922x_m82_pin_configs,
3533 },
3534 };
3535
3536 static const struct hda_model_fixup stac922x_models[] = {
3537 { .id = STAC_D945_REF, .name = "ref" },
3538 { .id = STAC_D945GTP5, .name = "5stack" },
3539 { .id = STAC_D945GTP3, .name = "3stack" },
3540 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3541 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3542 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3543 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3544 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3545 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3546 { .id = STAC_ECS_202, .name = "ecs202" },
3547 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3548 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3549 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3550 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3551 /* for backward compatibility */
3552 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3553 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3554 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3555 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3556 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3557 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3558 {}
3559 };
3560
3561 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3562 /* SigmaTel reference board */
3563 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3564 "DFI LanParty", STAC_D945_REF),
3565 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3566 "DFI LanParty", STAC_D945_REF),
3567 /* Intel 945G based systems */
3568 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3569 "Intel D945G", STAC_D945GTP3),
3570 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3571 "Intel D945G", STAC_D945GTP3),
3572 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3573 "Intel D945G", STAC_D945GTP3),
3574 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3575 "Intel D945G", STAC_D945GTP3),
3576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3577 "Intel D945G", STAC_D945GTP3),
3578 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3579 "Intel D945G", STAC_D945GTP3),
3580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3581 "Intel D945G", STAC_D945GTP3),
3582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3583 "Intel D945G", STAC_D945GTP3),
3584 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3585 "Intel D945G", STAC_D945GTP3),
3586 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3587 "Intel D945G", STAC_D945GTP3),
3588 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3589 "Intel D945G", STAC_D945GTP3),
3590 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3591 "Intel D945G", STAC_D945GTP3),
3592 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3593 "Intel D945G", STAC_D945GTP3),
3594 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3595 "Intel D945G", STAC_D945GTP3),
3596 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3597 "Intel D945G", STAC_D945GTP3),
3598 /* Intel D945G 5-stack systems */
3599 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3600 "Intel D945G", STAC_D945GTP5),
3601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3602 "Intel D945G", STAC_D945GTP5),
3603 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3604 "Intel D945G", STAC_D945GTP5),
3605 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3606 "Intel D945G", STAC_D945GTP5),
3607 /* Intel 945P based systems */
3608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3609 "Intel D945P", STAC_D945GTP3),
3610 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3611 "Intel D945P", STAC_D945GTP3),
3612 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3613 "Intel D945P", STAC_D945GTP3),
3614 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3615 "Intel D945P", STAC_D945GTP3),
3616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3617 "Intel D945P", STAC_D945GTP3),
3618 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3619 "Intel D945P", STAC_D945GTP5),
3620 /* other intel */
3621 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3622 "Intel D945", STAC_D945_REF),
3623 /* other systems */
3624
3625 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3626 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3627
3628 /* Dell systems */
3629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3630 "unknown Dell", STAC_922X_DELL_D81),
3631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3632 "unknown Dell", STAC_922X_DELL_D81),
3633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3634 "unknown Dell", STAC_922X_DELL_D81),
3635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3636 "unknown Dell", STAC_922X_DELL_D82),
3637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3638 "unknown Dell", STAC_922X_DELL_M81),
3639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3640 "unknown Dell", STAC_922X_DELL_D82),
3641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3642 "unknown Dell", STAC_922X_DELL_D81),
3643 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3644 "unknown Dell", STAC_922X_DELL_D81),
3645 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3646 "Dell XPS M1210", STAC_922X_DELL_M82),
3647 /* ECS/PC Chips boards */
3648 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3649 "ECS/PC chips", STAC_ECS_202),
3650 {} /* terminator */
3651 };
3652
3653 static const struct hda_pintbl ref927x_pin_configs[] = {
3654 { 0x0a, 0x02214020 },
3655 { 0x0b, 0x02a19080 },
3656 { 0x0c, 0x0181304e },
3657 { 0x0d, 0x01014010 },
3658 { 0x0e, 0x01a19040 },
3659 { 0x0f, 0x01011012 },
3660 { 0x10, 0x01016011 },
3661 { 0x11, 0x0101201f },
3662 { 0x12, 0x183301f0 },
3663 { 0x13, 0x18a001f0 },
3664 { 0x14, 0x18a001f0 },
3665 { 0x21, 0x01442070 },
3666 { 0x22, 0x01c42190 },
3667 { 0x23, 0x40000100 },
3668 {}
3669 };
3670
3671 static const struct hda_pintbl d965_3st_pin_configs[] = {
3672 { 0x0a, 0x0221401f },
3673 { 0x0b, 0x02a19120 },
3674 { 0x0c, 0x40000100 },
3675 { 0x0d, 0x01014011 },
3676 { 0x0e, 0x01a19021 },
3677 { 0x0f, 0x01813024 },
3678 { 0x10, 0x40000100 },
3679 { 0x11, 0x40000100 },
3680 { 0x12, 0x40000100 },
3681 { 0x13, 0x40000100 },
3682 { 0x14, 0x40000100 },
3683 { 0x21, 0x40000100 },
3684 { 0x22, 0x40000100 },
3685 { 0x23, 0x40000100 },
3686 {}
3687 };
3688
3689 static const struct hda_pintbl d965_5st_pin_configs[] = {
3690 { 0x0a, 0x02214020 },
3691 { 0x0b, 0x02a19080 },
3692 { 0x0c, 0x0181304e },
3693 { 0x0d, 0x01014010 },
3694 { 0x0e, 0x01a19040 },
3695 { 0x0f, 0x01011012 },
3696 { 0x10, 0x01016011 },
3697 { 0x11, 0x40000100 },
3698 { 0x12, 0x40000100 },
3699 { 0x13, 0x40000100 },
3700 { 0x14, 0x40000100 },
3701 { 0x21, 0x01442070 },
3702 { 0x22, 0x40000100 },
3703 { 0x23, 0x40000100 },
3704 {}
3705 };
3706
3707 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3708 { 0x0a, 0x40000100 },
3709 { 0x0b, 0x40000100 },
3710 { 0x0c, 0x0181304e },
3711 { 0x0d, 0x01014010 },
3712 { 0x0e, 0x01a19040 },
3713 { 0x0f, 0x01011012 },
3714 { 0x10, 0x01016011 },
3715 { 0x11, 0x40000100 },
3716 { 0x12, 0x40000100 },
3717 { 0x13, 0x40000100 },
3718 { 0x14, 0x40000100 },
3719 { 0x21, 0x01442070 },
3720 { 0x22, 0x40000100 },
3721 { 0x23, 0x40000100 },
3722 {}
3723 };
3724
3725 static const struct hda_pintbl dell_3st_pin_configs[] = {
3726 { 0x0a, 0x02211230 },
3727 { 0x0b, 0x02a11220 },
3728 { 0x0c, 0x01a19040 },
3729 { 0x0d, 0x01114210 },
3730 { 0x0e, 0x01111212 },
3731 { 0x0f, 0x01116211 },
3732 { 0x10, 0x01813050 },
3733 { 0x11, 0x01112214 },
3734 { 0x12, 0x403003fa },
3735 { 0x13, 0x90a60040 },
3736 { 0x14, 0x90a60040 },
3737 { 0x21, 0x404003fb },
3738 { 0x22, 0x40c003fc },
3739 { 0x23, 0x40000100 },
3740 {}
3741 };
3742
3743 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3744 const struct hda_fixup *fix, int action)
3745 {
3746 /* no jack detecion for ref-no-jd model */
3747 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3748 codec->no_jack_detect = 1;
3749 }
3750
3751 static void stac927x_fixup_ref(struct hda_codec *codec,
3752 const struct hda_fixup *fix, int action)
3753 {
3754 struct sigmatel_spec *spec = codec->spec;
3755
3756 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3757 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3758 spec->eapd_mask = spec->gpio_mask = 0;
3759 spec->gpio_dir = spec->gpio_data = 0;
3760 }
3761 }
3762
3763 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3764 const struct hda_fixup *fix, int action)
3765 {
3766 struct sigmatel_spec *spec = codec->spec;
3767
3768 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3769 return;
3770
3771 if (codec->subsystem_id != 0x1028022f) {
3772 /* GPIO2 High = Enable EAPD */
3773 spec->eapd_mask = spec->gpio_mask = 0x04;
3774 spec->gpio_dir = spec->gpio_data = 0x04;
3775 }
3776
3777 snd_hda_add_verbs(codec, dell_3st_core_init);
3778 spec->volknob_init = 1;
3779 }
3780
3781 static void stac927x_fixup_volknob(struct hda_codec *codec,
3782 const struct hda_fixup *fix, int action)
3783 {
3784 struct sigmatel_spec *spec = codec->spec;
3785
3786 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3787 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3788 spec->volknob_init = 1;
3789 }
3790 }
3791
3792 static const struct hda_fixup stac927x_fixups[] = {
3793 [STAC_D965_REF_NO_JD] = {
3794 .type = HDA_FIXUP_FUNC,
3795 .v.func = stac927x_fixup_ref_no_jd,
3796 .chained = true,
3797 .chain_id = STAC_D965_REF,
3798 },
3799 [STAC_D965_REF] = {
3800 .type = HDA_FIXUP_FUNC,
3801 .v.func = stac927x_fixup_ref,
3802 },
3803 [STAC_D965_3ST] = {
3804 .type = HDA_FIXUP_PINS,
3805 .v.pins = d965_3st_pin_configs,
3806 .chained = true,
3807 .chain_id = STAC_D965_VERBS,
3808 },
3809 [STAC_D965_5ST] = {
3810 .type = HDA_FIXUP_PINS,
3811 .v.pins = d965_5st_pin_configs,
3812 .chained = true,
3813 .chain_id = STAC_D965_VERBS,
3814 },
3815 [STAC_D965_VERBS] = {
3816 .type = HDA_FIXUP_VERBS,
3817 .v.verbs = d965_core_init,
3818 },
3819 [STAC_D965_5ST_NO_FP] = {
3820 .type = HDA_FIXUP_PINS,
3821 .v.pins = d965_5st_no_fp_pin_configs,
3822 },
3823 [STAC_DELL_3ST] = {
3824 .type = HDA_FIXUP_PINS,
3825 .v.pins = dell_3st_pin_configs,
3826 .chained = true,
3827 .chain_id = STAC_927X_DELL_DMIC,
3828 },
3829 [STAC_DELL_BIOS] = {
3830 .type = HDA_FIXUP_PINS,
3831 .v.pins = (const struct hda_pintbl[]) {
3832 /* correct the front output jack as a hp out */
3833 { 0x0f, 0x0221101f },
3834 /* correct the front input jack as a mic */
3835 { 0x0e, 0x02a79130 },
3836 {}
3837 },
3838 .chained = true,
3839 .chain_id = STAC_927X_DELL_DMIC,
3840 },
3841 [STAC_DELL_BIOS_AMIC] = {
3842 .type = HDA_FIXUP_PINS,
3843 .v.pins = (const struct hda_pintbl[]) {
3844 /* configure the analog microphone on some laptops */
3845 { 0x0c, 0x90a79130 },
3846 {}
3847 },
3848 .chained = true,
3849 .chain_id = STAC_DELL_BIOS,
3850 },
3851 [STAC_DELL_BIOS_SPDIF] = {
3852 .type = HDA_FIXUP_PINS,
3853 .v.pins = (const struct hda_pintbl[]) {
3854 /* correct the device field to SPDIF out */
3855 { 0x21, 0x01442070 },
3856 {}
3857 },
3858 .chained = true,
3859 .chain_id = STAC_DELL_BIOS,
3860 },
3861 [STAC_927X_DELL_DMIC] = {
3862 .type = HDA_FIXUP_FUNC,
3863 .v.func = stac927x_fixup_dell_dmic,
3864 },
3865 [STAC_927X_VOLKNOB] = {
3866 .type = HDA_FIXUP_FUNC,
3867 .v.func = stac927x_fixup_volknob,
3868 },
3869 };
3870
3871 static const struct hda_model_fixup stac927x_models[] = {
3872 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3873 { .id = STAC_D965_REF, .name = "ref" },
3874 { .id = STAC_D965_3ST, .name = "3stack" },
3875 { .id = STAC_D965_5ST, .name = "5stack" },
3876 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3877 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3878 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3879 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3880 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3881 {}
3882 };
3883
3884 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3885 /* SigmaTel reference board */
3886 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3887 "DFI LanParty", STAC_D965_REF),
3888 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3889 "DFI LanParty", STAC_D965_REF),
3890 /* Intel 946 based systems */
3891 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3893 /* 965 based 3 stack systems */
3894 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3895 "Intel D965", STAC_D965_3ST),
3896 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3897 "Intel D965", STAC_D965_3ST),
3898 /* Dell 3 stack systems */
3899 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3900 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3901 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3902 /* Dell 3 stack systems with verb table in BIOS */
3903 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3904 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3905 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3906 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3907 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3908 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3909 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3910 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3911 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3912 /* 965 based 5 stack systems */
3913 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3914 "Intel D965", STAC_D965_5ST),
3915 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3916 "Intel D965", STAC_D965_5ST),
3917 /* volume-knob fixes */
3918 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3919 {} /* terminator */
3920 };
3921
3922 static const struct hda_pintbl ref9205_pin_configs[] = {
3923 { 0x0a, 0x40000100 },
3924 { 0x0b, 0x40000100 },
3925 { 0x0c, 0x01016011 },
3926 { 0x0d, 0x01014010 },
3927 { 0x0e, 0x01813122 },
3928 { 0x0f, 0x01a19021 },
3929 { 0x14, 0x01019020 },
3930 { 0x16, 0x40000100 },
3931 { 0x17, 0x90a000f0 },
3932 { 0x18, 0x90a000f0 },
3933 { 0x21, 0x01441030 },
3934 { 0x22, 0x01c41030 },
3935 {}
3936 };
3937
3938 /*
3939 STAC 9205 pin configs for
3940 102801F1
3941 102801F2
3942 102801FC
3943 102801FD
3944 10280204
3945 1028021F
3946 10280228 (Dell Vostro 1500)
3947 10280229 (Dell Vostro 1700)
3948 */
3949 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3950 { 0x0a, 0x0321101F },
3951 { 0x0b, 0x03A11020 },
3952 { 0x0c, 0x400003FA },
3953 { 0x0d, 0x90170310 },
3954 { 0x0e, 0x400003FB },
3955 { 0x0f, 0x400003FC },
3956 { 0x14, 0x400003FD },
3957 { 0x16, 0x40F000F9 },
3958 { 0x17, 0x90A60330 },
3959 { 0x18, 0x400003FF },
3960 { 0x21, 0x0144131F },
3961 { 0x22, 0x40C003FE },
3962 {}
3963 };
3964
3965 /*
3966 STAC 9205 pin configs for
3967 102801F9
3968 102801FA
3969 102801FE
3970 102801FF (Dell Precision M4300)
3971 10280206
3972 10280200
3973 10280201
3974 */
3975 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3976 { 0x0a, 0x0321101f },
3977 { 0x0b, 0x03a11020 },
3978 { 0x0c, 0x90a70330 },
3979 { 0x0d, 0x90170310 },
3980 { 0x0e, 0x400000fe },
3981 { 0x0f, 0x400000ff },
3982 { 0x14, 0x400000fd },
3983 { 0x16, 0x40f000f9 },
3984 { 0x17, 0x400000fa },
3985 { 0x18, 0x400000fc },
3986 { 0x21, 0x0144131f },
3987 { 0x22, 0x40c003f8 },
3988 /* Enable SPDIF in/out */
3989 { 0x1f, 0x01441030 },
3990 { 0x20, 0x1c410030 },
3991 {}
3992 };
3993
3994 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3995 { 0x0a, 0x0421101f },
3996 { 0x0b, 0x04a11020 },
3997 { 0x0c, 0x400003fa },
3998 { 0x0d, 0x90170310 },
3999 { 0x0e, 0x400003fb },
4000 { 0x0f, 0x400003fc },
4001 { 0x14, 0x400003fd },
4002 { 0x16, 0x400003f9 },
4003 { 0x17, 0x90a60330 },
4004 { 0x18, 0x400003ff },
4005 { 0x21, 0x01441340 },
4006 { 0x22, 0x40c003fe },
4007 {}
4008 };
4009
4010 static void stac9205_fixup_ref(struct hda_codec *codec,
4011 const struct hda_fixup *fix, int action)
4012 {
4013 struct sigmatel_spec *spec = codec->spec;
4014
4015 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4016 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4017 /* SPDIF-In enabled */
4018 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4019 }
4020 }
4021
4022 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4023 const struct hda_fixup *fix, int action)
4024 {
4025 struct sigmatel_spec *spec = codec->spec;
4026 struct hda_jack_tbl *jack;
4027
4028 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4029 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4030
4031 /* Enable unsol response for GPIO4/Dock HP connection */
4032 snd_hda_codec_write_cache(codec, codec->afg, 0,
4033 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4034 snd_hda_jack_detect_enable_callback(codec, codec->afg,
4035 STAC_VREF_EVENT,
4036 stac_vref_event);
4037 jack = snd_hda_jack_tbl_get(codec, codec->afg);
4038 if (jack)
4039 jack->private_data = 0x01;
4040
4041 spec->gpio_dir = 0x0b;
4042 spec->eapd_mask = 0x01;
4043 spec->gpio_mask = 0x1b;
4044 spec->gpio_mute = 0x10;
4045 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4046 * GPIO3 Low = DRM
4047 */
4048 spec->gpio_data = 0x01;
4049 }
4050 }
4051
4052 static void stac9205_fixup_eapd(struct hda_codec *codec,
4053 const struct hda_fixup *fix, int action)
4054 {
4055 struct sigmatel_spec *spec = codec->spec;
4056
4057 if (action == HDA_FIXUP_ACT_PRE_PROBE)
4058 spec->eapd_switch = 0;
4059 }
4060
4061 static const struct hda_fixup stac9205_fixups[] = {
4062 [STAC_9205_REF] = {
4063 .type = HDA_FIXUP_FUNC,
4064 .v.func = stac9205_fixup_ref,
4065 },
4066 [STAC_9205_DELL_M42] = {
4067 .type = HDA_FIXUP_PINS,
4068 .v.pins = dell_9205_m42_pin_configs,
4069 },
4070 [STAC_9205_DELL_M43] = {
4071 .type = HDA_FIXUP_FUNC,
4072 .v.func = stac9205_fixup_dell_m43,
4073 },
4074 [STAC_9205_DELL_M44] = {
4075 .type = HDA_FIXUP_PINS,
4076 .v.pins = dell_9205_m44_pin_configs,
4077 },
4078 [STAC_9205_EAPD] = {
4079 .type = HDA_FIXUP_FUNC,
4080 .v.func = stac9205_fixup_eapd,
4081 },
4082 {}
4083 };
4084
4085 static const struct hda_model_fixup stac9205_models[] = {
4086 { .id = STAC_9205_REF, .name = "ref" },
4087 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4088 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4089 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4090 { .id = STAC_9205_EAPD, .name = "eapd" },
4091 {}
4092 };
4093
4094 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4095 /* SigmaTel reference board */
4096 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4097 "DFI LanParty", STAC_9205_REF),
4098 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4099 "SigmaTel", STAC_9205_REF),
4100 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4101 "DFI LanParty", STAC_9205_REF),
4102 /* Dell */
4103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4104 "unknown Dell", STAC_9205_DELL_M42),
4105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4106 "unknown Dell", STAC_9205_DELL_M42),
4107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4108 "Dell Precision", STAC_9205_DELL_M43),
4109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4110 "Dell Precision", STAC_9205_DELL_M43),
4111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4112 "Dell Precision", STAC_9205_DELL_M43),
4113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4114 "unknown Dell", STAC_9205_DELL_M42),
4115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4116 "unknown Dell", STAC_9205_DELL_M42),
4117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4118 "Dell Precision", STAC_9205_DELL_M43),
4119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4120 "Dell Precision M4300", STAC_9205_DELL_M43),
4121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4122 "unknown Dell", STAC_9205_DELL_M42),
4123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4124 "Dell Precision", STAC_9205_DELL_M43),
4125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4126 "Dell Precision", STAC_9205_DELL_M43),
4127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4128 "Dell Precision", STAC_9205_DELL_M43),
4129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4130 "Dell Inspiron", STAC_9205_DELL_M44),
4131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4132 "Dell Vostro 1500", STAC_9205_DELL_M42),
4133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4134 "Dell Vostro 1700", STAC_9205_DELL_M42),
4135 /* Gateway */
4136 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4137 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4138 {} /* terminator */
4139 };
4140
4141 static int stac_parse_auto_config(struct hda_codec *codec)
4142 {
4143 struct sigmatel_spec *spec = codec->spec;
4144 int err;
4145 int flags = 0;
4146
4147 if (spec->headset_jack)
4148 flags |= HDA_PINCFG_HEADSET_MIC;
4149
4150 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4151 if (err < 0)
4152 return err;
4153
4154 /* add hooks */
4155 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4156 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4157
4158 spec->gen.automute_hook = stac_update_outputs;
4159 spec->gen.hp_automute_hook = stac_hp_automute;
4160 spec->gen.line_automute_hook = stac_line_automute;
4161 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
4162
4163 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4164 if (err < 0)
4165 return err;
4166
4167 /* minimum value is actually mute */
4168 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
4169
4170 /* setup analog beep controls */
4171 if (spec->anabeep_nid > 0) {
4172 err = stac_auto_create_beep_ctls(codec,
4173 spec->anabeep_nid);
4174 if (err < 0)
4175 return err;
4176 }
4177
4178 /* setup digital beep controls and input device */
4179 #ifdef CONFIG_SND_HDA_INPUT_BEEP
4180 if (spec->gen.beep_nid) {
4181 hda_nid_t nid = spec->gen.beep_nid;
4182 unsigned int caps;
4183
4184 err = stac_auto_create_beep_ctls(codec, nid);
4185 if (err < 0)
4186 return err;
4187 if (codec->beep) {
4188 /* IDT/STAC codecs have linear beep tone parameter */
4189 codec->beep->linear_tone = spec->linear_tone_beep;
4190 /* if no beep switch is available, make its own one */
4191 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4192 if (!(caps & AC_AMPCAP_MUTE)) {
4193 err = stac_beep_switch_ctl(codec);
4194 if (err < 0)
4195 return err;
4196 }
4197 }
4198 }
4199 #endif
4200
4201 if (spec->gpio_led)
4202 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4203
4204 if (spec->aloopback_ctl &&
4205 snd_hda_get_bool_hint(codec, "loopback") == 1) {
4206 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4207 return -ENOMEM;
4208 }
4209
4210 if (spec->have_spdif_mux) {
4211 err = stac_create_spdif_mux_ctls(codec);
4212 if (err < 0)
4213 return err;
4214 }
4215
4216 return 0;
4217 }
4218
4219 static int stac_build_controls(struct hda_codec *codec)
4220 {
4221 int err = snd_hda_gen_build_controls(codec);
4222
4223 if (err < 0)
4224 return err;
4225 stac_init_power_map(codec);
4226 return 0;
4227 }
4228
4229 static int stac_init(struct hda_codec *codec)
4230 {
4231 struct sigmatel_spec *spec = codec->spec;
4232 int i;
4233
4234 /* override some hints */
4235 stac_store_hints(codec);
4236
4237 /* set up GPIO */
4238 /* turn on EAPD statically when spec->eapd_switch isn't set.
4239 * otherwise, unsol event will turn it on/off dynamically
4240 */
4241 if (!spec->eapd_switch)
4242 spec->gpio_data |= spec->eapd_mask;
4243 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4244
4245 snd_hda_gen_init(codec);
4246
4247 /* sync the power-map */
4248 if (spec->num_pwrs)
4249 snd_hda_codec_write(codec, codec->afg, 0,
4250 AC_VERB_IDT_SET_POWER_MAP,
4251 spec->power_map_bits);
4252
4253 /* power down inactive ADCs */
4254 if (spec->powerdown_adcs) {
4255 for (i = 0; i < spec->gen.num_all_adcs; i++) {
4256 if (spec->active_adcs & (1 << i))
4257 continue;
4258 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4259 AC_VERB_SET_POWER_STATE,
4260 AC_PWRST_D3);
4261 }
4262 }
4263
4264 return 0;
4265 }
4266
4267 static void stac_shutup(struct hda_codec *codec)
4268 {
4269 struct sigmatel_spec *spec = codec->spec;
4270
4271 snd_hda_shutup_pins(codec);
4272
4273 if (spec->eapd_mask)
4274 stac_gpio_set(codec, spec->gpio_mask,
4275 spec->gpio_dir, spec->gpio_data &
4276 ~spec->eapd_mask);
4277 }
4278
4279 #define stac_free snd_hda_gen_free
4280
4281 #ifdef CONFIG_PROC_FS
4282 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4283 struct hda_codec *codec, hda_nid_t nid)
4284 {
4285 if (nid == codec->afg)
4286 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4287 snd_hda_codec_read(codec, nid, 0,
4288 AC_VERB_IDT_GET_POWER_MAP, 0));
4289 }
4290
4291 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4292 struct hda_codec *codec,
4293 unsigned int verb)
4294 {
4295 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4296 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
4297 }
4298
4299 /* stac92hd71bxx, stac92hd73xx */
4300 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4301 struct hda_codec *codec, hda_nid_t nid)
4302 {
4303 stac92hd_proc_hook(buffer, codec, nid);
4304 if (nid == codec->afg)
4305 analog_loop_proc_hook(buffer, codec, 0xfa0);
4306 }
4307
4308 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4309 struct hda_codec *codec, hda_nid_t nid)
4310 {
4311 if (nid == codec->afg)
4312 analog_loop_proc_hook(buffer, codec, 0xfe0);
4313 }
4314
4315 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4316 struct hda_codec *codec, hda_nid_t nid)
4317 {
4318 if (nid == codec->afg)
4319 analog_loop_proc_hook(buffer, codec, 0xfeb);
4320 }
4321 #else
4322 #define stac92hd_proc_hook NULL
4323 #define stac92hd7x_proc_hook NULL
4324 #define stac9205_proc_hook NULL
4325 #define stac927x_proc_hook NULL
4326 #endif
4327
4328 #ifdef CONFIG_PM
4329 static int stac_suspend(struct hda_codec *codec)
4330 {
4331 stac_shutup(codec);
4332 return 0;
4333 }
4334
4335 static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
4336 unsigned int power_state)
4337 {
4338 unsigned int afg_power_state = power_state;
4339 struct sigmatel_spec *spec = codec->spec;
4340
4341 if (power_state == AC_PWRST_D3) {
4342 if (spec->vref_mute_led_nid) {
4343 /* with vref-out pin used for mute led control
4344 * codec AFG is prevented from D3 state
4345 */
4346 afg_power_state = AC_PWRST_D1;
4347 }
4348 /* this delay seems necessary to avoid click noise at power-down */
4349 msleep(100);
4350 }
4351 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
4352 afg_power_state);
4353 snd_hda_codec_set_power_to_all(codec, fg, power_state);
4354 }
4355 #else
4356 #define stac_suspend NULL
4357 #define stac_set_power_state NULL
4358 #endif /* CONFIG_PM */
4359
4360 static const struct hda_codec_ops stac_patch_ops = {
4361 .build_controls = stac_build_controls,
4362 .build_pcms = snd_hda_gen_build_pcms,
4363 .init = stac_init,
4364 .free = stac_free,
4365 .unsol_event = snd_hda_jack_unsol_event,
4366 #ifdef CONFIG_PM
4367 .suspend = stac_suspend,
4368 #endif
4369 .reboot_notify = stac_shutup,
4370 };
4371
4372 static int alloc_stac_spec(struct hda_codec *codec)
4373 {
4374 struct sigmatel_spec *spec;
4375
4376 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4377 if (!spec)
4378 return -ENOMEM;
4379 snd_hda_gen_spec_init(&spec->gen);
4380 codec->spec = spec;
4381 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4382 return 0;
4383 }
4384
4385 static int patch_stac9200(struct hda_codec *codec)
4386 {
4387 struct sigmatel_spec *spec;
4388 int err;
4389
4390 err = alloc_stac_spec(codec);
4391 if (err < 0)
4392 return err;
4393
4394 spec = codec->spec;
4395 spec->linear_tone_beep = 1;
4396 spec->gen.own_eapd_ctl = 1;
4397
4398 codec->patch_ops = stac_patch_ops;
4399 codec->power_filter = snd_hda_codec_eapd_power_filter;
4400
4401 snd_hda_add_verbs(codec, stac9200_eapd_init);
4402
4403 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4404 stac9200_fixups);
4405 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4406
4407 err = stac_parse_auto_config(codec);
4408 if (err < 0) {
4409 stac_free(codec);
4410 return err;
4411 }
4412
4413 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4414
4415 return 0;
4416 }
4417
4418 static int patch_stac925x(struct hda_codec *codec)
4419 {
4420 struct sigmatel_spec *spec;
4421 int err;
4422
4423 err = alloc_stac_spec(codec);
4424 if (err < 0)
4425 return err;
4426
4427 spec = codec->spec;
4428 spec->linear_tone_beep = 1;
4429 spec->gen.own_eapd_ctl = 1;
4430
4431 codec->patch_ops = stac_patch_ops;
4432
4433 snd_hda_add_verbs(codec, stac925x_core_init);
4434
4435 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4436 stac925x_fixups);
4437 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4438
4439 err = stac_parse_auto_config(codec);
4440 if (err < 0) {
4441 stac_free(codec);
4442 return err;
4443 }
4444
4445 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4446
4447 return 0;
4448 }
4449
4450 static int patch_stac92hd73xx(struct hda_codec *codec)
4451 {
4452 struct sigmatel_spec *spec;
4453 int err;
4454 int num_dacs;
4455
4456 err = alloc_stac_spec(codec);
4457 if (err < 0)
4458 return err;
4459
4460 spec = codec->spec;
4461 spec->linear_tone_beep = 0;
4462 spec->gen.mixer_nid = 0x1d;
4463 spec->have_spdif_mux = 1;
4464
4465 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4466 if (num_dacs < 3 || num_dacs > 5) {
4467 printk(KERN_WARNING "hda_codec: Could not determine "
4468 "number of channels defaulting to DAC count\n");
4469 num_dacs = 5;
4470 }
4471
4472 switch (num_dacs) {
4473 case 0x3: /* 6 Channel */
4474 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4475 break;
4476 case 0x4: /* 8 Channel */
4477 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4478 break;
4479 case 0x5: /* 10 Channel */
4480 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4481 break;
4482 }
4483
4484 spec->aloopback_mask = 0x01;
4485 spec->aloopback_shift = 8;
4486
4487 spec->gen.beep_nid = 0x1c; /* digital beep */
4488
4489 /* GPIO0 High = Enable EAPD */
4490 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4491 spec->gpio_data = 0x01;
4492
4493 spec->eapd_switch = 1;
4494
4495 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4496 spec->pwr_nids = stac92hd73xx_pwr_nids;
4497
4498 spec->gen.own_eapd_ctl = 1;
4499 spec->gen.power_down_unused = 1;
4500
4501 codec->patch_ops = stac_patch_ops;
4502
4503 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4504 stac92hd73xx_fixups);
4505 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4506
4507 if (!spec->volknob_init)
4508 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4509
4510 err = stac_parse_auto_config(codec);
4511 if (err < 0) {
4512 stac_free(codec);
4513 return err;
4514 }
4515
4516 /* Don't GPIO-mute speakers if there are no internal speakers, because
4517 * the GPIO might be necessary for Headphone
4518 */
4519 if (spec->eapd_switch && !has_builtin_speaker(codec))
4520 spec->eapd_switch = 0;
4521
4522 codec->proc_widget_hook = stac92hd7x_proc_hook;
4523
4524 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4525
4526 return 0;
4527 }
4528
4529 static void stac_setup_gpio(struct hda_codec *codec)
4530 {
4531 struct sigmatel_spec *spec = codec->spec;
4532
4533 spec->gpio_mask |= spec->eapd_mask;
4534 if (spec->gpio_led) {
4535 if (!spec->vref_mute_led_nid) {
4536 spec->gpio_mask |= spec->gpio_led;
4537 spec->gpio_dir |= spec->gpio_led;
4538 spec->gpio_data |= spec->gpio_led;
4539 } else {
4540 codec->patch_ops.set_power_state =
4541 stac_set_power_state;
4542 }
4543 }
4544
4545 if (spec->mic_mute_led_gpio) {
4546 spec->gpio_mask |= spec->mic_mute_led_gpio;
4547 spec->gpio_dir |= spec->mic_mute_led_gpio;
4548 spec->mic_enabled = 0;
4549 spec->gpio_data |= spec->mic_mute_led_gpio;
4550
4551 spec->gen.cap_sync_hook = stac_capture_led_hook;
4552 }
4553 }
4554
4555 static int patch_stac92hd83xxx(struct hda_codec *codec)
4556 {
4557 struct sigmatel_spec *spec;
4558 int err;
4559
4560 err = alloc_stac_spec(codec);
4561 if (err < 0)
4562 return err;
4563
4564 codec->epss = 0; /* longer delay needed for D3 */
4565
4566 spec = codec->spec;
4567 spec->linear_tone_beep = 0;
4568 spec->gen.own_eapd_ctl = 1;
4569 spec->gen.power_down_unused = 1;
4570 spec->gen.mixer_nid = 0x1b;
4571
4572 spec->gen.beep_nid = 0x21; /* digital beep */
4573 spec->pwr_nids = stac92hd83xxx_pwr_nids;
4574 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4575 spec->default_polarity = -1; /* no default cfg */
4576
4577 codec->patch_ops = stac_patch_ops;
4578
4579 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4580
4581 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4582 stac92hd83xxx_fixups);
4583 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4584
4585 stac_setup_gpio(codec);
4586
4587 err = stac_parse_auto_config(codec);
4588 if (err < 0) {
4589 stac_free(codec);
4590 return err;
4591 }
4592
4593 codec->proc_widget_hook = stac92hd_proc_hook;
4594
4595 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4596
4597 return 0;
4598 }
4599
4600 static const hda_nid_t stac92hd95_pwr_nids[] = {
4601 0x0a, 0x0b, 0x0c, 0x0d
4602 };
4603
4604 static int patch_stac92hd95(struct hda_codec *codec)
4605 {
4606 struct sigmatel_spec *spec;
4607 int err;
4608
4609 err = alloc_stac_spec(codec);
4610 if (err < 0)
4611 return err;
4612
4613 codec->epss = 0; /* longer delay needed for D3 */
4614
4615 spec = codec->spec;
4616 spec->linear_tone_beep = 0;
4617 spec->gen.own_eapd_ctl = 1;
4618 spec->gen.power_down_unused = 1;
4619
4620 spec->gen.beep_nid = 0x19; /* digital beep */
4621 spec->pwr_nids = stac92hd95_pwr_nids;
4622 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4623 spec->default_polarity = -1; /* no default cfg */
4624
4625 codec->patch_ops = stac_patch_ops;
4626
4627 err = stac_parse_auto_config(codec);
4628 if (err < 0) {
4629 stac_free(codec);
4630 return err;
4631 }
4632
4633 codec->proc_widget_hook = stac92hd_proc_hook;
4634
4635 return 0;
4636 }
4637
4638 static int patch_stac92hd71bxx(struct hda_codec *codec)
4639 {
4640 struct sigmatel_spec *spec;
4641 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
4642 int err;
4643
4644 err = alloc_stac_spec(codec);
4645 if (err < 0)
4646 return err;
4647
4648 spec = codec->spec;
4649 spec->linear_tone_beep = 0;
4650 spec->gen.own_eapd_ctl = 1;
4651 spec->gen.power_down_unused = 1;
4652 spec->gen.mixer_nid = 0x17;
4653 spec->have_spdif_mux = 1;
4654
4655 codec->patch_ops = stac_patch_ops;
4656
4657 /* GPIO0 = EAPD */
4658 spec->gpio_mask = 0x01;
4659 spec->gpio_dir = 0x01;
4660 spec->gpio_data = 0x01;
4661
4662 switch (codec->vendor_id) {
4663 case 0x111d76b6: /* 4 Port without Analog Mixer */
4664 case 0x111d76b7:
4665 unmute_init++;
4666 break;
4667 case 0x111d7608: /* 5 Port with Analog Mixer */
4668 if ((codec->revision_id & 0xf) == 0 ||
4669 (codec->revision_id & 0xf) == 1)
4670 spec->stream_delay = 40; /* 40 milliseconds */
4671
4672 /* disable VSW */
4673 unmute_init++;
4674 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4675 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4676 break;
4677 case 0x111d7603: /* 6 Port with Analog Mixer */
4678 if ((codec->revision_id & 0xf) == 1)
4679 spec->stream_delay = 40; /* 40 milliseconds */
4680
4681 break;
4682 }
4683
4684 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4685 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4686
4687 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4688 snd_hda_sequence_write_cache(codec, unmute_init);
4689
4690 spec->aloopback_ctl = &stac92hd71bxx_loopback;
4691 spec->aloopback_mask = 0x50;
4692 spec->aloopback_shift = 0;
4693
4694 spec->powerdown_adcs = 1;
4695 spec->gen.beep_nid = 0x26; /* digital beep */
4696 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4697 spec->pwr_nids = stac92hd71bxx_pwr_nids;
4698
4699 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4700 stac92hd71bxx_fixups);
4701 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4702
4703 stac_setup_gpio(codec);
4704
4705 err = stac_parse_auto_config(codec);
4706 if (err < 0) {
4707 stac_free(codec);
4708 return err;
4709 }
4710
4711 codec->proc_widget_hook = stac92hd7x_proc_hook;
4712
4713 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4714
4715 return 0;
4716 }
4717
4718 static int patch_stac922x(struct hda_codec *codec)
4719 {
4720 struct sigmatel_spec *spec;
4721 int err;
4722
4723 err = alloc_stac_spec(codec);
4724 if (err < 0)
4725 return err;
4726
4727 spec = codec->spec;
4728 spec->linear_tone_beep = 1;
4729 spec->gen.own_eapd_ctl = 1;
4730
4731 codec->patch_ops = stac_patch_ops;
4732
4733 snd_hda_add_verbs(codec, stac922x_core_init);
4734
4735 /* Fix Mux capture level; max to 2 */
4736 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4737 (0 << AC_AMPCAP_OFFSET_SHIFT) |
4738 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4739 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4740 (0 << AC_AMPCAP_MUTE_SHIFT));
4741
4742 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4743 stac922x_fixups);
4744 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4745
4746 err = stac_parse_auto_config(codec);
4747 if (err < 0) {
4748 stac_free(codec);
4749 return err;
4750 }
4751
4752 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4753
4754 return 0;
4755 }
4756
4757 static const char * const stac927x_spdif_labels[] = {
4758 "Digital Playback", "ADAT", "Analog Mux 1",
4759 "Analog Mux 2", "Analog Mux 3", NULL
4760 };
4761
4762 static int patch_stac927x(struct hda_codec *codec)
4763 {
4764 struct sigmatel_spec *spec;
4765 int err;
4766
4767 err = alloc_stac_spec(codec);
4768 if (err < 0)
4769 return err;
4770
4771 spec = codec->spec;
4772 spec->linear_tone_beep = 1;
4773 spec->gen.own_eapd_ctl = 1;
4774 spec->have_spdif_mux = 1;
4775 spec->spdif_labels = stac927x_spdif_labels;
4776
4777 spec->gen.beep_nid = 0x23; /* digital beep */
4778
4779 /* GPIO0 High = Enable EAPD */
4780 spec->eapd_mask = spec->gpio_mask = 0x01;
4781 spec->gpio_dir = spec->gpio_data = 0x01;
4782
4783 spec->aloopback_ctl = &stac927x_loopback;
4784 spec->aloopback_mask = 0x40;
4785 spec->aloopback_shift = 0;
4786 spec->eapd_switch = 1;
4787
4788 codec->patch_ops = stac_patch_ops;
4789
4790 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4791 stac927x_fixups);
4792 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4793
4794 if (!spec->volknob_init)
4795 snd_hda_add_verbs(codec, stac927x_core_init);
4796
4797 err = stac_parse_auto_config(codec);
4798 if (err < 0) {
4799 stac_free(codec);
4800 return err;
4801 }
4802
4803 codec->proc_widget_hook = stac927x_proc_hook;
4804
4805 /*
4806 * !!FIXME!!
4807 * The STAC927x seem to require fairly long delays for certain
4808 * command sequences. With too short delays (even if the answer
4809 * is set to RIRB properly), it results in the silence output
4810 * on some hardwares like Dell.
4811 *
4812 * The below flag enables the longer delay (see get_response
4813 * in hda_intel.c).
4814 */
4815 codec->bus->needs_damn_long_delay = 1;
4816
4817 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4818
4819 return 0;
4820 }
4821
4822 static int patch_stac9205(struct hda_codec *codec)
4823 {
4824 struct sigmatel_spec *spec;
4825 int err;
4826
4827 err = alloc_stac_spec(codec);
4828 if (err < 0)
4829 return err;
4830
4831 spec = codec->spec;
4832 spec->linear_tone_beep = 1;
4833 spec->gen.own_eapd_ctl = 1;
4834 spec->have_spdif_mux = 1;
4835
4836 spec->gen.beep_nid = 0x23; /* digital beep */
4837
4838 snd_hda_add_verbs(codec, stac9205_core_init);
4839 spec->aloopback_ctl = &stac9205_loopback;
4840
4841 spec->aloopback_mask = 0x40;
4842 spec->aloopback_shift = 0;
4843
4844 /* GPIO0 High = EAPD */
4845 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4846 spec->gpio_data = 0x01;
4847
4848 /* Turn on/off EAPD per HP plugging */
4849 spec->eapd_switch = 1;
4850
4851 codec->patch_ops = stac_patch_ops;
4852
4853 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4854 stac9205_fixups);
4855 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4856
4857 err = stac_parse_auto_config(codec);
4858 if (err < 0) {
4859 stac_free(codec);
4860 return err;
4861 }
4862
4863 codec->proc_widget_hook = stac9205_proc_hook;
4864
4865 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4866
4867 return 0;
4868 }
4869
4870 /*
4871 * STAC9872 hack
4872 */
4873
4874 static const struct hda_verb stac9872_core_init[] = {
4875 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4876 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4877 {}
4878 };
4879
4880 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4881 { 0x0a, 0x03211020 },
4882 { 0x0b, 0x411111f0 },
4883 { 0x0c, 0x411111f0 },
4884 { 0x0d, 0x03a15030 },
4885 { 0x0e, 0x411111f0 },
4886 { 0x0f, 0x90170110 },
4887 { 0x11, 0x411111f0 },
4888 { 0x13, 0x411111f0 },
4889 { 0x14, 0x90a7013e },
4890 {}
4891 };
4892
4893 static const struct hda_model_fixup stac9872_models[] = {
4894 { .id = STAC_9872_VAIO, .name = "vaio" },
4895 {}
4896 };
4897
4898 static const struct hda_fixup stac9872_fixups[] = {
4899 [STAC_9872_VAIO] = {
4900 .type = HDA_FIXUP_PINS,
4901 .v.pins = stac9872_vaio_pin_configs,
4902 },
4903 };
4904
4905 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4906 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4907 "Sony VAIO F/S", STAC_9872_VAIO),
4908 {} /* terminator */
4909 };
4910
4911 static int patch_stac9872(struct hda_codec *codec)
4912 {
4913 struct sigmatel_spec *spec;
4914 int err;
4915
4916 err = alloc_stac_spec(codec);
4917 if (err < 0)
4918 return err;
4919
4920 spec = codec->spec;
4921 spec->linear_tone_beep = 1;
4922 spec->gen.own_eapd_ctl = 1;
4923
4924 codec->patch_ops = stac_patch_ops;
4925
4926 snd_hda_add_verbs(codec, stac9872_core_init);
4927
4928 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4929 stac9872_fixups);
4930 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4931
4932 err = stac_parse_auto_config(codec);
4933 if (err < 0) {
4934 stac_free(codec);
4935 return -EINVAL;
4936 }
4937
4938 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4939
4940 return 0;
4941 }
4942
4943
4944 /*
4945 * patch entries
4946 */
4947 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4948 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4949 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4950 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4951 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4952 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4953 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4954 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4955 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4956 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4957 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4958 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4959 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4960 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4961 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4962 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4963 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4964 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4965 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4966 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4967 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4968 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4969 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4970 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4971 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4972 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4973 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4974 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4975 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4976 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4977 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4978 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4979 /* The following does not take into account .id=0x83847661 when subsys =
4980 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4981 * currently not fully supported.
4982 */
4983 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4984 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4985 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4986 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
4987 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4988 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4989 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4990 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4991 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4992 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4993 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4994 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4995 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4996 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4997 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
4998 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
4999 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
5000 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
5001 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
5002 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
5003 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
5004 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
5005 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
5006 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
5007 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
5008 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
5009 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
5010 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
5011 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5012 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
5013 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5014 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
5015 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5016 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
5017 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5018 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
5019 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
5020 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
5021 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
5022 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
5023 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
5024 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
5025 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
5026 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
5027 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
5028 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
5029 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
5030 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
5031 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
5032 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
5033 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
5034 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
5035 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
5036 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
5037 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
5038 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
5039 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
5040 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
5041 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
5042 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
5043 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
5044 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
5045 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
5046 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
5047 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
5048 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
5049 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
5050 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
5051 {} /* terminator */
5052 };
5053
5054 MODULE_ALIAS("snd-hda-codec-id:8384*");
5055 MODULE_ALIAS("snd-hda-codec-id:111d*");
5056
5057 MODULE_LICENSE("GPL");
5058 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5059
5060 static struct hda_codec_preset_list sigmatel_list = {
5061 .preset = snd_hda_preset_sigmatel,
5062 .owner = THIS_MODULE,
5063 };
5064
5065 static int __init patch_sigmatel_init(void)
5066 {
5067 return snd_hda_add_codec_preset(&sigmatel_list);
5068 }
5069
5070 static void __exit patch_sigmatel_exit(void)
5071 {
5072 snd_hda_delete_codec_preset(&sigmatel_list);
5073 }
5074
5075 module_init(patch_sigmatel_init)
5076 module_exit(patch_sigmatel_exit)
Linux with added FPC-III support