drivers/net/3c501.h

   1
   2 /*
   3  *      Index to functions.
   4  */
   5
   6 static int  el1_probe1(struct net_device *dev, int ioaddr);
   7 static int  el_open(struct net_device *dev);
   8 static void el_timeout(struct net_device *dev);
   9 static int  el_start_xmit(struct sk_buff *skb, struct net_device *dev);
  10 static irqreturn_t el_interrupt(int irq, void *dev_id, struct pt_regs *regs);
  11 static void el_receive(struct net_device *dev);
  12 static void el_reset(struct net_device *dev);
  13 static int  el1_close(struct net_device *dev);
  14 static struct net_device_stats *el1_get_stats(struct net_device *dev);
  15 static void set_multicast_list(struct net_device *dev);
  16 static struct ethtool_ops netdev_ethtool_ops;
  17
  18 #define EL1_IO_EXTENT   16
  19
  20 #ifndef EL_DEBUG
  21 #define EL_DEBUG  0     /* use 0 for production, 1 for devel., >2 for debug */
  22 #endif                  /* Anything above 5 is wordy death! */
  23 #define debug el_debug
  24 static int el_debug = EL_DEBUG;
  25
  26 /*
  27  *      Board-specific info in dev->priv.
  28  */
  29
  30 struct net_local
  31 {
  32         struct net_device_stats stats;
  33         int             tx_pkt_start;   /* The length of the current Tx packet. */
  34         int             collisions;     /* Tx collisions this packet */
  35         int             loading;        /* Spot buffer load collisions */
  36         int             txing;          /* True if card is in TX mode */
  37         spinlock_t      lock;           /* Serializing lock */
  38 };
  39
  40 \f
  41 #define RX_STATUS (ioaddr + 0x06)
  42 #define RX_CMD    RX_STATUS
  43 #define TX_STATUS (ioaddr + 0x07)
  44 #define TX_CMD    TX_STATUS
  45 #define GP_LOW    (ioaddr + 0x08)
  46 #define GP_HIGH   (ioaddr + 0x09)
  47 #define RX_BUF_CLR (ioaddr + 0x0A)
  48 #define RX_LOW    (ioaddr + 0x0A)
  49 #define RX_HIGH   (ioaddr + 0x0B)
  50 #define SAPROM    (ioaddr + 0x0C)
  51 #define AX_STATUS (ioaddr + 0x0E)
  52 #define AX_CMD    AX_STATUS
  53 #define DATAPORT  (ioaddr + 0x0F)
  54 #define TX_RDY 0x08             /* In TX_STATUS */
  55
  56 #define EL1_DATAPTR     0x08
  57 #define EL1_RXPTR       0x0A
  58 #define EL1_SAPROM      0x0C
  59 #define EL1_DATAPORT    0x0f
  60
  61 /*
  62  *      Writes to the ax command register.
  63  */
  64
  65 #define AX_OFF  0x00                    /* Irq off, buffer access on */
  66 #define AX_SYS  0x40                    /* Load the buffer */
  67 #define AX_XMIT 0x44                    /* Transmit a packet */
  68 #define AX_RX   0x48                    /* Receive a packet */
  69 #define AX_LOOP 0x0C                    /* Loopback mode */
  70 #define AX_RESET 0x80
  71
  72 /*
  73  *      Normal receive mode written to RX_STATUS.  We must intr on short packets
  74  *      to avoid bogus rx lockups.
  75  */
  76
  77 #define RX_NORM 0xA8            /* 0x68 == all addrs, 0xA8 only to me. */
  78 #define RX_PROM 0x68            /* Senior Prom, uhmm promiscuous mode. */
  79 #define RX_MULT 0xE8            /* Accept multicast packets. */
  80 #define TX_NORM 0x0A            /* Interrupt on everything that might hang the chip */
  81
  82 /*
  83  *      TX_STATUS register.
  84  */
  85
  86 #define TX_COLLISION 0x02
  87 #define TX_16COLLISIONS 0x04
  88 #define TX_READY 0x08
  89
  90 #define RX_RUNT 0x08
  91 #define RX_MISSED 0x01          /* Missed a packet due to 3c501 braindamage. */
  92 #define RX_GOOD 0x30            /* Good packet 0x20, or simple overflow 0x10. */
  93