[PATCH] USB: Rename hcd->hub_suspend to hcd->bus_suspend
[linux/fpc-iii.git] / drivers / net / chelsio / common.h
blobbf3e7b6a7a1898290635cfb134f6bce0016992ef
1 /*****************************************************************************
2 * *
3 * File: common.h *
4 * $Revision: 1.21 $ *
5 * $Date: 2005/06/22 00:43:25 $ *
6 * Description: *
7 * part of the Chelsio 10Gb Ethernet Driver. *
8 * *
9 * This program is free software; you can redistribute it and/or modify *
10 * it under the terms of the GNU General Public License, version 2, as *
11 * published by the Free Software Foundation. *
12 * *
13 * You should have received a copy of the GNU General Public License along *
14 * with this program; if not, write to the Free Software Foundation, Inc., *
15 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
16 * *
17 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED *
18 * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF *
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. *
20 * *
21 * http://www.chelsio.com *
22 * *
23 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
24 * All rights reserved. *
25 * *
26 * Maintainers: maintainers@chelsio.com *
27 * *
28 * Authors: Dimitrios Michailidis <dm@chelsio.com> *
29 * Tina Yang <tainay@chelsio.com> *
30 * Felix Marti <felix@chelsio.com> *
31 * Scott Bardone <sbardone@chelsio.com> *
32 * Kurt Ottaway <kottaway@chelsio.com> *
33 * Frank DiMambro <frank@chelsio.com> *
34 * *
35 * History: *
36 * *
37 ****************************************************************************/
39 #ifndef _CXGB_COMMON_H_
40 #define _CXGB_COMMON_H_
42 #include <linux/config.h>
43 #include <linux/module.h>
44 #include <linux/netdevice.h>
45 #include <linux/types.h>
46 #include <linux/delay.h>
47 #include <linux/pci.h>
48 #include <linux/ethtool.h>
49 #include <linux/mii.h>
50 #include <linux/crc32.h>
51 #include <linux/init.h>
52 #include <asm/io.h>
53 #include <linux/pci_ids.h>
55 #define DRV_DESCRIPTION "Chelsio 10Gb Ethernet Driver"
56 #define DRV_NAME "cxgb"
57 #define DRV_VERSION "2.1.1"
58 #define PFX DRV_NAME ": "
60 #define CH_ERR(fmt, ...) printk(KERN_ERR PFX fmt, ## __VA_ARGS__)
61 #define CH_WARN(fmt, ...) printk(KERN_WARNING PFX fmt, ## __VA_ARGS__)
62 #define CH_ALERT(fmt, ...) printk(KERN_ALERT PFX fmt, ## __VA_ARGS__)
64 #define CH_DEVICE(devid, ssid, idx) \
65 { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, ssid, 0, 0, idx }
67 #define SUPPORTED_PAUSE (1 << 13)
68 #define SUPPORTED_LOOPBACK (1 << 15)
70 #define ADVERTISED_PAUSE (1 << 13)
71 #define ADVERTISED_ASYM_PAUSE (1 << 14)
73 typedef struct adapter adapter_t;
75 void t1_elmer0_ext_intr(adapter_t *adapter);
76 void t1_link_changed(adapter_t *adapter, int port_id, int link_status,
77 int speed, int duplex, int fc);
79 struct t1_rx_mode {
80 struct net_device *dev;
81 u32 idx;
82 struct dev_mc_list *list;
85 #define t1_rx_mode_promisc(rm) (rm->dev->flags & IFF_PROMISC)
86 #define t1_rx_mode_allmulti(rm) (rm->dev->flags & IFF_ALLMULTI)
87 #define t1_rx_mode_mc_cnt(rm) (rm->dev->mc_count)
89 static inline u8 *t1_get_next_mcaddr(struct t1_rx_mode *rm)
91 u8 *addr = NULL;
93 if (rm->idx++ < rm->dev->mc_count) {
94 addr = rm->list->dmi_addr;
95 rm->list = rm->list->next;
97 return addr;
100 #define MAX_NPORTS 4
102 #define SPEED_INVALID 0xffff
103 #define DUPLEX_INVALID 0xff
105 enum {
106 CHBT_BOARD_N110,
107 CHBT_BOARD_N210
110 enum {
111 CHBT_TERM_T1,
112 CHBT_TERM_T2
115 enum {
116 CHBT_MAC_PM3393,
119 enum {
120 CHBT_PHY_88X2010,
123 enum {
124 PAUSE_RX = 1 << 0,
125 PAUSE_TX = 1 << 1,
126 PAUSE_AUTONEG = 1 << 2
129 /* Revisions of T1 chip */
130 enum {
131 TERM_T1A = 0,
132 TERM_T1B = 1,
133 TERM_T2 = 3
136 struct sge_params {
137 unsigned int cmdQ_size[2];
138 unsigned int freelQ_size[2];
139 unsigned int large_buf_capacity;
140 unsigned int rx_coalesce_usecs;
141 unsigned int last_rx_coalesce_raw;
142 unsigned int default_rx_coalesce_usecs;
143 unsigned int sample_interval_usecs;
144 unsigned int coalesce_enable;
145 unsigned int polling;
148 struct chelsio_pci_params {
149 unsigned short speed;
150 unsigned char width;
151 unsigned char is_pcix;
154 struct adapter_params {
155 struct sge_params sge;
156 struct chelsio_pci_params pci;
158 const struct board_info *brd_info;
160 unsigned int nports; /* # of ethernet ports */
161 unsigned int stats_update_period;
162 unsigned short chip_revision;
163 unsigned char chip_version;
166 struct link_config {
167 unsigned int supported; /* link capabilities */
168 unsigned int advertising; /* advertised capabilities */
169 unsigned short requested_speed; /* speed user has requested */
170 unsigned short speed; /* actual link speed */
171 unsigned char requested_duplex; /* duplex user has requested */
172 unsigned char duplex; /* actual link duplex */
173 unsigned char requested_fc; /* flow control user has requested */
174 unsigned char fc; /* actual link flow control */
175 unsigned char autoneg; /* autonegotiating? */
178 struct cmac;
179 struct cphy;
181 struct port_info {
182 struct net_device *dev;
183 struct cmac *mac;
184 struct cphy *phy;
185 struct link_config link_config;
186 struct net_device_stats netstats;
189 struct sge;
190 struct peespi;
192 struct adapter {
193 u8 __iomem *regs;
194 struct pci_dev *pdev;
195 unsigned long registered_device_map;
196 unsigned long open_device_map;
197 unsigned long flags;
199 const char *name;
200 int msg_enable;
201 u32 mmio_len;
203 struct work_struct ext_intr_handler_task;
204 struct adapter_params params;
206 struct vlan_group *vlan_grp;
208 /* Terminator modules. */
209 struct sge *sge;
210 struct peespi *espi;
212 struct port_info port[MAX_NPORTS];
213 struct work_struct stats_update_task;
214 struct timer_list stats_update_timer;
216 struct semaphore mib_mutex;
217 spinlock_t tpi_lock;
218 spinlock_t work_lock;
219 /* guards async operations */
220 spinlock_t async_lock ____cacheline_aligned;
221 u32 slow_intr_mask;
224 enum { /* adapter flags */
225 FULL_INIT_DONE = 1 << 0,
226 TSO_CAPABLE = 1 << 2,
227 TCP_CSUM_CAPABLE = 1 << 3,
228 UDP_CSUM_CAPABLE = 1 << 4,
229 VLAN_ACCEL_CAPABLE = 1 << 5,
230 RX_CSUM_ENABLED = 1 << 6,
233 struct mdio_ops;
234 struct gmac;
235 struct gphy;
237 struct board_info {
238 unsigned char board;
239 unsigned char port_number;
240 unsigned long caps;
241 unsigned char chip_term;
242 unsigned char chip_mac;
243 unsigned char chip_phy;
244 unsigned int clock_core;
245 unsigned int clock_mc3;
246 unsigned int clock_mc4;
247 unsigned int espi_nports;
248 unsigned int clock_cspi;
249 unsigned int clock_elmer0;
250 unsigned char mdio_mdien;
251 unsigned char mdio_mdiinv;
252 unsigned char mdio_mdc;
253 unsigned char mdio_phybaseaddr;
254 struct gmac *gmac;
255 struct gphy *gphy;
256 struct mdio_ops *mdio_ops;
257 const char *desc;
260 extern struct pci_device_id t1_pci_tbl[];
262 static inline int adapter_matches_type(const adapter_t *adapter,
263 int version, int revision)
265 return adapter->params.chip_version == version &&
266 adapter->params.chip_revision == revision;
269 #define t1_is_T1B(adap) adapter_matches_type(adap, CHBT_TERM_T1, TERM_T1B)
270 #define is_T2(adap) adapter_matches_type(adap, CHBT_TERM_T2, TERM_T2)
272 /* Returns true if an adapter supports VLAN acceleration and TSO */
273 static inline int vlan_tso_capable(const adapter_t *adapter)
275 return !t1_is_T1B(adapter);
278 #define for_each_port(adapter, iter) \
279 for (iter = 0; iter < (adapter)->params.nports; ++iter)
281 #define board_info(adapter) ((adapter)->params.brd_info)
282 #define is_10G(adapter) (board_info(adapter)->caps & SUPPORTED_10000baseT_Full)
284 static inline unsigned int core_ticks_per_usec(const adapter_t *adap)
286 return board_info(adap)->clock_core / 1000000;
289 extern int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value);
290 extern int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *value);
292 extern void t1_interrupts_enable(adapter_t *adapter);
293 extern void t1_interrupts_disable(adapter_t *adapter);
294 extern void t1_interrupts_clear(adapter_t *adapter);
295 extern int elmer0_ext_intr_handler(adapter_t *adapter);
296 extern int t1_slow_intr_handler(adapter_t *adapter);
298 extern int t1_link_start(struct cphy *phy, struct cmac *mac, struct link_config *lc);
299 extern const struct board_info *t1_get_board_info(unsigned int board_id);
300 extern const struct board_info *t1_get_board_info_from_ids(unsigned int devid,
301 unsigned short ssid);
302 extern int t1_seeprom_read(adapter_t *adapter, u32 addr, u32 *data);
303 extern int t1_get_board_rev(adapter_t *adapter, const struct board_info *bi,
304 struct adapter_params *p);
305 extern int t1_init_hw_modules(adapter_t *adapter);
306 extern int t1_init_sw_modules(adapter_t *adapter, const struct board_info *bi);
307 extern void t1_free_sw_modules(adapter_t *adapter);
308 extern void t1_fatal_err(adapter_t *adapter);
310 extern void t1_tp_set_udp_checksum_offload(adapter_t *adapter, int enable);
311 extern void t1_tp_set_tcp_checksum_offload(adapter_t *adapter, int enable);
312 extern void t1_tp_set_ip_checksum_offload(adapter_t *adapter, int enable);
314 #endif /* _CXGB_COMMON_H_ */