?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
ipc: optimize semget/shmget/msgget for lots of keys
[linux/fpc-iii.git] / drivers / pinctrl / sunxi / pinctrl-sun5i.c
blob47afd558b11484e6ef5dc90932b4c39d2ac017f9
1 /*
2 * Allwinner sun5i SoCs pinctrl driver.
3 *
4 * Copyright (C) 2014-2016 Maxime Ripard <maxime.ripard@free-electrons.com>
5 * Copyright (C) 2016 Mylene Josserand <mylene.josserand@free-electrons.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 */
11
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/of.h>
15 #include <linux/of_device.h>
16 #include <linux/pinctrl/pinctrl.h>
17
18 #include "pinctrl-sunxi.h"
19
20 static const struct sunxi_desc_pin sun5i_pins[] = {
21 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 0),
22 PINCTRL_SUN5I_A10S,
23 SUNXI_FUNCTION(0x0, "gpio_in"),
24 SUNXI_FUNCTION(0x1, "gpio_out"),
25 SUNXI_FUNCTION(0x2, "emac"), /* ERXD3 */
26 SUNXI_FUNCTION(0x3, "ts0"), /* CLK */
27 SUNXI_FUNCTION(0x5, "keypad")), /* IN0 */
28 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 1),
29 PINCTRL_SUN5I_A10S,
30 SUNXI_FUNCTION(0x0, "gpio_in"),
31 SUNXI_FUNCTION(0x1, "gpio_out"),
32 SUNXI_FUNCTION(0x2, "emac"), /* ERXD2 */
33 SUNXI_FUNCTION(0x3, "ts0"), /* ERR */
34 SUNXI_FUNCTION(0x5, "keypad")), /* IN1 */
35 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 2),
36 PINCTRL_SUN5I_A10S,
37 SUNXI_FUNCTION(0x0, "gpio_in"),
38 SUNXI_FUNCTION(0x1, "gpio_out"),
39 SUNXI_FUNCTION(0x2, "emac"), /* ERXD1 */
40 SUNXI_FUNCTION(0x3, "ts0"), /* SYNC */
41 SUNXI_FUNCTION(0x5, "keypad")), /* IN2 */
42 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 3),
43 PINCTRL_SUN5I_A10S,
44 SUNXI_FUNCTION(0x0, "gpio_in"),
45 SUNXI_FUNCTION(0x1, "gpio_out"),
46 SUNXI_FUNCTION(0x2, "emac"), /* ERXD0 */
47 SUNXI_FUNCTION(0x3, "ts0"), /* DLVD */
48 SUNXI_FUNCTION(0x5, "keypad")), /* IN3 */
49 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 4),
50 PINCTRL_SUN5I_A10S,
51 SUNXI_FUNCTION(0x0, "gpio_in"),
52 SUNXI_FUNCTION(0x1, "gpio_out"),
53 SUNXI_FUNCTION(0x2, "emac"), /* ETXD3 */
54 SUNXI_FUNCTION(0x3, "ts0"), /* D0 */
55 SUNXI_FUNCTION(0x5, "keypad")), /* IN4 */
56 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 5),
57 PINCTRL_SUN5I_A10S,
58 SUNXI_FUNCTION(0x0, "gpio_in"),
59 SUNXI_FUNCTION(0x1, "gpio_out"),
60 SUNXI_FUNCTION(0x2, "emac"), /* ETXD2 */
61 SUNXI_FUNCTION(0x3, "ts0"), /* D1 */
62 SUNXI_FUNCTION(0x5, "keypad")), /* IN5 */
63 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 6),
64 PINCTRL_SUN5I_A10S,
65 SUNXI_FUNCTION(0x0, "gpio_in"),
66 SUNXI_FUNCTION(0x1, "gpio_out"),
67 SUNXI_FUNCTION(0x2, "emac"), /* ETXD1 */
68 SUNXI_FUNCTION(0x3, "ts0"), /* D2 */
69 SUNXI_FUNCTION(0x5, "keypad")), /* IN6 */
70 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 7),
71 PINCTRL_SUN5I_A10S,
72 SUNXI_FUNCTION(0x0, "gpio_in"),
73 SUNXI_FUNCTION(0x1, "gpio_out"),
74 SUNXI_FUNCTION(0x2, "emac"), /* ETXD0 */
75 SUNXI_FUNCTION(0x3, "ts0"), /* D3 */
76 SUNXI_FUNCTION(0x5, "keypad")), /* IN7 */
77 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 8),
78 PINCTRL_SUN5I_A10S,
79 SUNXI_FUNCTION(0x0, "gpio_in"),
80 SUNXI_FUNCTION(0x1, "gpio_out"),
81 SUNXI_FUNCTION(0x2, "emac"), /* ERXCK */
82 SUNXI_FUNCTION(0x3, "ts0"), /* D4 */
83 SUNXI_FUNCTION(0x4, "uart1"), /* DTR */
84 SUNXI_FUNCTION(0x5, "keypad")), /* OUT0 */
85 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 9),
86 PINCTRL_SUN5I_A10S,
87 SUNXI_FUNCTION(0x0, "gpio_in"),
88 SUNXI_FUNCTION(0x1, "gpio_out"),
89 SUNXI_FUNCTION(0x2, "emac"), /* ERXERR */
90 SUNXI_FUNCTION(0x3, "ts0"), /* D5 */
91 SUNXI_FUNCTION(0x4, "uart1"), /* DSR */
92 SUNXI_FUNCTION(0x5, "keypad")), /* OUT1 */
93 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 10),
94 PINCTRL_SUN5I_A10S,
95 SUNXI_FUNCTION(0x0, "gpio_in"),
96 SUNXI_FUNCTION(0x1, "gpio_out"),
97 SUNXI_FUNCTION(0x2, "emac"), /* ERXDV */
98 SUNXI_FUNCTION(0x3, "ts0"), /* D6 */
99 SUNXI_FUNCTION(0x4, "uart1"), /* DCD */
100 SUNXI_FUNCTION(0x5, "keypad")), /* OUT2 */
101 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 11),
102 PINCTRL_SUN5I_A10S,
103 SUNXI_FUNCTION(0x0, "gpio_in"),
104 SUNXI_FUNCTION(0x1, "gpio_out"),
105 SUNXI_FUNCTION(0x2, "emac"), /* EMDC */
106 SUNXI_FUNCTION(0x3, "ts0"), /* D7 */
107 SUNXI_FUNCTION(0x4, "uart1"), /* RING */
108 SUNXI_FUNCTION(0x5, "keypad")), /* OUT3 */
109 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 12),
110 PINCTRL_SUN5I_A10S,
111 SUNXI_FUNCTION(0x0, "gpio_in"),
112 SUNXI_FUNCTION(0x1, "gpio_out"),
113 SUNXI_FUNCTION(0x2, "emac"), /* EMDIO */
114 SUNXI_FUNCTION(0x3, "uart1"), /* TX */
115 SUNXI_FUNCTION(0x5, "keypad")), /* OUT4 */
116 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 13),
117 PINCTRL_SUN5I_A10S,
118 SUNXI_FUNCTION(0x0, "gpio_in"),
119 SUNXI_FUNCTION(0x1, "gpio_out"),
120 SUNXI_FUNCTION(0x2, "emac"), /* ETXEN */
121 SUNXI_FUNCTION(0x3, "uart1"), /* RX */
122 SUNXI_FUNCTION(0x5, "keypad")), /* OUT5 */
123 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 14),
124 PINCTRL_SUN5I_A10S,
125 SUNXI_FUNCTION(0x0, "gpio_in"),
126 SUNXI_FUNCTION(0x1, "gpio_out"),
127 SUNXI_FUNCTION(0x2, "emac"), /* ETXCK */
128 SUNXI_FUNCTION(0x3, "uart1"), /* CTS */
129 SUNXI_FUNCTION(0x4, "uart3"), /* TX */
130 SUNXI_FUNCTION(0x5, "keypad")), /* OUT6 */
131 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 15),
132 PINCTRL_SUN5I_A10S,
133 SUNXI_FUNCTION(0x0, "gpio_in"),
134 SUNXI_FUNCTION(0x1, "gpio_out"),
135 SUNXI_FUNCTION(0x2, "emac"), /* ECRS */
136 SUNXI_FUNCTION(0x3, "uart1"), /* RTS */
137 SUNXI_FUNCTION(0x4, "uart3"), /* RX */
138 SUNXI_FUNCTION(0x5, "keypad")), /* OUT7 */
139 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 16),
140 PINCTRL_SUN5I_A10S,
141 SUNXI_FUNCTION(0x0, "gpio_in"),
142 SUNXI_FUNCTION(0x1, "gpio_out"),
143 SUNXI_FUNCTION(0x2, "emac"), /* ECOL */
144 SUNXI_FUNCTION(0x3, "uart2")), /* TX */
145 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(A, 17),
146 PINCTRL_SUN5I_A10S,
147 SUNXI_FUNCTION(0x0, "gpio_in"),
148 SUNXI_FUNCTION(0x1, "gpio_out"),
149 SUNXI_FUNCTION(0x2, "emac"), /* ETXERR */
150 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
151 SUNXI_FUNCTION_IRQ(0x6, 31)), /* EINT31 */
152 /* Hole */
153 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 0),
154 SUNXI_FUNCTION(0x0, "gpio_in"),
155 SUNXI_FUNCTION(0x1, "gpio_out"),
156 SUNXI_FUNCTION(0x2, "i2c0")), /* SCK */
157 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 1),
158 SUNXI_FUNCTION(0x0, "gpio_in"),
159 SUNXI_FUNCTION(0x1, "gpio_out"),
160 SUNXI_FUNCTION(0x2, "i2c0")), /* SDA */
161 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 2),
162 SUNXI_FUNCTION(0x0, "gpio_in"),
163 SUNXI_FUNCTION(0x1, "gpio_out"),
164 SUNXI_FUNCTION(0x2, "pwm"), /* PWM0 */
165 SUNXI_FUNCTION_VARIANT(0x3,
166 "spdif", /* DO */
167 PINCTRL_SUN5I_GR8),
168 SUNXI_FUNCTION_IRQ(0x6, 16)), /* EINT16 */
169 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 3),
170 SUNXI_FUNCTION(0x0, "gpio_in"),
171 SUNXI_FUNCTION(0x1, "gpio_out"),
172 SUNXI_FUNCTION(0x2, "ir0"), /* TX */
173 SUNXI_FUNCTION_IRQ(0x6, 17)), /* EINT17 */
174 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 4),
175 SUNXI_FUNCTION(0x0, "gpio_in"),
176 SUNXI_FUNCTION(0x1, "gpio_out"),
177 SUNXI_FUNCTION(0x2, "ir0"), /* RX */
178 SUNXI_FUNCTION_IRQ(0x6, 18)), /* EINT18 */
179 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 5),
180 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
181 SUNXI_FUNCTION(0x0, "gpio_in"),
182 SUNXI_FUNCTION(0x1, "gpio_out"),
183 SUNXI_FUNCTION(0x2, "i2s"), /* MCLK */
184 SUNXI_FUNCTION_IRQ(0x6, 19)), /* EINT19 */
185 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 6),
186 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
187 SUNXI_FUNCTION(0x0, "gpio_in"),
188 SUNXI_FUNCTION(0x1, "gpio_out"),
189 SUNXI_FUNCTION(0x2, "i2s"), /* BCLK */
190 SUNXI_FUNCTION_IRQ(0x6, 20)), /* EINT20 */
191 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 7),
192 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
193 SUNXI_FUNCTION(0x0, "gpio_in"),
194 SUNXI_FUNCTION(0x1, "gpio_out"),
195 SUNXI_FUNCTION(0x2, "i2s"), /* LRCK */
196 SUNXI_FUNCTION_IRQ(0x6, 21)), /* EINT21 */
197 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 8),
198 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
199 SUNXI_FUNCTION(0x0, "gpio_in"),
200 SUNXI_FUNCTION(0x1, "gpio_out"),
201 SUNXI_FUNCTION(0x2, "i2s"), /* DO */
202 SUNXI_FUNCTION_IRQ(0x6, 22)), /* EINT22 */
203 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 9),
204 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
205 SUNXI_FUNCTION(0x0, "gpio_in"),
206 SUNXI_FUNCTION(0x1, "gpio_out"),
207 SUNXI_FUNCTION(0x2, "i2s"), /* DI */
208 SUNXI_FUNCTION_VARIANT(0x3,
209 "spdif", /* DI */
210 PINCTRL_SUN5I_GR8),
211 SUNXI_FUNCTION_IRQ(0x6, 23)), /* EINT23 */
212 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 10),
213 SUNXI_FUNCTION(0x0, "gpio_in"),
214 SUNXI_FUNCTION(0x1, "gpio_out"),
215 SUNXI_FUNCTION(0x2, "spi2"), /* CS1 */
216 SUNXI_FUNCTION_VARIANT(0x3,
217 "spdif", /* DO */
218 PINCTRL_SUN5I_GR8),
219 SUNXI_FUNCTION_IRQ(0x6, 24)), /* EINT24 */
220 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 11),
221 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
222 SUNXI_FUNCTION(0x0, "gpio_in"),
223 SUNXI_FUNCTION(0x1, "gpio_out"),
224 SUNXI_FUNCTION(0x2, "spi2"), /* CS0 */
225 SUNXI_FUNCTION(0x3, "jtag"), /* MS0 */
226 SUNXI_FUNCTION_IRQ(0x6, 25)), /* EINT25 */
227 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 12),
228 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
229 SUNXI_FUNCTION(0x0, "gpio_in"),
230 SUNXI_FUNCTION(0x1, "gpio_out"),
231 SUNXI_FUNCTION(0x2, "spi2"), /* CLK */
232 SUNXI_FUNCTION(0x3, "jtag"), /* CK0 */
233 SUNXI_FUNCTION_IRQ(0x6, 26)), /* EINT26 */
234 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 13),
235 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
236 SUNXI_FUNCTION(0x0, "gpio_in"),
237 SUNXI_FUNCTION(0x1, "gpio_out"),
238 SUNXI_FUNCTION(0x2, "spi2"), /* MOSI */
239 SUNXI_FUNCTION(0x3, "jtag"), /* DO0 */
240 SUNXI_FUNCTION_IRQ(0x6, 27)), /* EINT27 */
241 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 14),
242 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
243 SUNXI_FUNCTION(0x0, "gpio_in"),
244 SUNXI_FUNCTION(0x1, "gpio_out"),
245 SUNXI_FUNCTION(0x2, "spi2"), /* MISO */
246 SUNXI_FUNCTION(0x3, "jtag"), /* DI0 */
247 SUNXI_FUNCTION_IRQ(0x6, 28)), /* EINT28 */
248 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 15),
249 SUNXI_FUNCTION(0x0, "gpio_in"),
250 SUNXI_FUNCTION(0x1, "gpio_out"),
251 SUNXI_FUNCTION(0x2, "i2c1")), /* SCK */
252 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 16),
253 SUNXI_FUNCTION(0x0, "gpio_in"),
254 SUNXI_FUNCTION(0x1, "gpio_out"),
255 SUNXI_FUNCTION(0x2, "i2c1")), /* SDA */
256 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 17),
257 SUNXI_FUNCTION(0x0, "gpio_in"),
258 SUNXI_FUNCTION(0x1, "gpio_out"),
259 SUNXI_FUNCTION(0x2, "i2c2")), /* SCK */
260 SUNXI_PIN(SUNXI_PINCTRL_PIN(B, 18),
261 SUNXI_FUNCTION(0x0, "gpio_in"),
262 SUNXI_FUNCTION(0x1, "gpio_out"),
263 SUNXI_FUNCTION(0x2, "i2c2")), /* SDA */
264 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 19),
265 PINCTRL_SUN5I_A10S,
266 SUNXI_FUNCTION(0x0, "gpio_in"),
267 SUNXI_FUNCTION(0x1, "gpio_out"),
268 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
269 SUNXI_FUNCTION_IRQ(0x6, 29)), /* EINT29 */
270 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(B, 20),
271 PINCTRL_SUN5I_A10S,
272 SUNXI_FUNCTION(0x0, "gpio_in"),
273 SUNXI_FUNCTION(0x1, "gpio_out"),
274 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
275 SUNXI_FUNCTION_IRQ(0x6, 30)), /* EINT30 */
276 /* Hole */
277 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
278 SUNXI_FUNCTION(0x0, "gpio_in"),
279 SUNXI_FUNCTION(0x1, "gpio_out"),
280 SUNXI_FUNCTION(0x2, "nand0"), /* NWE */
281 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
282 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
283 SUNXI_FUNCTION(0x0, "gpio_in"),
284 SUNXI_FUNCTION(0x1, "gpio_out"),
285 SUNXI_FUNCTION(0x2, "nand0"), /* NALE */
286 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
287 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
288 SUNXI_FUNCTION(0x0, "gpio_in"),
289 SUNXI_FUNCTION(0x1, "gpio_out"),
290 SUNXI_FUNCTION(0x2, "nand0"), /* NCLE */
291 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
292 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
293 SUNXI_FUNCTION(0x0, "gpio_in"),
294 SUNXI_FUNCTION(0x1, "gpio_out"),
295 SUNXI_FUNCTION(0x2, "nand0"), /* NCE1 */
296 SUNXI_FUNCTION(0x3, "spi0")), /* CS0 */
297 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
298 SUNXI_FUNCTION(0x0, "gpio_in"),
299 SUNXI_FUNCTION(0x1, "gpio_out"),
300 SUNXI_FUNCTION(0x2, "nand0")), /* NCE0 */
301 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
302 SUNXI_FUNCTION(0x0, "gpio_in"),
303 SUNXI_FUNCTION(0x1, "gpio_out"),
304 SUNXI_FUNCTION(0x2, "nand0")), /* NRE */
305 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
306 SUNXI_FUNCTION(0x0, "gpio_in"),
307 SUNXI_FUNCTION(0x1, "gpio_out"),
308 SUNXI_FUNCTION(0x2, "nand0"), /* NRB0 */
309 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
310 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
311 SUNXI_FUNCTION(0x0, "gpio_in"),
312 SUNXI_FUNCTION(0x1, "gpio_out"),
313 SUNXI_FUNCTION(0x2, "nand0"), /* NRB1 */
314 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
315 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
316 SUNXI_FUNCTION(0x0, "gpio_in"),
317 SUNXI_FUNCTION(0x1, "gpio_out"),
318 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ0 */
319 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
320 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
321 SUNXI_FUNCTION(0x0, "gpio_in"),
322 SUNXI_FUNCTION(0x1, "gpio_out"),
323 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ1 */
324 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
325 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
326 SUNXI_FUNCTION(0x0, "gpio_in"),
327 SUNXI_FUNCTION(0x1, "gpio_out"),
328 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ2 */
329 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
330 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
331 SUNXI_FUNCTION(0x0, "gpio_in"),
332 SUNXI_FUNCTION(0x1, "gpio_out"),
333 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ3 */
334 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
335 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
336 SUNXI_FUNCTION(0x0, "gpio_in"),
337 SUNXI_FUNCTION(0x1, "gpio_out"),
338 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ4 */
339 SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
340 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
341 SUNXI_FUNCTION(0x0, "gpio_in"),
342 SUNXI_FUNCTION(0x1, "gpio_out"),
343 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ5 */
344 SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
345 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
346 SUNXI_FUNCTION(0x0, "gpio_in"),
347 SUNXI_FUNCTION(0x1, "gpio_out"),
348 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ6 */
349 SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
350 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
351 SUNXI_FUNCTION(0x0, "gpio_in"),
352 SUNXI_FUNCTION(0x1, "gpio_out"),
353 SUNXI_FUNCTION(0x2, "nand0"), /* NDQ7 */
354 SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
355 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 16),
356 PINCTRL_SUN5I_A10S,
357 SUNXI_FUNCTION(0x0, "gpio_in"),
358 SUNXI_FUNCTION(0x1, "gpio_out"),
359 SUNXI_FUNCTION(0x2, "nand0"), /* NWP */
360 SUNXI_FUNCTION(0x4, "uart3")), /* TX */
361 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 17),
362 PINCTRL_SUN5I_A10S,
363 SUNXI_FUNCTION(0x0, "gpio_in"),
364 SUNXI_FUNCTION(0x1, "gpio_out"),
365 SUNXI_FUNCTION(0x2, "nand0"), /* NCE2 */
366 SUNXI_FUNCTION(0x4, "uart3")), /* RX */
367 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(C, 18),
368 PINCTRL_SUN5I_A10S,
369 SUNXI_FUNCTION(0x0, "gpio_in"),
370 SUNXI_FUNCTION(0x1, "gpio_out"),
371 SUNXI_FUNCTION(0x2, "nand0"), /* NCE3 */
372 SUNXI_FUNCTION(0x3, "uart2"), /* TX */
373 SUNXI_FUNCTION(0x4, "uart3")), /* CTS */
374 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 19),
375 SUNXI_FUNCTION(0x0, "gpio_in"),
376 SUNXI_FUNCTION(0x1, "gpio_out"),
377 SUNXI_FUNCTION(0x2, "nand0"), /* NCE4 */
378 SUNXI_FUNCTION(0x3, "uart2"), /* RX */
379 SUNXI_FUNCTION(0x4, "uart3")), /* RTS */
380 /* Hole */
381 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 0),
382 PINCTRL_SUN5I_A10S,
383 SUNXI_FUNCTION(0x0, "gpio_in"),
384 SUNXI_FUNCTION(0x1, "gpio_out"),
385 SUNXI_FUNCTION(0x2, "lcd0")), /* D0 */
386 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 1),
387 PINCTRL_SUN5I_A10S,
388 SUNXI_FUNCTION(0x0, "gpio_in"),
389 SUNXI_FUNCTION(0x1, "gpio_out"),
390 SUNXI_FUNCTION(0x2, "lcd0")), /* D1 */
391 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
392 SUNXI_FUNCTION(0x0, "gpio_in"),
393 SUNXI_FUNCTION(0x1, "gpio_out"),
394 SUNXI_FUNCTION(0x2, "lcd0"), /* D2 */
395 SUNXI_FUNCTION(0x3, "uart2")), /* TX */
396 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
397 SUNXI_FUNCTION(0x0, "gpio_in"),
398 SUNXI_FUNCTION(0x1, "gpio_out"),
399 SUNXI_FUNCTION(0x2, "lcd0"), /* D3 */
400 SUNXI_FUNCTION(0x3, "uart2")), /* RX */
401 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
402 SUNXI_FUNCTION(0x0, "gpio_in"),
403 SUNXI_FUNCTION(0x1, "gpio_out"),
404 SUNXI_FUNCTION(0x2, "lcd0"), /* D4 */
405 SUNXI_FUNCTION(0x3, "uart2")), /* CTS */
406 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
407 SUNXI_FUNCTION(0x0, "gpio_in"),
408 SUNXI_FUNCTION(0x1, "gpio_out"),
409 SUNXI_FUNCTION(0x2, "lcd0"), /* D5 */
410 SUNXI_FUNCTION(0x3, "uart2")), /* RTS */
411 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
412 SUNXI_FUNCTION(0x0, "gpio_in"),
413 SUNXI_FUNCTION(0x1, "gpio_out"),
414 SUNXI_FUNCTION(0x2, "lcd0"), /* D6 */
415 SUNXI_FUNCTION(0x3, "emac")), /* ECRS */
416 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
417 SUNXI_FUNCTION(0x0, "gpio_in"),
418 SUNXI_FUNCTION(0x1, "gpio_out"),
419 SUNXI_FUNCTION(0x2, "lcd0"), /* D7 */
420 SUNXI_FUNCTION(0x3, "emac")), /* ECOL */
421 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 8),
422 PINCTRL_SUN5I_A10S,
423 SUNXI_FUNCTION(0x0, "gpio_in"),
424 SUNXI_FUNCTION(0x1, "gpio_out"),
425 SUNXI_FUNCTION(0x2, "lcd0")), /* D8 */
426 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 9),
427 PINCTRL_SUN5I_A10S,
428 SUNXI_FUNCTION(0x0, "gpio_in"),
429 SUNXI_FUNCTION(0x1, "gpio_out"),
430 SUNXI_FUNCTION(0x2, "lcd0")), /* D9 */
431 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
432 SUNXI_FUNCTION(0x0, "gpio_in"),
433 SUNXI_FUNCTION(0x1, "gpio_out"),
434 SUNXI_FUNCTION(0x2, "lcd0"), /* D10 */
435 SUNXI_FUNCTION(0x3, "emac")), /* ERXD0 */
436 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
437 SUNXI_FUNCTION(0x0, "gpio_in"),
438 SUNXI_FUNCTION(0x1, "gpio_out"),
439 SUNXI_FUNCTION(0x2, "lcd0"), /* D11 */
440 SUNXI_FUNCTION(0x3, "emac")), /* ERXD1 */
441 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
442 SUNXI_FUNCTION(0x0, "gpio_in"),
443 SUNXI_FUNCTION(0x1, "gpio_out"),
444 SUNXI_FUNCTION(0x2, "lcd0"), /* D12 */
445 SUNXI_FUNCTION(0x3, "emac")), /* ERXD2 */
446 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
447 SUNXI_FUNCTION(0x0, "gpio_in"),
448 SUNXI_FUNCTION(0x1, "gpio_out"),
449 SUNXI_FUNCTION(0x2, "lcd0"), /* D13 */
450 SUNXI_FUNCTION(0x3, "emac")), /* ERXD3 */
451 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
452 SUNXI_FUNCTION(0x0, "gpio_in"),
453 SUNXI_FUNCTION(0x1, "gpio_out"),
454 SUNXI_FUNCTION(0x2, "lcd0"), /* D14 */
455 SUNXI_FUNCTION(0x3, "emac")), /* ERXCK */
456 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
457 SUNXI_FUNCTION(0x0, "gpio_in"),
458 SUNXI_FUNCTION(0x1, "gpio_out"),
459 SUNXI_FUNCTION(0x2, "lcd0"), /* D15 */
460 SUNXI_FUNCTION(0x3, "emac")), /* ERXERR */
461 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 16),
462 PINCTRL_SUN5I_A10S,
463 SUNXI_FUNCTION(0x0, "gpio_in"),
464 SUNXI_FUNCTION(0x1, "gpio_out"),
465 SUNXI_FUNCTION(0x2, "lcd0")), /* D16 */
466 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(D, 17),
467 PINCTRL_SUN5I_A10S,
468 SUNXI_FUNCTION(0x0, "gpio_in"),
469 SUNXI_FUNCTION(0x1, "gpio_out"),
470 SUNXI_FUNCTION(0x2, "lcd0")), /* D17 */
471 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 18),
472 SUNXI_FUNCTION(0x0, "gpio_in"),
473 SUNXI_FUNCTION(0x1, "gpio_out"),
474 SUNXI_FUNCTION(0x2, "lcd0"), /* D18 */
475 SUNXI_FUNCTION(0x3, "emac")), /* ERXDV */
476 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 19),
477 SUNXI_FUNCTION(0x0, "gpio_in"),
478 SUNXI_FUNCTION(0x1, "gpio_out"),
479 SUNXI_FUNCTION(0x2, "lcd0"), /* D19 */
480 SUNXI_FUNCTION(0x3, "emac")), /* ETXD0 */
481 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 20),
482 SUNXI_FUNCTION(0x0, "gpio_in"),
483 SUNXI_FUNCTION(0x1, "gpio_out"),
484 SUNXI_FUNCTION(0x2, "lcd0"), /* D20 */
485 SUNXI_FUNCTION(0x3, "emac")), /* ETXD1 */
486 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 21),
487 SUNXI_FUNCTION(0x0, "gpio_in"),
488 SUNXI_FUNCTION(0x1, "gpio_out"),
489 SUNXI_FUNCTION(0x2, "lcd0"), /* D21 */
490 SUNXI_FUNCTION(0x3, "emac")), /* ETXD2 */
491 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 22),
492 SUNXI_FUNCTION(0x0, "gpio_in"),
493 SUNXI_FUNCTION(0x1, "gpio_out"),
494 SUNXI_FUNCTION(0x2, "lcd0"), /* D22 */
495 SUNXI_FUNCTION(0x3, "emac")), /* ETXD3 */
496 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 23),
497 SUNXI_FUNCTION(0x0, "gpio_in"),
498 SUNXI_FUNCTION(0x1, "gpio_out"),
499 SUNXI_FUNCTION(0x2, "lcd0"), /* D23 */
500 SUNXI_FUNCTION(0x3, "emac")), /* ETXEN */
501 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 24),
502 SUNXI_FUNCTION(0x0, "gpio_in"),
503 SUNXI_FUNCTION(0x1, "gpio_out"),
504 SUNXI_FUNCTION(0x2, "lcd0"), /* CLK */
505 SUNXI_FUNCTION(0x3, "emac")), /* ETXCK */
506 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 25),
507 SUNXI_FUNCTION(0x0, "gpio_in"),
508 SUNXI_FUNCTION(0x1, "gpio_out"),
509 SUNXI_FUNCTION(0x2, "lcd0"), /* DE */
510 SUNXI_FUNCTION(0x3, "emac")), /* ETXERR */
511 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 26),
512 SUNXI_FUNCTION(0x0, "gpio_in"),
513 SUNXI_FUNCTION(0x1, "gpio_out"),
514 SUNXI_FUNCTION(0x2, "lcd0"), /* HSYNC */
515 SUNXI_FUNCTION(0x3, "emac")), /* EMDC */
516 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 27),
517 SUNXI_FUNCTION(0x0, "gpio_in"),
518 SUNXI_FUNCTION(0x1, "gpio_out"),
519 SUNXI_FUNCTION(0x2, "lcd0"), /* VSYNC */
520 SUNXI_FUNCTION(0x3, "emac")), /* EMDIO */
521 /* Hole */
522 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
523 SUNXI_FUNCTION(0x0, "gpio_in"),
524 SUNXI_FUNCTION(0x2, "ts0"), /* CLK */
525 SUNXI_FUNCTION(0x3, "csi0"), /* PCK */
526 SUNXI_FUNCTION(0x4, "spi2"), /* CS0 */
527 SUNXI_FUNCTION_IRQ(0x6, 14)), /* EINT14 */
528 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
529 SUNXI_FUNCTION(0x0, "gpio_in"),
530 SUNXI_FUNCTION(0x2, "ts0"), /* ERR */
531 SUNXI_FUNCTION(0x3, "csi0"), /* CK */
532 SUNXI_FUNCTION(0x4, "spi2"), /* CLK */
533 SUNXI_FUNCTION_IRQ(0x6, 15)), /* EINT15 */
534 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
535 SUNXI_FUNCTION(0x0, "gpio_in"),
536 SUNXI_FUNCTION(0x2, "ts0"), /* SYNC */
537 SUNXI_FUNCTION(0x3, "csi0"), /* HSYNC */
538 SUNXI_FUNCTION(0x4, "spi2")), /* MOSI */
539 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
540 SUNXI_FUNCTION(0x0, "gpio_in"),
541 SUNXI_FUNCTION(0x1, "gpio_out"),
542 SUNXI_FUNCTION(0x2, "ts0"), /* DVLD */
543 SUNXI_FUNCTION(0x3, "csi0"), /* VSYNC */
544 SUNXI_FUNCTION(0x4, "spi2")), /* MISO */
545 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
546 SUNXI_FUNCTION(0x0, "gpio_in"),
547 SUNXI_FUNCTION(0x1, "gpio_out"),
548 SUNXI_FUNCTION(0x2, "ts0"), /* D0 */
549 SUNXI_FUNCTION(0x3, "csi0"), /* D0 */
550 SUNXI_FUNCTION(0x4, "mmc2")), /* D0 */
551 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
552 SUNXI_FUNCTION(0x0, "gpio_in"),
553 SUNXI_FUNCTION(0x1, "gpio_out"),
554 SUNXI_FUNCTION(0x2, "ts0"), /* D1 */
555 SUNXI_FUNCTION(0x3, "csi0"), /* D1 */
556 SUNXI_FUNCTION(0x4, "mmc2")), /* D1 */
557 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
558 SUNXI_FUNCTION(0x0, "gpio_in"),
559 SUNXI_FUNCTION(0x1, "gpio_out"),
560 SUNXI_FUNCTION(0x2, "ts0"), /* D2 */
561 SUNXI_FUNCTION(0x3, "csi0"), /* D2 */
562 SUNXI_FUNCTION(0x4, "mmc2")), /* D2 */
563 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
564 SUNXI_FUNCTION(0x0, "gpio_in"),
565 SUNXI_FUNCTION(0x1, "gpio_out"),
566 SUNXI_FUNCTION(0x2, "ts0"), /* D3 */
567 SUNXI_FUNCTION(0x3, "csi0"), /* D3 */
568 SUNXI_FUNCTION(0x4, "mmc2")), /* D3 */
569 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
570 SUNXI_FUNCTION(0x0, "gpio_in"),
571 SUNXI_FUNCTION(0x1, "gpio_out"),
572 SUNXI_FUNCTION(0x2, "ts0"), /* D4 */
573 SUNXI_FUNCTION(0x3, "csi0"), /* D4 */
574 SUNXI_FUNCTION(0x4, "mmc2")), /* CMD */
575 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
576 SUNXI_FUNCTION(0x0, "gpio_in"),
577 SUNXI_FUNCTION(0x1, "gpio_out"),
578 SUNXI_FUNCTION(0x2, "ts0"), /* D5 */
579 SUNXI_FUNCTION(0x3, "csi0"), /* D5 */
580 SUNXI_FUNCTION(0x4, "mmc2")), /* CLK */
581 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
582 SUNXI_FUNCTION(0x0, "gpio_in"),
583 SUNXI_FUNCTION(0x1, "gpio_out"),
584 SUNXI_FUNCTION(0x2, "ts0"), /* D6 */
585 SUNXI_FUNCTION(0x3, "csi0"), /* D6 */
586 SUNXI_FUNCTION(0x4, "uart1")), /* TX */
587 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
588 SUNXI_FUNCTION(0x0, "gpio_in"),
589 SUNXI_FUNCTION(0x1, "gpio_out"),
590 SUNXI_FUNCTION(0x2, "ts0"), /* D7 */
591 SUNXI_FUNCTION(0x3, "csi0"), /* D7 */
592 SUNXI_FUNCTION(0x4, "uart1")), /* RX */
593 /* Hole */
594 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
595 SUNXI_FUNCTION(0x0, "gpio_in"),
596 SUNXI_FUNCTION(0x1, "gpio_out"),
597 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
598 SUNXI_FUNCTION(0x4, "jtag")), /* MS1 */
599 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
600 SUNXI_FUNCTION(0x0, "gpio_in"),
601 SUNXI_FUNCTION(0x1, "gpio_out"),
602 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
603 SUNXI_FUNCTION(0x4, "jtag")), /* DI1 */
604 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
605 SUNXI_FUNCTION(0x0, "gpio_in"),
606 SUNXI_FUNCTION(0x1, "gpio_out"),
607 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
608 SUNXI_FUNCTION(0x4, "uart0")), /* TX */
609 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
610 SUNXI_FUNCTION(0x0, "gpio_in"),
611 SUNXI_FUNCTION(0x1, "gpio_out"),
612 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
613 SUNXI_FUNCTION(0x4, "jtag")), /* DO1 */
614 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
615 SUNXI_FUNCTION(0x0, "gpio_in"),
616 SUNXI_FUNCTION(0x1, "gpio_out"),
617 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
618 SUNXI_FUNCTION(0x4, "uart0")), /* RX */
619 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
620 SUNXI_FUNCTION(0x0, "gpio_in"),
621 SUNXI_FUNCTION(0x1, "gpio_out"),
622 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
623 SUNXI_FUNCTION(0x4, "jtag")), /* CK1 */
624 /* Hole */
625 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
626 SUNXI_FUNCTION(0x0, "gpio_in"),
627 SUNXI_FUNCTION(0x2, "gps"), /* CLK */
628 SUNXI_FUNCTION_IRQ(0x6, 0)), /* EINT0 */
629 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
630 SUNXI_FUNCTION(0x0, "gpio_in"),
631 SUNXI_FUNCTION(0x2, "gps"), /* SIGN */
632 SUNXI_FUNCTION_IRQ(0x6, 1)), /* EINT1 */
633 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
634 SUNXI_FUNCTION(0x0, "gpio_in"),
635 SUNXI_FUNCTION(0x2, "gps"), /* MAG */
636 SUNXI_FUNCTION_IRQ(0x6, 2)), /* EINT2 */
637 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
638 SUNXI_FUNCTION(0x0, "gpio_in"),
639 SUNXI_FUNCTION(0x1, "gpio_out"),
640 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
641 SUNXI_FUNCTION(0x4, "uart1"), /* TX */
642 SUNXI_FUNCTION_IRQ(0x6, 3)), /* EINT3 */
643 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
644 SUNXI_FUNCTION(0x0, "gpio_in"),
645 SUNXI_FUNCTION(0x1, "gpio_out"),
646 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
647 SUNXI_FUNCTION(0x4, "uart1"), /* RX */
648 SUNXI_FUNCTION_IRQ(0x6, 4)), /* EINT4 */
649 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 5),
650 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
651 SUNXI_FUNCTION(0x0, "gpio_in"),
652 SUNXI_FUNCTION(0x1, "gpio_out"),
653 SUNXI_FUNCTION(0x2, "mmc1"), /* DO */
654 SUNXI_FUNCTION(0x4, "uart1"), /* CTS */
655 SUNXI_FUNCTION_IRQ(0x6, 5)), /* EINT5 */
656 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 6),
657 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
658 SUNXI_FUNCTION(0x0, "gpio_in"),
659 SUNXI_FUNCTION(0x1, "gpio_out"),
660 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
661 SUNXI_FUNCTION(0x4, "uart1"), /* RTS */
662 SUNXI_FUNCTION(0x5, "uart2"), /* RTS */
663 SUNXI_FUNCTION_IRQ(0x6, 6)), /* EINT6 */
664 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 7),
665 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
666 SUNXI_FUNCTION(0x0, "gpio_in"),
667 SUNXI_FUNCTION(0x1, "gpio_out"),
668 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
669 SUNXI_FUNCTION(0x5, "uart2"), /* TX */
670 SUNXI_FUNCTION_IRQ(0x6, 7)), /* EINT7 */
671 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 8),
672 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
673 SUNXI_FUNCTION(0x0, "gpio_in"),
674 SUNXI_FUNCTION(0x1, "gpio_out"),
675 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
676 SUNXI_FUNCTION(0x5, "uart2"), /* RX */
677 SUNXI_FUNCTION_IRQ(0x6, 8)), /* EINT8 */
678 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
679 SUNXI_FUNCTION(0x0, "gpio_in"),
680 SUNXI_FUNCTION(0x1, "gpio_out"),
681 SUNXI_FUNCTION(0x2, "spi1"), /* CS0 */
682 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
683 SUNXI_FUNCTION_IRQ(0x6, 9)), /* EINT9 */
684 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
685 SUNXI_FUNCTION(0x0, "gpio_in"),
686 SUNXI_FUNCTION(0x1, "gpio_out"),
687 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
688 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
689 SUNXI_FUNCTION_IRQ(0x6, 10)), /* EINT10 */
690 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
691 SUNXI_FUNCTION(0x0, "gpio_in"),
692 SUNXI_FUNCTION(0x1, "gpio_out"),
693 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
694 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
695 SUNXI_FUNCTION_IRQ(0x6, 11)), /* EINT11 */
696 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
697 SUNXI_FUNCTION(0x0, "gpio_in"),
698 SUNXI_FUNCTION(0x1, "gpio_out"),
699 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
700 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
701 SUNXI_FUNCTION_IRQ(0x6, 12)), /* EINT12 */
702 SUNXI_PIN_VARIANT(SUNXI_PINCTRL_PIN(G, 13),
703 PINCTRL_SUN5I_A10S | PINCTRL_SUN5I_GR8,
704 SUNXI_FUNCTION(0x0, "gpio_in"),
705 SUNXI_FUNCTION(0x1, "gpio_out"),
706 SUNXI_FUNCTION(0x2, "spi1"), /* CS1 */
707 SUNXI_FUNCTION(0x3, "pwm"), /* PWM1 */
708 SUNXI_FUNCTION(0x5, "uart2"), /* CTS */
709 SUNXI_FUNCTION_IRQ(0x6, 13)), /* EINT13 */
710 };
711
712 static const struct sunxi_pinctrl_desc sun5i_pinctrl_data = {
713 .pins = sun5i_pins,
714 .npins = ARRAY_SIZE(sun5i_pins),
715 .irq_banks = 1,
716 };
717
718 static int sun5i_pinctrl_probe(struct platform_device *pdev)
719 {
720 unsigned long variant = (unsigned long)of_device_get_match_data(&pdev->dev);
721
722 return sunxi_pinctrl_init_with_variant(pdev, &sun5i_pinctrl_data,
723 variant);
724 }
725
726 static const struct of_device_id sun5i_pinctrl_match[] = {
727 {
728 .compatible = "allwinner,sun5i-a10s-pinctrl",
729 .data = (void *)PINCTRL_SUN5I_A10S
730 },
731 {
732 .compatible = "allwinner,sun5i-a13-pinctrl",
733 .data = (void *)PINCTRL_SUN5I_A13
734 },
735 {
736 .compatible = "nextthing,gr8-pinctrl",
737 .data = (void *)PINCTRL_SUN5I_GR8
738 },
739 { },
740 };
741
742 static struct platform_driver sun5i_pinctrl_driver = {
743 .probe = sun5i_pinctrl_probe,
744 .driver = {
745 .name = "sun5i-pinctrl",
746 .of_match_table = sun5i_pinctrl_match,
747 },
748 };
749 builtin_platform_driver(sun5i_pinctrl_driver);
Linux with added FPC-III support