arch/arm/kernel/debug.S

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  *  linux/arch/arm/kernel/debug.S
   4  *
   5  *  Copyright (C) 1994-1999 Russell King
   6  *
   7  *  32-bit debugging code
   8  */
   9 #include <linux/linkage.h>
  10 #include <asm/assembler.h>
  11
  12                 .text
  13
  14 /*
  15  * Some debugging routines (useful if you've got MM problems and
  16  * printk isn't working).  For DEBUGGING ONLY!!!  Do not leave
  17  * references to these in a production kernel!
  18  */
  19
  20 #if !defined(CONFIG_DEBUG_SEMIHOSTING)
  21 #include CONFIG_DEBUG_LL_INCLUDE
  22 #endif
  23
  24 #ifdef CONFIG_MMU
  25                 .macro  addruart_current, rx, tmp1, tmp2
  26                 addruart        \tmp1, \tmp2, \rx
  27                 mrc             p15, 0, \rx, c1, c0
  28                 tst             \rx, #1
  29                 moveq           \rx, \tmp1
  30                 movne           \rx, \tmp2
  31                 .endm
  32
  33 #else /* !CONFIG_MMU */
  34                 .macro  addruart_current, rx, tmp1, tmp2
  35                 addruart        \rx, \tmp1, \tmp2
  36                 .endm
  37
  38 #endif /* CONFIG_MMU */
  39
  40 /*
  41  * Useful debugging routines
  42  */
  43 ENTRY(printhex8)
  44                 mov     r1, #8
  45                 b       printhex
  46 ENDPROC(printhex8)
  47
  48 ENTRY(printhex4)
  49                 mov     r1, #4
  50                 b       printhex
  51 ENDPROC(printhex4)
  52
  53 ENTRY(printhex2)
  54                 mov     r1, #2
  55 printhex:       adr     r2, hexbuf_rel
  56                 ldr     r3, [r2]
  57                 add     r2, r2, r3
  58                 add     r3, r2, r1
  59                 mov     r1, #0
  60                 strb    r1, [r3]
  61 1:              and     r1, r0, #15
  62                 mov     r0, r0, lsr #4
  63                 cmp     r1, #10
  64                 addlt   r1, r1, #'0'
  65                 addge   r1, r1, #'a' - 10
  66                 strb    r1, [r3, #-1]!
  67                 teq     r3, r2
  68                 bne     1b
  69                 mov     r0, r2
  70                 b       printascii
  71 ENDPROC(printhex2)
  72
  73                 .pushsection .bss
  74 hexbuf_addr:    .space 16
  75                 .popsection
  76                 .align
  77 hexbuf_rel:     .long   hexbuf_addr - .
  78
  79                 .ltorg
  80
  81 #ifndef CONFIG_DEBUG_SEMIHOSTING
  82
  83 ENTRY(printascii)
  84                 addruart_current r3, r1, r2
  85 1:              teq     r0, #0
  86                 ldrbne  r1, [r0], #1
  87                 teqne   r1, #0
  88                 reteq   lr
  89 2:              teq     r1, #'\n'
  90                 bne     3f
  91                 mov     r1, #'\r'
  92                 waituart r2, r3
  93                 senduart r1, r3
  94                 busyuart r2, r3
  95                 mov     r1, #'\n'
  96 3:              waituart r2, r3
  97                 senduart r1, r3
  98                 busyuart r2, r3
  99                 b       1b
 100 ENDPROC(printascii)
 101
 102 ENTRY(printch)
 103                 addruart_current r3, r1, r2
 104                 mov     r1, r0
 105                 mov     r0, #0
 106                 b       2b
 107 ENDPROC(printch)
 108
 109 #ifdef CONFIG_MMU
 110 ENTRY(debug_ll_addr)
 111                 addruart r2, r3, ip
 112                 str     r2, [r0]
 113                 str     r3, [r1]
 114                 ret     lr
 115 ENDPROC(debug_ll_addr)
 116 #endif
 117
 118 #else
 119
 120 ENTRY(printascii)
 121                 mov     r1, r0
 122                 mov     r0, #0x04               @ SYS_WRITE0
 123         ARM(    svc     #0x123456       )
 124 #ifdef CONFIG_CPU_V7M
 125         THUMB(  bkpt    #0xab           )
 126 #else
 127         THUMB(  svc     #0xab           )
 128 #endif
 129                 ret     lr
 130 ENDPROC(printascii)
 131
 132 ENTRY(printch)
 133                 adr     r1, hexbuf_rel
 134                 ldr     r2, [r1]
 135                 add     r1, r1, r2
 136                 strb    r0, [r1]
 137                 mov     r0, #0x03               @ SYS_WRITEC
 138         ARM(    svc     #0x123456       )
 139 #ifdef CONFIG_CPU_V7M
 140         THUMB(  bkpt    #0xab           )
 141 #else
 142         THUMB(  svc     #0xab           )
 143 #endif
 144                 ret     lr
 145 ENDPROC(printch)
 146
 147 ENTRY(debug_ll_addr)
 148                 mov     r2, #0
 149                 str     r2, [r0]
 150                 str     r2, [r1]
 151                 ret     lr
 152 ENDPROC(debug_ll_addr)
 153
 154 #endif