1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * arch/arm/mach-ep93xx/dma.c
5 * Platform support code for the EP93xx dmaengine driver.
7 * Copyright (C) 2011 Mika Westerberg
9 * This work is based on the original dma-m2p implementation with
10 * following copyrights:
12 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
13 * Copyright (C) 2006 Applied Data Systems
14 * Copyright (C) 2009 Ryan Mallon <rmallon@gmail.com>
17 #include <linux/dmaengine.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/platform_device.h>
24 #include <linux/platform_data/dma-ep93xx.h>
29 #define DMA_CHANNEL(_name, _base, _irq) \
30 { .name = (_name), .base = (_base), .irq = (_irq) }
35 * On the EP93xx chip the following peripherals my be allocated to the 10
36 * Memory to Internal Peripheral (M2P) channels (5 transmit + 5 receive).
38 * I2S contains 3 Tx and 3 Rx DMA Channels
39 * AAC contains 3 Tx and 3 Rx DMA Channels
40 * UART1 contains 1 Tx and 1 Rx DMA Channels
41 * UART2 contains 1 Tx and 1 Rx DMA Channels
42 * UART3 contains 1 Tx and 1 Rx DMA Channels
43 * IrDA contains 1 Tx and 1 Rx DMA Channels
45 * Registers are mapped statically in ep93xx_map_io().
47 static struct ep93xx_dma_chan_data ep93xx_dma_m2p_channels
[] = {
48 DMA_CHANNEL("m2p0", EP93XX_DMA_BASE
+ 0x0000, IRQ_EP93XX_DMAM2P0
),
49 DMA_CHANNEL("m2p1", EP93XX_DMA_BASE
+ 0x0040, IRQ_EP93XX_DMAM2P1
),
50 DMA_CHANNEL("m2p2", EP93XX_DMA_BASE
+ 0x0080, IRQ_EP93XX_DMAM2P2
),
51 DMA_CHANNEL("m2p3", EP93XX_DMA_BASE
+ 0x00c0, IRQ_EP93XX_DMAM2P3
),
52 DMA_CHANNEL("m2p4", EP93XX_DMA_BASE
+ 0x0240, IRQ_EP93XX_DMAM2P4
),
53 DMA_CHANNEL("m2p5", EP93XX_DMA_BASE
+ 0x0200, IRQ_EP93XX_DMAM2P5
),
54 DMA_CHANNEL("m2p6", EP93XX_DMA_BASE
+ 0x02c0, IRQ_EP93XX_DMAM2P6
),
55 DMA_CHANNEL("m2p7", EP93XX_DMA_BASE
+ 0x0280, IRQ_EP93XX_DMAM2P7
),
56 DMA_CHANNEL("m2p8", EP93XX_DMA_BASE
+ 0x0340, IRQ_EP93XX_DMAM2P8
),
57 DMA_CHANNEL("m2p9", EP93XX_DMA_BASE
+ 0x0300, IRQ_EP93XX_DMAM2P9
),
60 static struct ep93xx_dma_platform_data ep93xx_dma_m2p_data
= {
61 .channels
= ep93xx_dma_m2p_channels
,
62 .num_channels
= ARRAY_SIZE(ep93xx_dma_m2p_channels
),
65 static u64 ep93xx_dma_m2p_mask
= DMA_BIT_MASK(32);
67 static struct platform_device ep93xx_dma_m2p_device
= {
68 .name
= "ep93xx-dma-m2p",
71 .platform_data
= &ep93xx_dma_m2p_data
,
72 .dma_mask
= &ep93xx_dma_m2p_mask
,
73 .coherent_dma_mask
= DMA_BIT_MASK(32),
80 * There are 2 M2M channels which support memcpy/memset and in addition simple
81 * hardware requests from/to SSP and IDE. We do not implement an external
84 * Registers are mapped statically in ep93xx_map_io().
86 static struct ep93xx_dma_chan_data ep93xx_dma_m2m_channels
[] = {
87 DMA_CHANNEL("m2m0", EP93XX_DMA_BASE
+ 0x0100, IRQ_EP93XX_DMAM2M0
),
88 DMA_CHANNEL("m2m1", EP93XX_DMA_BASE
+ 0x0140, IRQ_EP93XX_DMAM2M1
),
91 static struct ep93xx_dma_platform_data ep93xx_dma_m2m_data
= {
92 .channels
= ep93xx_dma_m2m_channels
,
93 .num_channels
= ARRAY_SIZE(ep93xx_dma_m2m_channels
),
96 static u64 ep93xx_dma_m2m_mask
= DMA_BIT_MASK(32);
98 static struct platform_device ep93xx_dma_m2m_device
= {
99 .name
= "ep93xx-dma-m2m",
102 .platform_data
= &ep93xx_dma_m2m_data
,
103 .dma_mask
= &ep93xx_dma_m2m_mask
,
104 .coherent_dma_mask
= DMA_BIT_MASK(32),
108 static int __init
ep93xx_dma_init(void)
110 platform_device_register(&ep93xx_dma_m2p_device
);
111 platform_device_register(&ep93xx_dma_m2m_device
);
114 arch_initcall(ep93xx_dma_init
);