arm64: dts: Revert "specify console via command line"
[linux/fpc-iii.git] / arch / arm / mach-omap1 / reset.c
blobaf2c120b0c4eccf45ff017c968d32a98709f4287
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * OMAP1 reset support
4 */
5 #include <linux/kernel.h>
6 #include <linux/io.h>
7 #include <linux/reboot.h>
9 #include <mach/hardware.h>
11 #include "iomap.h"
12 #include "common.h"
14 /* ARM_SYSST bit shifts related to SoC reset sources */
15 #define ARM_SYSST_POR_SHIFT 5
16 #define ARM_SYSST_EXT_RST_SHIFT 4
17 #define ARM_SYSST_ARM_WDRST_SHIFT 2
18 #define ARM_SYSST_GLOB_SWRST_SHIFT 1
20 /* Standardized reset source bits (across all OMAP SoCs) */
21 #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0
22 #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1
23 #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3
24 #define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5
27 void omap1_restart(enum reboot_mode mode, const char *cmd)
30 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
31 * "Global Software Reset Affects Traffic Controller Frequency".
33 if (cpu_is_omap5912()) {
34 omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
35 omap_writew(0x8, ARM_RSTCT1);
38 omap_writew(1, ARM_RSTCT1);
41 /**
42 * omap1_get_reset_sources - return the source of the SoC's last reset
44 * Returns bits that represent the last reset source for the SoC. The
45 * format is standardized across OMAPs for use by the OMAP watchdog.
47 u32 omap1_get_reset_sources(void)
49 u32 ret = 0;
50 u16 rs;
52 rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST));
54 if (rs & (1 << ARM_SYSST_POR_SHIFT))
55 ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT;
56 if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT))
57 ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT;
58 if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT))
59 ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT;
60 if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT))
61 ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT;
63 return ret;