1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * OMAP34xx and OMAP44xx secure APIs file.
5 * Copyright (C) 2010 Texas Instruments, Inc.
6 * Written by Santosh Shilimkar <santosh.shilimkar@ti.com>
8 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg>
9 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com>
12 #include <linux/linkage.h>
15 * This is common routine to manage secure monitor API
16 * used to modify the PL310 secure registers.
17 * 'r0' contains the value to be modified and 'r12' contains
18 * the monitor API number. It uses few CPU registers
19 * internally and hence they need be backed up including
21 * Function signature : void _omap_smc1(u32 fn, u32 arg)
26 stmfd sp!, {r2-r12, lr}
31 ldmfd sp!, {r2-r12, pc}
35 * u32 omap_smc2(u32 id, u32 falg, u32 pargs)
36 * Low level common routine for secure HAL and PPA APIs.
37 * @id: Application ID of HAL APIs
38 * @flag: Flag to indicate the criticality of operation
39 * @pargs: Physical address of parameter list starting
40 * with number of parametrs
43 stmfd sp!, {r4-r12, lr}
46 mov r1, #0x0 @ Process ID
48 mov r12, #0x00 @ Secure Service ID
50 mcr p15, 0, r7, c7, c5, 6
54 ldmfd sp!, {r4-r12, pc}
58 * u32 omap_smc3(u32 service_id, u32 process_id, u32 flag, u32 pargs)
59 * Low level common routine for secure HAL and PPA APIs via smc #1
60 * r0 - @service_id: Secure Service ID
61 * r1 - @process_id: Process ID
62 * r2 - @flag: Flag to indicate the criticality of operation
63 * r3 - @pargs: Physical address of parameter list
66 stmfd sp!, {r4-r11, lr}
67 mov r12, r0 @ Copy the secure service ID
68 mov r6, #0xff @ Indicate new Task call
69 dsb @ Memory Barrier (not sure if needed, copied from omap_smc2)
70 smc #1 @ Call PPA service
71 ldmfd sp!, {r4-r11, pc}
74 ENTRY(omap_modify_auxcoreboot0)
75 stmfd sp!, {r1-r12, lr}
79 ldmfd sp!, {r1-r12, pc}
80 ENDPROC(omap_modify_auxcoreboot0)
82 ENTRY(omap_auxcoreboot_addr)
83 stmfd sp!, {r2-r12, lr}
87 ldmfd sp!, {r2-r12, pc}
88 ENDPROC(omap_auxcoreboot_addr)
90 ENTRY(omap_read_auxcoreboot0)
91 stmfd sp!, {r2-r12, lr}
95 ldmfd sp!, {r2-r12, pc}
96 ENDPROC(omap_read_auxcoreboot0)