1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP2xxx PRM module functions
5 * Copyright (C) 2010-2012 Texas Instruments, Inc.
6 * Copyright (C) 2010 Nokia Corporation
9 * Rajendra Nayak <rnayak@ti.com>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/err.h>
16 #include <linux/irq.h>
18 #include "powerdomain.h"
19 #include "clockdomain.h"
21 #include "cm2xxx_3xxx.h"
22 #include "prm-regbits-24xx.h"
25 * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
26 * these are reversed from the bits used on OMAP3+
28 #define OMAP24XX_PWRDM_POWER_ON 0x0
29 #define OMAP24XX_PWRDM_POWER_RET 0x1
30 #define OMAP24XX_PWRDM_POWER_OFF 0x3
33 * omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
34 * hardware register (which are specific to the OMAP2xxx SoCs) to
35 * reset source ID bit shifts (which is an OMAP SoC-independent
38 static struct prm_reset_src_map omap2xxx_prm_reset_src_map
[] = {
39 { OMAP_GLOBALCOLD_RST_SHIFT
, OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT
},
40 { OMAP_GLOBALWARM_RST_SHIFT
, OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT
},
41 { OMAP24XX_SECU_VIOL_RST_SHIFT
, OMAP_SECU_VIOL_RST_SRC_ID_SHIFT
},
42 { OMAP24XX_MPU_WD_RST_SHIFT
, OMAP_MPU_WD_RST_SRC_ID_SHIFT
},
43 { OMAP24XX_SECU_WD_RST_SHIFT
, OMAP_SECU_WD_RST_SRC_ID_SHIFT
},
44 { OMAP24XX_EXTWMPU_RST_SHIFT
, OMAP_EXTWARM_RST_SRC_ID_SHIFT
},
49 * omap2xxx_prm_read_reset_sources - return the last SoC reset source
51 * Return a u32 representing the last reset sources of the SoC. The
52 * returned reset source bits are standardized across OMAP SoCs.
54 static u32
omap2xxx_prm_read_reset_sources(void)
56 struct prm_reset_src_map
*p
;
60 v
= omap2_prm_read_mod_reg(WKUP_MOD
, OMAP2_RM_RSTST
);
62 p
= omap2xxx_prm_reset_src_map
;
63 while (p
->reg_shift
>= 0 && p
->std_shift
>= 0) {
64 if (v
& (1 << p
->reg_shift
))
65 r
|= 1 << p
->std_shift
;
73 * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
74 * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
76 * Return the common power state bits corresponding to the OMAP2xxx
77 * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
79 static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst
)
83 switch (omap2xxx_pwrst
) {
84 case OMAP24XX_PWRDM_POWER_OFF
:
85 pwrst
= PWRDM_POWER_OFF
;
87 case OMAP24XX_PWRDM_POWER_RET
:
88 pwrst
= PWRDM_POWER_RET
;
90 case OMAP24XX_PWRDM_POWER_ON
:
91 pwrst
= PWRDM_POWER_ON
;
101 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
103 * Set the DPLL reset bit, which should reboot the SoC. This is the
104 * recommended way to restart the SoC. No return value.
106 static void omap2xxx_prm_dpll_reset(void)
108 omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK
, WKUP_MOD
,
111 omap2_prm_read_mod_reg(WKUP_MOD
, OMAP2_RM_RSTCTRL
);
115 * omap2xxx_prm_clear_mod_irqs - clear wakeup status bits for a module
116 * @module: PRM module to clear wakeups from
117 * @regs: register offset to clear
118 * @wkst_mask: wakeup status mask to clear
120 * Clears wakeup status bits for a given module, so that the device can
123 static int omap2xxx_prm_clear_mod_irqs(s16 module
, u8 regs
, u32 wkst_mask
)
127 wkst
= omap2_prm_read_mod_reg(module
, regs
);
129 omap2_prm_write_mod_reg(wkst
, module
, regs
);
133 int omap2xxx_clkdm_sleep(struct clockdomain
*clkdm
)
135 omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK
,
136 clkdm
->pwrdm
.ptr
->prcm_offs
,
141 int omap2xxx_clkdm_wakeup(struct clockdomain
*clkdm
)
143 omap2_prm_clear_mod_reg_bits(OMAP24XX_FORCESTATE_MASK
,
144 clkdm
->pwrdm
.ptr
->prcm_offs
,
149 static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain
*pwrdm
, u8 pwrst
)
154 case PWRDM_POWER_OFF
:
155 omap24xx_pwrst
= OMAP24XX_PWRDM_POWER_OFF
;
157 case PWRDM_POWER_RET
:
158 omap24xx_pwrst
= OMAP24XX_PWRDM_POWER_RET
;
161 omap24xx_pwrst
= OMAP24XX_PWRDM_POWER_ON
;
167 omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK
,
168 (omap24xx_pwrst
<< OMAP_POWERSTATE_SHIFT
),
169 pwrdm
->prcm_offs
, OMAP2_PM_PWSTCTRL
);
173 static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain
*pwrdm
)
177 omap2xxx_pwrst
= omap2_prm_read_mod_bits_shift(pwrdm
->prcm_offs
,
179 OMAP_POWERSTATE_MASK
);
181 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst
);
184 static int omap2xxx_pwrdm_read_pwrst(struct powerdomain
*pwrdm
)
188 omap2xxx_pwrst
= omap2_prm_read_mod_bits_shift(pwrdm
->prcm_offs
,
190 OMAP_POWERSTATEST_MASK
);
192 return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst
);
195 struct pwrdm_ops omap2_pwrdm_operations
= {
196 .pwrdm_set_next_pwrst
= omap2xxx_pwrdm_set_next_pwrst
,
197 .pwrdm_read_next_pwrst
= omap2xxx_pwrdm_read_next_pwrst
,
198 .pwrdm_read_pwrst
= omap2xxx_pwrdm_read_pwrst
,
199 .pwrdm_set_logic_retst
= omap2_pwrdm_set_logic_retst
,
200 .pwrdm_set_mem_onst
= omap2_pwrdm_set_mem_onst
,
201 .pwrdm_set_mem_retst
= omap2_pwrdm_set_mem_retst
,
202 .pwrdm_read_mem_pwrst
= omap2_pwrdm_read_mem_pwrst
,
203 .pwrdm_read_mem_retst
= omap2_pwrdm_read_mem_retst
,
204 .pwrdm_wait_transition
= omap2_pwrdm_wait_transition
,
211 static struct prm_ll_data omap2xxx_prm_ll_data
= {
212 .read_reset_sources
= &omap2xxx_prm_read_reset_sources
,
213 .assert_hardreset
= &omap2_prm_assert_hardreset
,
214 .deassert_hardreset
= &omap2_prm_deassert_hardreset
,
215 .is_hardreset_asserted
= &omap2_prm_is_hardreset_asserted
,
216 .reset_system
= &omap2xxx_prm_dpll_reset
,
217 .clear_mod_irqs
= &omap2xxx_prm_clear_mod_irqs
,
220 int __init
omap2xxx_prm_init(const struct omap_prcm_init_data
*data
)
222 return prm_register(&omap2xxx_prm_ll_data
);
225 static void __exit
omap2xxx_prm_exit(void)
227 prm_unregister(&omap2xxx_prm_ll_data
);
229 __exitcall(omap2xxx_prm_exit
);