arch/arm/mach-omap2/vc.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * OMAP3/4 Voltage Controller (VC) structure and macro definitions
   4  *
   5  * Copyright (C) 2007, 2010 Texas Instruments, Inc.
   6  * Rajendra Nayak <rnayak@ti.com>
   7  * Lesly A M <x0080970@ti.com>
   8  * Thara Gopinath <thara@ti.com>
   9  *
  10  * Copyright (C) 2008, 2011 Nokia Corporation
  11  * Kalle Jokiniemi
  12  * Paul Walmsley
  13  */
  14 #ifndef __ARCH_ARM_MACH_OMAP2_VC_H
  15 #define __ARCH_ARM_MACH_OMAP2_VC_H
  16
  17 #include <linux/kernel.h>
  18
  19 struct voltagedomain;
  20
  21 /**
  22  * struct omap_vc_common - per-VC register/bitfield data
  23  * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register
  24  * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register
  25  * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start
  26  * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register
  27  * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register
  28  * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register
  29  * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register
  30  * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register
  31  * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register
  32  * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register
  33  * @i2c_cfg_reg: I2C configuration register offset
  34  * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register
  35  * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register
  36  * @i2c_mcode_mask: MCODE field mask for I2C config register
  37  *
  38  * XXX One of cmd_on_mask and cmd_on_shift are not needed
  39  * XXX VALID should probably be a shift, not a mask
  40  */
  41 struct omap_vc_common {
  42         u32 cmd_on_mask;
  43         u32 valid;
  44         u8 bypass_val_reg;
  45         u8 data_shift;
  46         u8 slaveaddr_shift;
  47         u8 regaddr_shift;
  48         u8 cmd_on_shift;
  49         u8 cmd_onlp_shift;
  50         u8 cmd_ret_shift;
  51         u8 cmd_off_shift;
  52         u8 i2c_cfg_reg;
  53         u8 i2c_cfg_clear_mask;
  54         u8 i2c_cfg_hsen_mask;
  55         u8 i2c_mcode_mask;
  56 };
  57
  58 /* omap_vc_channel.flags values */
  59 #define OMAP_VC_CHANNEL_DEFAULT BIT(0)
  60 #define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1)
  61
  62 /**
  63  * struct omap_vc_channel - VC per-instance data
  64  * @i2c_slave_addr: I2C slave address of PMIC for this VC channel
  65  * @volt_reg_addr: voltage configuration register address
  66  * @cmd_reg_addr: command configuration register address
  67  * @setup_time: setup time (in sys_clk cycles) of regulator for this channel
  68  * @cfg_channel: current value of VC channel configuration register
  69  * @i2c_high_speed: whether or not to use I2C high-speed mode
  70  *
  71  * @common: pointer to VC common data for this platform
  72  * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register
  73  * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register
  74  * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register
  75  * @cmdval_reg: register for on/ret/off voltage level values for this channel
  76  * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start
  77  * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start
  78  * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start
  79  * @cfg_channel_reg: VC channel configuration register
  80  * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register
  81  * @flags: VC channel-specific flags (optional)
  82  */
  83 struct omap_vc_channel {
  84         /* channel state */
  85         u16 i2c_slave_addr;
  86         u16 volt_reg_addr;
  87         u16 cmd_reg_addr;
  88         u8 cfg_channel;
  89         bool i2c_high_speed;
  90
  91         /* register access data */
  92         const struct omap_vc_common *common;
  93         u32 smps_sa_mask;
  94         u32 smps_volra_mask;
  95         u32 smps_cmdra_mask;
  96         u8 cmdval_reg;
  97         u8 smps_sa_reg;
  98         u8 smps_volra_reg;
  99         u8 smps_cmdra_reg;
 100         u8 cfg_channel_reg;
 101         u8 cfg_channel_sa_shift;
 102         u8 flags;
 103 };
 104
 105 extern struct omap_vc_channel omap3_vc_mpu;
 106 extern struct omap_vc_channel omap3_vc_core;
 107
 108 extern struct omap_vc_channel omap4_vc_mpu;
 109 extern struct omap_vc_channel omap4_vc_iva;
 110 extern struct omap_vc_channel omap4_vc_core;
 111
 112 extern struct omap_vc_param omap3_mpu_vc_data;
 113 extern struct omap_vc_param omap3_core_vc_data;
 114
 115 extern struct omap_vc_param omap4_mpu_vc_data;
 116 extern struct omap_vc_param omap4_iva_vc_data;
 117 extern struct omap_vc_param omap4_core_vc_data;
 118
 119 void omap3_vc_set_pmic_signaling(int core_next_state);
 120 void omap4_vc_set_pmic_signaling(int core_next_state);
 121
 122 void omap_vc_init_channel(struct voltagedomain *voltdm);
 123 int omap_vc_pre_scale(struct voltagedomain *voltdm,
 124                       unsigned long target_volt,
 125                       u8 *target_vsel, u8 *current_vsel);
 126 void omap_vc_post_scale(struct voltagedomain *voltdm,
 127                         unsigned long target_volt,
 128                         u8 target_vsel, u8 current_vsel);
 129 int omap_vc_bypass_scale(struct voltagedomain *voltdm,
 130                          unsigned long target_volt);
 131
 132 #endif
 133