2 * arch/arm/mach-orion5x/rd88f5182-setup.c
4 * Marvell Orion-NAS Reference Design Setup
6 * Maintainer: Ronen Shitrit <rshitrit@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
12 #include <linux/gpio.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/pci.h>
17 #include <linux/irq.h>
18 #include <linux/mtd/physmap.h>
19 #include <linux/mv643xx_eth.h>
20 #include <linux/ata_platform.h>
21 #include <linux/i2c.h>
22 #include <linux/leds.h>
23 #include <asm/mach-types.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/pci.h>
30 /*****************************************************************************
32 ****************************************************************************/
35 * 512K NOR flash Device bus boot chip select
38 #define RD88F5182_NOR_BOOT_BASE 0xf4000000
39 #define RD88F5182_NOR_BOOT_SIZE SZ_512K
42 * 16M NOR flash on Device bus chip select 1
45 #define RD88F5182_NOR_BASE 0xfc000000
46 #define RD88F5182_NOR_SIZE SZ_16M
52 #define RD88F5182_PCI_SLOT0_OFFS 7
53 #define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7
54 #define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6
56 /*****************************************************************************
57 * 16M NOR Flash on Device bus CS1
58 ****************************************************************************/
60 static struct physmap_flash_data rd88f5182_nor_flash_data
= {
64 static struct resource rd88f5182_nor_flash_resource
= {
65 .flags
= IORESOURCE_MEM
,
66 .start
= RD88F5182_NOR_BASE
,
67 .end
= RD88F5182_NOR_BASE
+ RD88F5182_NOR_SIZE
- 1,
70 static struct platform_device rd88f5182_nor_flash
= {
71 .name
= "physmap-flash",
74 .platform_data
= &rd88f5182_nor_flash_data
,
77 .resource
= &rd88f5182_nor_flash_resource
,
80 /*****************************************************************************
81 * Use GPIO LED as CPU active indication
82 ****************************************************************************/
84 #define RD88F5182_GPIO_LED 0
86 static struct gpio_led rd88f5182_gpio_led_pins
[] = {
88 .name
= "rd88f5182:cpu",
89 .default_trigger
= "cpu0",
90 .gpio
= RD88F5182_GPIO_LED
,
94 static struct gpio_led_platform_data rd88f5182_gpio_led_data
= {
95 .leds
= rd88f5182_gpio_led_pins
,
96 .num_leds
= ARRAY_SIZE(rd88f5182_gpio_led_pins
),
99 static struct platform_device rd88f5182_gpio_leds
= {
103 .platform_data
= &rd88f5182_gpio_led_data
,
107 /*****************************************************************************
109 ****************************************************************************/
111 static void __init
rd88f5182_pci_preinit(void)
116 * Configure PCI GPIO IRQ pins
118 pin
= RD88F5182_PCI_SLOT0_IRQ_A_PIN
;
119 if (gpio_request(pin
, "PCI IntA") == 0) {
120 if (gpio_direction_input(pin
) == 0) {
121 irq_set_irq_type(gpio_to_irq(pin
), IRQ_TYPE_LEVEL_LOW
);
123 printk(KERN_ERR
"rd88f5182_pci_preinit failed to "
124 "set_irq_type pin %d\n", pin
);
128 printk(KERN_ERR
"rd88f5182_pci_preinit failed to request gpio %d\n", pin
);
131 pin
= RD88F5182_PCI_SLOT0_IRQ_B_PIN
;
132 if (gpio_request(pin
, "PCI IntB") == 0) {
133 if (gpio_direction_input(pin
) == 0) {
134 irq_set_irq_type(gpio_to_irq(pin
), IRQ_TYPE_LEVEL_LOW
);
136 printk(KERN_ERR
"rd88f5182_pci_preinit failed to "
137 "set_irq_type pin %d\n", pin
);
141 printk(KERN_ERR
"rd88f5182_pci_preinit failed to gpio_request %d\n", pin
);
145 static int __init
rd88f5182_pci_map_irq(const struct pci_dev
*dev
, u8 slot
,
151 * Check for devices with hard-wired IRQs.
153 irq
= orion5x_pci_map_irq(dev
, slot
, pin
);
158 * PCI IRQs are connected via GPIOs
160 switch (slot
- RD88F5182_PCI_SLOT0_OFFS
) {
163 return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN
);
165 return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN
);
171 static struct hw_pci rd88f5182_pci __initdata
= {
173 .preinit
= rd88f5182_pci_preinit
,
174 .setup
= orion5x_pci_sys_setup
,
175 .scan
= orion5x_pci_sys_scan_bus
,
176 .map_irq
= rd88f5182_pci_map_irq
,
179 static int __init
rd88f5182_pci_init(void)
181 if (machine_is_rd88f5182())
182 pci_common_init(&rd88f5182_pci
);
187 subsys_initcall(rd88f5182_pci_init
);
189 /*****************************************************************************
191 ****************************************************************************/
193 static struct mv643xx_eth_platform_data rd88f5182_eth_data
= {
194 .phy_addr
= MV643XX_ETH_PHY_ADDR(8),
197 /*****************************************************************************
198 * RTC DS1338 on I2C bus
199 ****************************************************************************/
200 static struct i2c_board_info __initdata rd88f5182_i2c_rtc
= {
201 I2C_BOARD_INFO("ds1338", 0x68),
204 /*****************************************************************************
206 ****************************************************************************/
207 static struct mv_sata_platform_data rd88f5182_sata_data
= {
211 /*****************************************************************************
213 ****************************************************************************/
214 static unsigned int rd88f5182_mpp_modes
[] __initdata
= {
215 MPP0_GPIO
, /* Debug Led */
216 MPP1_GPIO
, /* Reset Switch */
218 MPP3_GPIO
, /* RTC Int */
221 MPP6_GPIO
, /* PCI_intA */
222 MPP7_GPIO
, /* PCI_intB */
227 MPP12_SATA_LED
, /* SATA 0 presence */
228 MPP13_SATA_LED
, /* SATA 1 presence */
229 MPP14_SATA_LED
, /* SATA 0 active */
230 MPP15_SATA_LED
, /* SATA 1 active */
238 static void __init
rd88f5182_init(void)
241 * Setup basic Orion functions. Need to be called early.
245 orion5x_mpp_conf(rd88f5182_mpp_modes
);
248 * MPP[20] PCI Clock to MV88F5182
249 * MPP[21] PCI Clock to mini PCI CON11
250 * MPP[22] USB 0 over current indication
251 * MPP[23] USB 1 over current indication
252 * MPP[24] USB 1 over current enable
253 * MPP[25] USB 0 over current enable
257 * Configure peripherals.
259 orion5x_ehci0_init();
260 orion5x_ehci1_init();
261 orion5x_eth_init(&rd88f5182_eth_data
);
263 orion5x_sata_init(&rd88f5182_sata_data
);
264 orion5x_uart0_init();
267 mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET
,
268 ORION_MBUS_DEVBUS_BOOT_ATTR
,
269 RD88F5182_NOR_BOOT_BASE
,
270 RD88F5182_NOR_BOOT_SIZE
);
271 mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_TARGET(1),
272 ORION_MBUS_DEVBUS_ATTR(1),
275 platform_device_register(&rd88f5182_nor_flash
);
276 platform_device_register(&rd88f5182_gpio_leds
);
278 i2c_register_board_info(0, &rd88f5182_i2c_rtc
, 1);
281 MACHINE_START(RD88F5182
, "Marvell Orion-NAS Reference Design")
282 /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */
283 .atag_offset
= 0x100,
284 .nr_irqs
= ORION5X_NR_IRQS
,
285 .init_machine
= rd88f5182_init
,
286 .map_io
= orion5x_map_io
,
287 .init_early
= orion5x_init_early
,
288 .init_irq
= orion5x_init_irq
,
289 .init_time
= orion5x_timer_init
,
290 .restart
= orion5x_restart
,