2 * arch/arm/mach-orion5x/ts78xx-setup.c
4 * Maintainer: Alexander Clouter <alex@digriz.org.uk>
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/sysfs.h>
16 #include <linux/platform_device.h>
17 #include <linux/mv643xx_eth.h>
18 #include <linux/ata_platform.h>
19 #include <linux/mtd/platnand.h>
20 #include <linux/timeriomem-rng.h>
21 #include <asm/mach-types.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/map.h>
27 #include "ts78xx-fpga.h"
29 /*****************************************************************************
31 ****************************************************************************/
34 * FPGA - lives where the PCI bus would be at ORION5X_PCI_MEM_PHYS_BASE
36 #define TS78XX_FPGA_REGS_PHYS_BASE 0xe8000000
37 #define TS78XX_FPGA_REGS_VIRT_BASE IOMEM(0xff900000)
38 #define TS78XX_FPGA_REGS_SIZE SZ_1M
40 static struct ts78xx_fpga_data ts78xx_fpga
= {
43 /* .supports = ... - populated by ts78xx_fpga_supports() */
46 /*****************************************************************************
48 ****************************************************************************/
49 static struct map_desc ts78xx_io_desc
[] __initdata
= {
51 .virtual = (unsigned long)TS78XX_FPGA_REGS_VIRT_BASE
,
52 .pfn
= __phys_to_pfn(TS78XX_FPGA_REGS_PHYS_BASE
),
53 .length
= TS78XX_FPGA_REGS_SIZE
,
58 static void __init
ts78xx_map_io(void)
61 iotable_init(ts78xx_io_desc
, ARRAY_SIZE(ts78xx_io_desc
));
64 /*****************************************************************************
66 ****************************************************************************/
67 static struct mv643xx_eth_platform_data ts78xx_eth_data
= {
68 .phy_addr
= MV643XX_ETH_PHY_ADDR(0),
71 /*****************************************************************************
73 ****************************************************************************/
74 static struct mv_sata_platform_data ts78xx_sata_data
= {
78 /*****************************************************************************
79 * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c
80 ****************************************************************************/
81 #define TS_RTC_CTRL (TS78XX_FPGA_REGS_PHYS_BASE + 0x808)
82 #define TS_RTC_DATA (TS78XX_FPGA_REGS_PHYS_BASE + 0x80c)
84 static struct resource ts78xx_ts_rtc_resources
[] = {
85 DEFINE_RES_MEM(TS_RTC_CTRL
, 0x01),
86 DEFINE_RES_MEM(TS_RTC_DATA
, 0x01),
89 static struct platform_device ts78xx_ts_rtc_device
= {
92 .resource
= ts78xx_ts_rtc_resources
,
93 .num_resources
= ARRAY_SIZE(ts78xx_ts_rtc_resources
),
96 static int ts78xx_ts_rtc_load(void)
100 if (ts78xx_fpga
.supports
.ts_rtc
.init
== 0) {
101 rc
= platform_device_register(&ts78xx_ts_rtc_device
);
103 ts78xx_fpga
.supports
.ts_rtc
.init
= 1;
105 rc
= platform_device_add(&ts78xx_ts_rtc_device
);
109 pr_info("RTC could not be registered: %d\n", rc
);
114 static void ts78xx_ts_rtc_unload(void)
116 platform_device_del(&ts78xx_ts_rtc_device
);
119 /*****************************************************************************
121 ****************************************************************************/
122 #define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE + 0x800) /* VIRT */
123 #define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE + 0x804) /* PHYS */
126 * hardware specific access to control-lines
129 * NAND_NCE: bit 0 -> bit 2
130 * NAND_CLE: bit 1 -> bit 1
131 * NAND_ALE: bit 2 -> bit 0
133 static void ts78xx_ts_nand_cmd_ctrl(struct nand_chip
*this, int cmd
,
136 if (ctrl
& NAND_CTRL_CHANGE
) {
139 bits
= (ctrl
& NAND_NCE
) << 2;
140 bits
|= ctrl
& NAND_CLE
;
141 bits
|= (ctrl
& NAND_ALE
) >> 2;
143 writeb((readb(TS_NAND_CTRL
) & ~0x7) | bits
, TS_NAND_CTRL
);
146 if (cmd
!= NAND_CMD_NONE
)
147 writeb(cmd
, this->legacy
.IO_ADDR_W
);
150 static int ts78xx_ts_nand_dev_ready(struct nand_chip
*chip
)
152 return readb(TS_NAND_CTRL
) & 0x20;
155 static void ts78xx_ts_nand_write_buf(struct nand_chip
*chip
,
156 const uint8_t *buf
, int len
)
158 void __iomem
*io_base
= chip
->legacy
.IO_ADDR_W
;
159 unsigned long off
= ((unsigned long)buf
& 3);
163 sz
= min_t(int, 4 - off
, len
);
164 writesb(io_base
, buf
, sz
);
171 u32
*buf32
= (u32
*)buf
;
172 writesl(io_base
, buf32
, sz
);
178 writesb(io_base
, buf
, len
);
181 static void ts78xx_ts_nand_read_buf(struct nand_chip
*chip
,
182 uint8_t *buf
, int len
)
184 void __iomem
*io_base
= chip
->legacy
.IO_ADDR_R
;
185 unsigned long off
= ((unsigned long)buf
& 3);
189 sz
= min_t(int, 4 - off
, len
);
190 readsb(io_base
, buf
, sz
);
197 u32
*buf32
= (u32
*)buf
;
198 readsl(io_base
, buf32
, sz
);
204 readsb(io_base
, buf
, len
);
207 static struct mtd_partition ts78xx_ts_nand_parts
[] = {
212 .mask_flags
= MTD_WRITEABLE
,
215 .offset
= MTDPART_OFS_APPEND
,
219 .offset
= MTDPART_OFS_APPEND
,
223 .offset
= MTDPART_OFS_APPEND
,
224 .size
= MTDPART_SIZ_FULL
,
228 static struct platform_nand_data ts78xx_ts_nand_data
= {
231 .partitions
= ts78xx_ts_nand_parts
,
232 .nr_partitions
= ARRAY_SIZE(ts78xx_ts_nand_parts
),
234 .bbt_options
= NAND_BBT_USE_FLASH
,
238 * The HW ECC offloading functions, used to give about a 9%
239 * performance increase for 'dd if=/dev/mtdblockX' and 5% for
240 * nanddump. This all however was changed by git commit
241 * e6cf5df1838c28bb060ac45b5585e48e71bbc740 so now there is
242 * no performance advantage to be had so we no longer bother
244 .cmd_ctrl
= ts78xx_ts_nand_cmd_ctrl
,
245 .dev_ready
= ts78xx_ts_nand_dev_ready
,
246 .write_buf
= ts78xx_ts_nand_write_buf
,
247 .read_buf
= ts78xx_ts_nand_read_buf
,
251 static struct resource ts78xx_ts_nand_resources
252 = DEFINE_RES_MEM(TS_NAND_DATA
, 4);
254 static struct platform_device ts78xx_ts_nand_device
= {
258 .platform_data
= &ts78xx_ts_nand_data
,
260 .resource
= &ts78xx_ts_nand_resources
,
264 static int ts78xx_ts_nand_load(void)
268 if (ts78xx_fpga
.supports
.ts_nand
.init
== 0) {
269 rc
= platform_device_register(&ts78xx_ts_nand_device
);
271 ts78xx_fpga
.supports
.ts_nand
.init
= 1;
273 rc
= platform_device_add(&ts78xx_ts_nand_device
);
276 pr_info("NAND could not be registered: %d\n", rc
);
280 static void ts78xx_ts_nand_unload(void)
282 platform_device_del(&ts78xx_ts_nand_device
);
285 /*****************************************************************************
287 ****************************************************************************/
288 #define TS_RNG_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x044)
290 static struct resource ts78xx_ts_rng_resource
291 = DEFINE_RES_MEM(TS_RNG_DATA
, 4);
293 static struct timeriomem_rng_data ts78xx_ts_rng_data
= {
294 .period
= 1000000, /* one second */
297 static struct platform_device ts78xx_ts_rng_device
= {
298 .name
= "timeriomem_rng",
301 .platform_data
= &ts78xx_ts_rng_data
,
303 .resource
= &ts78xx_ts_rng_resource
,
307 static int ts78xx_ts_rng_load(void)
311 if (ts78xx_fpga
.supports
.ts_rng
.init
== 0) {
312 rc
= platform_device_register(&ts78xx_ts_rng_device
);
314 ts78xx_fpga
.supports
.ts_rng
.init
= 1;
316 rc
= platform_device_add(&ts78xx_ts_rng_device
);
319 pr_info("RNG could not be registered: %d\n", rc
);
323 static void ts78xx_ts_rng_unload(void)
325 platform_device_del(&ts78xx_ts_rng_device
);
328 /*****************************************************************************
329 * FPGA 'hotplug' support code
330 ****************************************************************************/
331 static void ts78xx_fpga_devices_zero_init(void)
333 ts78xx_fpga
.supports
.ts_rtc
.init
= 0;
334 ts78xx_fpga
.supports
.ts_nand
.init
= 0;
335 ts78xx_fpga
.supports
.ts_rng
.init
= 0;
338 static void ts78xx_fpga_supports(void)
340 /* TODO: put this 'table' into ts78xx-fpga.h */
341 switch (ts78xx_fpga
.id
) {
351 ts78xx_fpga
.supports
.ts_rtc
.present
= 1;
352 ts78xx_fpga
.supports
.ts_nand
.present
= 1;
353 ts78xx_fpga
.supports
.ts_rng
.present
= 1;
356 /* enable devices if magic matches */
357 switch ((ts78xx_fpga
.id
>> 8) & 0xffffff) {
358 case TS7800_FPGA_MAGIC
:
359 pr_warn("unrecognised FPGA revision 0x%.2x\n",
360 ts78xx_fpga
.id
& 0xff);
361 ts78xx_fpga
.supports
.ts_rtc
.present
= 1;
362 ts78xx_fpga
.supports
.ts_nand
.present
= 1;
363 ts78xx_fpga
.supports
.ts_rng
.present
= 1;
366 ts78xx_fpga
.supports
.ts_rtc
.present
= 0;
367 ts78xx_fpga
.supports
.ts_nand
.present
= 0;
368 ts78xx_fpga
.supports
.ts_rng
.present
= 0;
373 static int ts78xx_fpga_load_devices(void)
377 if (ts78xx_fpga
.supports
.ts_rtc
.present
== 1) {
378 tmp
= ts78xx_ts_rtc_load();
380 ts78xx_fpga
.supports
.ts_rtc
.present
= 0;
383 if (ts78xx_fpga
.supports
.ts_nand
.present
== 1) {
384 tmp
= ts78xx_ts_nand_load();
386 ts78xx_fpga
.supports
.ts_nand
.present
= 0;
389 if (ts78xx_fpga
.supports
.ts_rng
.present
== 1) {
390 tmp
= ts78xx_ts_rng_load();
392 ts78xx_fpga
.supports
.ts_rng
.present
= 0;
399 static int ts78xx_fpga_unload_devices(void)
403 if (ts78xx_fpga
.supports
.ts_rtc
.present
== 1)
404 ts78xx_ts_rtc_unload();
405 if (ts78xx_fpga
.supports
.ts_nand
.present
== 1)
406 ts78xx_ts_nand_unload();
407 if (ts78xx_fpga
.supports
.ts_rng
.present
== 1)
408 ts78xx_ts_rng_unload();
413 static int ts78xx_fpga_load(void)
415 ts78xx_fpga
.id
= readl(TS78XX_FPGA_REGS_VIRT_BASE
);
417 pr_info("FPGA magic=0x%.6x, rev=0x%.2x\n",
418 (ts78xx_fpga
.id
>> 8) & 0xffffff,
419 ts78xx_fpga
.id
& 0xff);
421 ts78xx_fpga_supports();
423 if (ts78xx_fpga_load_devices()) {
424 ts78xx_fpga
.state
= -1;
431 static int ts78xx_fpga_unload(void)
433 unsigned int fpga_id
;
435 fpga_id
= readl(TS78XX_FPGA_REGS_VIRT_BASE
);
438 * There does not seem to be a feasible way to block access to the GPIO
439 * pins from userspace (/dev/mem). This if clause should hopefully warn
440 * those foolish enough not to follow 'policy' :)
442 * UrJTAG SVN since r1381 can be used to reprogram the FPGA
444 if (ts78xx_fpga
.id
!= fpga_id
) {
445 pr_err("FPGA magic/rev mismatch\n"
446 "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
447 (ts78xx_fpga
.id
>> 8) & 0xffffff, ts78xx_fpga
.id
& 0xff,
448 (fpga_id
>> 8) & 0xffffff, fpga_id
& 0xff);
449 ts78xx_fpga
.state
= -1;
453 if (ts78xx_fpga_unload_devices()) {
454 ts78xx_fpga
.state
= -1;
461 static ssize_t
ts78xx_fpga_show(struct kobject
*kobj
,
462 struct kobj_attribute
*attr
, char *buf
)
464 if (ts78xx_fpga
.state
< 0)
465 return sprintf(buf
, "borked\n");
467 return sprintf(buf
, "%s\n", (ts78xx_fpga
.state
) ? "online" : "offline");
470 static ssize_t
ts78xx_fpga_store(struct kobject
*kobj
,
471 struct kobj_attribute
*attr
, const char *buf
, size_t n
)
475 if (ts78xx_fpga
.state
< 0) {
476 pr_err("FPGA borked, you must powercycle ASAP\n");
480 if (strncmp(buf
, "online", sizeof("online") - 1) == 0)
482 else if (strncmp(buf
, "offline", sizeof("offline") - 1) == 0)
487 if (ts78xx_fpga
.state
== value
)
490 ret
= (ts78xx_fpga
.state
== 0)
492 : ts78xx_fpga_unload();
495 ts78xx_fpga
.state
= value
;
500 static struct kobj_attribute ts78xx_fpga_attr
=
501 __ATTR(ts78xx_fpga
, 0644, ts78xx_fpga_show
, ts78xx_fpga_store
);
503 /*****************************************************************************
505 ****************************************************************************/
506 static unsigned int ts78xx_mpp_modes
[] __initdata
= {
508 MPP1_GPIO
, /* JTAG Clock */
509 MPP2_GPIO
, /* JTAG Data In */
510 MPP3_GPIO
, /* Lat ECP2 256 FPGA - PB2B */
511 MPP4_GPIO
, /* JTAG Data Out */
512 MPP5_GPIO
, /* JTAG TMS */
513 MPP6_GPIO
, /* Lat ECP2 256 FPGA - PB31A_CLK4+ */
514 MPP7_GPIO
, /* Lat ECP2 256 FPGA - PB22B */
528 * MPP[20] PCI Clock Out 1
529 * MPP[21] PCI Clock Out 0
538 static void __init
ts78xx_init(void)
543 * Setup basic Orion functions. Need to be called early.
547 orion5x_mpp_conf(ts78xx_mpp_modes
);
550 * Configure peripherals.
552 orion5x_ehci0_init();
553 orion5x_ehci1_init();
554 orion5x_eth_init(&ts78xx_eth_data
);
555 orion5x_sata_init(&ts78xx_sata_data
);
556 orion5x_uart0_init();
557 orion5x_uart1_init();
561 ts78xx_fpga_devices_zero_init();
562 ret
= ts78xx_fpga_load();
563 ret
= sysfs_create_file(firmware_kobj
, &ts78xx_fpga_attr
.attr
);
565 pr_err("sysfs_create_file failed: %d\n", ret
);
568 MACHINE_START(TS78XX
, "Technologic Systems TS-78xx SBC")
569 /* Maintainer: Alexander Clouter <alex@digriz.org.uk> */
570 .atag_offset
= 0x100,
571 .nr_irqs
= ORION5X_NR_IRQS
,
572 .init_machine
= ts78xx_init
,
573 .map_io
= ts78xx_map_io
,
574 .init_early
= orion5x_init_early
,
575 .init_irq
= orion5x_init_irq
,
576 .init_time
= orion5x_timer_init
,
577 .restart
= orion5x_restart
,