arm64: dts: Revert "specify console via command line"
[linux/fpc-iii.git] / arch / arm / mach-s3c64xx / mach-smdk6410.c
blob908e5aa831c81cb234e145e29189a1659e62908a
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Copyright 2008 Openmoko, Inc.
4 // Copyright 2008 Simtec Electronics
5 // Ben Dooks <ben@simtec.co.uk>
6 // http://armlinux.simtec.co.uk/
8 #include <linux/kernel.h>
9 #include <linux/types.h>
10 #include <linux/interrupt.h>
11 #include <linux/list.h>
12 #include <linux/timer.h>
13 #include <linux/init.h>
14 #include <linux/input.h>
15 #include <linux/serial_core.h>
16 #include <linux/serial_s3c.h>
17 #include <linux/platform_device.h>
18 #include <linux/io.h>
19 #include <linux/i2c.h>
20 #include <linux/leds.h>
21 #include <linux/fb.h>
22 #include <linux/gpio.h>
23 #include <linux/delay.h>
24 #include <linux/smsc911x.h>
25 #include <linux/regulator/fixed.h>
26 #include <linux/regulator/machine.h>
27 #include <linux/pwm.h>
28 #include <linux/pwm_backlight.h>
29 #include <linux/platform_data/s3c-hsotg.h>
31 #ifdef CONFIG_SMDK6410_WM1190_EV1
32 #include <linux/mfd/wm8350/core.h>
33 #include <linux/mfd/wm8350/pmic.h>
34 #endif
36 #ifdef CONFIG_SMDK6410_WM1192_EV1
37 #include <linux/mfd/wm831x/core.h>
38 #include <linux/mfd/wm831x/pdata.h>
39 #endif
41 #include <video/platform_lcd.h>
42 #include <video/samsung_fimd.h>
44 #include <asm/mach/arch.h>
45 #include <asm/mach/map.h>
46 #include <asm/mach/irq.h>
48 #include <mach/hardware.h>
49 #include <mach/irqs.h>
50 #include <mach/map.h>
52 #include <asm/irq.h>
53 #include <asm/mach-types.h>
55 #include <mach/regs-gpio.h>
56 #include <mach/gpio-samsung.h>
57 #include <linux/platform_data/ata-samsung_cf.h>
58 #include <linux/platform_data/i2c-s3c2410.h>
59 #include <plat/fb.h>
60 #include <plat/gpio-cfg.h>
62 #include <plat/devs.h>
63 #include <plat/cpu.h>
64 #include <plat/adc.h>
65 #include <linux/platform_data/touchscreen-s3c2410.h>
66 #include <plat/keypad.h>
67 #include <plat/samsung-time.h>
69 #include "backlight.h"
70 #include "common.h"
71 #include "regs-modem.h"
72 #include "regs-srom.h"
73 #include "regs-sys.h"
75 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
76 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
77 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
79 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
80 [0] = {
81 .hwport = 0,
82 .flags = 0,
83 .ucon = UCON,
84 .ulcon = ULCON,
85 .ufcon = UFCON,
87 [1] = {
88 .hwport = 1,
89 .flags = 0,
90 .ucon = UCON,
91 .ulcon = ULCON,
92 .ufcon = UFCON,
94 [2] = {
95 .hwport = 2,
96 .flags = 0,
97 .ucon = UCON,
98 .ulcon = ULCON,
99 .ufcon = UFCON,
101 [3] = {
102 .hwport = 3,
103 .flags = 0,
104 .ucon = UCON,
105 .ulcon = ULCON,
106 .ufcon = UFCON,
110 /* framebuffer and LCD setup. */
112 /* GPF15 = LCD backlight control
113 * GPF13 => Panel power
114 * GPN5 = LCD nRESET signal
115 * PWM_TOUT1 => backlight brightness
118 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
119 unsigned int power)
121 if (power) {
122 gpio_direction_output(S3C64XX_GPF(13), 1);
124 /* fire nRESET on power up */
125 gpio_direction_output(S3C64XX_GPN(5), 0);
126 msleep(10);
127 gpio_direction_output(S3C64XX_GPN(5), 1);
128 msleep(1);
129 } else {
130 gpio_direction_output(S3C64XX_GPF(13), 0);
134 static struct plat_lcd_data smdk6410_lcd_power_data = {
135 .set_power = smdk6410_lcd_power_set,
138 static struct platform_device smdk6410_lcd_powerdev = {
139 .name = "platform-lcd",
140 .dev.parent = &s3c_device_fb.dev,
141 .dev.platform_data = &smdk6410_lcd_power_data,
144 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
145 .max_bpp = 32,
146 .default_bpp = 16,
147 .xres = 800,
148 .yres = 480,
149 .virtual_y = 480 * 2,
150 .virtual_x = 800,
153 static struct fb_videomode smdk6410_lcd_timing = {
154 .left_margin = 8,
155 .right_margin = 13,
156 .upper_margin = 7,
157 .lower_margin = 5,
158 .hsync_len = 3,
159 .vsync_len = 1,
160 .xres = 800,
161 .yres = 480,
164 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
165 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
166 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
167 .vtiming = &smdk6410_lcd_timing,
168 .win[0] = &smdk6410_fb_win0,
169 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
170 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
174 * Configuring Ethernet on SMDK6410
176 * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
177 * The constant address below corresponds to nCS1
179 * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
180 * 2) CFG6 needs to be switched to "LAN9115" side
183 static struct resource smdk6410_smsc911x_resources[] = {
184 [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN1, SZ_64K),
185 [1] = DEFINE_RES_NAMED(S3C_EINT(10), 1, NULL, IORESOURCE_IRQ \
186 | IRQ_TYPE_LEVEL_LOW),
189 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
190 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
191 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
192 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
193 .phy_interface = PHY_INTERFACE_MODE_MII,
197 static struct platform_device smdk6410_smsc911x = {
198 .name = "smsc911x",
199 .id = -1,
200 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
201 .resource = &smdk6410_smsc911x_resources[0],
202 .dev = {
203 .platform_data = &smdk6410_smsc911x_pdata,
207 #ifdef CONFIG_REGULATOR
208 static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
209 REGULATOR_SUPPLY("PVDD", "0-001b"),
210 REGULATOR_SUPPLY("AVDD", "0-001b"),
213 static struct regulator_init_data __maybe_unused smdk6410_b_pwr_5v_data = {
214 .constraints = {
215 .always_on = 1,
217 .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
218 .consumer_supplies = smdk6410_b_pwr_5v_consumers,
221 static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
222 .supply_name = "B_PWR_5V",
223 .microvolts = 5000000,
224 .init_data = &smdk6410_b_pwr_5v_data,
227 static struct platform_device smdk6410_b_pwr_5v = {
228 .name = "reg-fixed-voltage",
229 .id = -1,
230 .dev = {
231 .platform_data = &smdk6410_b_pwr_5v_pdata,
234 #endif
236 static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = {
237 .setup_gpio = s3c64xx_ide_setup_gpio,
240 static uint32_t smdk6410_keymap[] __initdata = {
241 /* KEY(row, col, keycode) */
242 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
243 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
244 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
245 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
248 static struct matrix_keymap_data smdk6410_keymap_data __initdata = {
249 .keymap = smdk6410_keymap,
250 .keymap_size = ARRAY_SIZE(smdk6410_keymap),
253 static struct samsung_keypad_platdata smdk6410_keypad_data __initdata = {
254 .keymap_data = &smdk6410_keymap_data,
255 .rows = 2,
256 .cols = 8,
259 static struct map_desc smdk6410_iodesc[] = {};
261 static struct platform_device *smdk6410_devices[] __initdata = {
262 #ifdef CONFIG_SMDK6410_SD_CH0
263 &s3c_device_hsmmc0,
264 #endif
265 #ifdef CONFIG_SMDK6410_SD_CH1
266 &s3c_device_hsmmc1,
267 #endif
268 &s3c_device_i2c0,
269 &s3c_device_i2c1,
270 &s3c_device_fb,
271 &s3c_device_ohci,
272 &samsung_device_pwm,
273 &s3c_device_usb_hsotg,
274 &s3c64xx_device_iisv4,
275 &samsung_device_keypad,
277 #ifdef CONFIG_REGULATOR
278 &smdk6410_b_pwr_5v,
279 #endif
280 &smdk6410_lcd_powerdev,
282 &smdk6410_smsc911x,
283 &s3c_device_adc,
284 &s3c_device_cfcon,
285 &s3c_device_rtc,
286 &s3c_device_wdt,
289 #ifdef CONFIG_REGULATOR
290 /* ARM core */
291 static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
292 REGULATOR_SUPPLY("vddarm", NULL),
295 /* VDDARM, BUCK1 on J5 */
296 static struct regulator_init_data __maybe_unused smdk6410_vddarm = {
297 .constraints = {
298 .name = "PVDD_ARM",
299 .min_uV = 1000000,
300 .max_uV = 1300000,
301 .always_on = 1,
302 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
304 .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
305 .consumer_supplies = smdk6410_vddarm_consumers,
308 /* VDD_INT, BUCK2 on J5 */
309 static struct regulator_init_data __maybe_unused smdk6410_vddint = {
310 .constraints = {
311 .name = "PVDD_INT",
312 .min_uV = 1000000,
313 .max_uV = 1200000,
314 .always_on = 1,
315 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
319 /* VDD_HI, LDO3 on J5 */
320 static struct regulator_init_data __maybe_unused smdk6410_vddhi = {
321 .constraints = {
322 .name = "PVDD_HI",
323 .always_on = 1,
327 /* VDD_PLL, LDO2 on J5 */
328 static struct regulator_init_data __maybe_unused smdk6410_vddpll = {
329 .constraints = {
330 .name = "PVDD_PLL",
331 .always_on = 1,
335 /* VDD_UH_MMC, LDO5 on J5 */
336 static struct regulator_init_data __maybe_unused smdk6410_vdduh_mmc = {
337 .constraints = {
338 .name = "PVDD_UH+PVDD_MMC",
339 .always_on = 1,
343 /* VCCM3BT, LDO8 on J5 */
344 static struct regulator_init_data __maybe_unused smdk6410_vccmc3bt = {
345 .constraints = {
346 .name = "PVCCM3BT",
347 .always_on = 1,
351 /* VCCM2MTV, LDO11 on J5 */
352 static struct regulator_init_data __maybe_unused smdk6410_vccm2mtv = {
353 .constraints = {
354 .name = "PVCCM2MTV",
355 .always_on = 1,
359 /* VDD_LCD, LDO12 on J5 */
360 static struct regulator_init_data __maybe_unused smdk6410_vddlcd = {
361 .constraints = {
362 .name = "PVDD_LCD",
363 .always_on = 1,
367 /* VDD_OTGI, LDO9 on J5 */
368 static struct regulator_init_data __maybe_unused smdk6410_vddotgi = {
369 .constraints = {
370 .name = "PVDD_OTGI",
371 .always_on = 1,
375 /* VDD_OTG, LDO14 on J5 */
376 static struct regulator_init_data __maybe_unused smdk6410_vddotg = {
377 .constraints = {
378 .name = "PVDD_OTG",
379 .always_on = 1,
383 /* VDD_ALIVE, LDO15 on J5 */
384 static struct regulator_init_data __maybe_unused smdk6410_vddalive = {
385 .constraints = {
386 .name = "PVDD_ALIVE",
387 .always_on = 1,
391 /* VDD_AUDIO, VLDO_AUDIO on J5 */
392 static struct regulator_init_data __maybe_unused smdk6410_vddaudio = {
393 .constraints = {
394 .name = "PVDD_AUDIO",
395 .always_on = 1,
398 #endif
400 #ifdef CONFIG_SMDK6410_WM1190_EV1
401 /* S3C64xx internal logic & PLL */
402 static struct regulator_init_data __maybe_unused wm8350_dcdc1_data = {
403 .constraints = {
404 .name = "PVDD_INT+PVDD_PLL",
405 .min_uV = 1200000,
406 .max_uV = 1200000,
407 .always_on = 1,
408 .apply_uV = 1,
412 /* Memory */
413 static struct regulator_init_data __maybe_unused wm8350_dcdc3_data = {
414 .constraints = {
415 .name = "PVDD_MEM",
416 .min_uV = 1800000,
417 .max_uV = 1800000,
418 .always_on = 1,
419 .state_mem = {
420 .uV = 1800000,
421 .mode = REGULATOR_MODE_NORMAL,
422 .enabled = 1,
424 .initial_state = PM_SUSPEND_MEM,
428 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
429 static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
430 REGULATOR_SUPPLY("DVDD", "0-001b"),
433 static struct regulator_init_data __maybe_unused wm8350_dcdc4_data = {
434 .constraints = {
435 .name = "PVDD_HI+PVDD_EXT+PVDD_SYS+PVCCM2MTV",
436 .min_uV = 3000000,
437 .max_uV = 3000000,
438 .always_on = 1,
440 .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
441 .consumer_supplies = wm8350_dcdc4_consumers,
444 /* OTGi/1190-EV1 HPVDD & AVDD */
445 static struct regulator_init_data __maybe_unused wm8350_ldo4_data = {
446 .constraints = {
447 .name = "PVDD_OTGI+HPVDD+AVDD",
448 .min_uV = 1200000,
449 .max_uV = 1200000,
450 .apply_uV = 1,
451 .always_on = 1,
455 static struct {
456 int regulator;
457 struct regulator_init_data *initdata;
458 } wm1190_regulators[] = {
459 { WM8350_DCDC_1, &wm8350_dcdc1_data },
460 { WM8350_DCDC_3, &wm8350_dcdc3_data },
461 { WM8350_DCDC_4, &wm8350_dcdc4_data },
462 { WM8350_DCDC_6, &smdk6410_vddarm },
463 { WM8350_LDO_1, &smdk6410_vddalive },
464 { WM8350_LDO_2, &smdk6410_vddotg },
465 { WM8350_LDO_3, &smdk6410_vddlcd },
466 { WM8350_LDO_4, &wm8350_ldo4_data },
469 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
471 int i;
473 /* Configure the IRQ line */
474 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
476 /* Instantiate the regulators */
477 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
478 wm8350_register_regulator(wm8350,
479 wm1190_regulators[i].regulator,
480 wm1190_regulators[i].initdata);
482 return 0;
485 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
486 .init = smdk6410_wm8350_init,
487 .irq_high = 1,
488 .irq_base = IRQ_BOARD_START,
490 #endif
492 #ifdef CONFIG_SMDK6410_WM1192_EV1
493 static struct gpio_led wm1192_pmic_leds[] = {
495 .name = "PMIC:red:power",
496 .gpio = GPIO_BOARD_START + 3,
497 .default_state = LEDS_GPIO_DEFSTATE_ON,
501 static struct gpio_led_platform_data wm1192_pmic_led = {
502 .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
503 .leds = wm1192_pmic_leds,
506 static struct platform_device wm1192_pmic_led_dev = {
507 .name = "leds-gpio",
508 .id = -1,
509 .dev = {
510 .platform_data = &wm1192_pmic_led,
514 static int wm1192_pre_init(struct wm831x *wm831x)
516 int ret;
518 /* Configure the IRQ line */
519 s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
521 ret = platform_device_register(&wm1192_pmic_led_dev);
522 if (ret != 0)
523 dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
525 return 0;
528 static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
529 .isink = 1,
530 .max_uA = 27554,
533 static struct regulator_init_data __maybe_unused wm1192_dcdc3 = {
534 .constraints = {
535 .name = "PVDD_MEM+PVDD_GPS",
536 .always_on = 1,
540 static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
541 REGULATOR_SUPPLY("DVDD", "0-001b"), /* WM8580 */
544 static struct regulator_init_data __maybe_unused wm1192_ldo1 = {
545 .constraints = {
546 .name = "PVDD_LCD+PVDD_EXT",
547 .always_on = 1,
549 .consumer_supplies = wm1192_ldo1_consumers,
550 .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
553 static struct wm831x_status_pdata wm1192_led7_pdata = {
554 .name = "LED7:green:",
557 static struct wm831x_status_pdata wm1192_led8_pdata = {
558 .name = "LED8:green:",
561 static struct wm831x_pdata smdk6410_wm1192_pdata = {
562 .pre_init = wm1192_pre_init,
564 .backlight = &wm1192_backlight_pdata,
565 .dcdc = {
566 &smdk6410_vddarm, /* DCDC1 */
567 &smdk6410_vddint, /* DCDC2 */
568 &wm1192_dcdc3,
570 .gpio_base = GPIO_BOARD_START,
571 .ldo = {
572 &wm1192_ldo1, /* LDO1 */
573 &smdk6410_vdduh_mmc, /* LDO2 */
574 NULL, /* LDO3 NC */
575 &smdk6410_vddotgi, /* LDO4 */
576 &smdk6410_vddotg, /* LDO5 */
577 &smdk6410_vddhi, /* LDO6 */
578 &smdk6410_vddaudio, /* LDO7 */
579 &smdk6410_vccm2mtv, /* LDO8 */
580 &smdk6410_vddpll, /* LDO9 */
581 &smdk6410_vccmc3bt, /* LDO10 */
582 &smdk6410_vddalive, /* LDO11 */
584 .status = {
585 &wm1192_led7_pdata,
586 &wm1192_led8_pdata,
589 #endif
591 static struct i2c_board_info i2c_devs0[] __initdata = {
592 { I2C_BOARD_INFO("24c08", 0x50), },
593 { I2C_BOARD_INFO("wm8580", 0x1b), },
595 #ifdef CONFIG_SMDK6410_WM1192_EV1
596 { I2C_BOARD_INFO("wm8312", 0x34),
597 .platform_data = &smdk6410_wm1192_pdata,
598 .irq = S3C_EINT(12),
600 #endif
602 #ifdef CONFIG_SMDK6410_WM1190_EV1
603 { I2C_BOARD_INFO("wm8350", 0x1a),
604 .platform_data = &smdk6410_wm8350_pdata,
605 .irq = S3C_EINT(12),
607 #endif
610 static struct i2c_board_info i2c_devs1[] __initdata = {
611 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
614 /* LCD Backlight data */
615 static struct samsung_bl_gpio_info smdk6410_bl_gpio_info = {
616 .no = S3C64XX_GPF(15),
617 .func = S3C_GPIO_SFN(2),
620 static struct pwm_lookup smdk6410_pwm_lookup[] = {
621 PWM_LOOKUP("samsung-pwm", 1, "pwm-backlight.0", NULL, 78770,
622 PWM_POLARITY_NORMAL),
625 static struct platform_pwm_backlight_data smdk6410_bl_data = {
626 .enable_gpio = -1,
629 static struct dwc2_hsotg_plat smdk6410_hsotg_pdata;
631 static void __init smdk6410_map_io(void)
633 u32 tmp;
635 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
636 s3c64xx_set_xtal_freq(12000000);
637 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
638 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
640 /* set the LCD type */
642 tmp = __raw_readl(S3C64XX_SPCON);
643 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
644 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
645 __raw_writel(tmp, S3C64XX_SPCON);
647 /* remove the lcd bypass */
648 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
649 tmp &= ~MIFPCON_LCD_BYPASS;
650 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
653 static void __init smdk6410_machine_init(void)
655 u32 cs1;
657 s3c_i2c0_set_platdata(NULL);
658 s3c_i2c1_set_platdata(NULL);
659 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
660 dwc2_hsotg_set_platdata(&smdk6410_hsotg_pdata);
662 samsung_keypad_set_platdata(&smdk6410_keypad_data);
664 s3c64xx_ts_set_platdata(NULL);
666 /* configure nCS1 width to 16 bits */
668 cs1 = __raw_readl(S3C64XX_SROM_BW) &
669 ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
670 cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
671 (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
672 (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
673 S3C64XX_SROM_BW__NCS1__SHIFT;
674 __raw_writel(cs1, S3C64XX_SROM_BW);
676 /* set timing for nCS1 suitable for ethernet chip */
678 __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
679 (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
680 (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
681 (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
682 (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
683 (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
684 (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
686 gpio_request(S3C64XX_GPN(5), "LCD power");
687 gpio_request(S3C64XX_GPF(13), "LCD power");
689 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
690 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
692 s3c_ide_set_platdata(&smdk6410_ide_pdata);
694 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
696 pwm_add_table(smdk6410_pwm_lookup, ARRAY_SIZE(smdk6410_pwm_lookup));
697 samsung_bl_set(&smdk6410_bl_gpio_info, &smdk6410_bl_data);
700 MACHINE_START(SMDK6410, "SMDK6410")
701 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
702 .atag_offset = 0x100,
703 .nr_irqs = S3C64XX_NR_IRQS,
704 .init_irq = s3c6410_init_irq,
705 .map_io = smdk6410_map_io,
706 .init_machine = smdk6410_machine_init,
707 .init_time = samsung_timer_init,
708 .restart = s3c64xx_restart,
709 MACHINE_END