1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/lib/copypage-xscale.S
5 * Copyright (C) 1995-2005 Russell King
7 * This handles the mini data cache, as found on SA11x0 and XScale
8 * processors. When we copy a user page page, we map it in such a way
9 * that accesses to this page will not touch the main data cache, but
10 * will be cached in the mini data cache. This prevents us thrashing
11 * the main data cache on page faults.
13 #include <linux/init.h>
15 #include <linux/highmem.h>
17 #include <asm/pgtable.h>
18 #include <asm/tlbflush.h>
19 #include <asm/cacheflush.h>
23 #define minicache_pgprot __pgprot(L_PTE_PRESENT | L_PTE_YOUNG | \
26 static DEFINE_RAW_SPINLOCK(minicache_lock
);
29 * XScale mini-dcache optimised copy_user_highpage
31 * We flush the destination cache lines just before we write the data into the
32 * corresponding address. Since the Dcache is read-allocate, this removes the
33 * Dcache aliasing issue. The writes will be forwarded to the write buffer,
34 * and merged as appropriate.
36 static void mc_copy_user_page(void *from
, void *to
)
41 * Strangely enough, best performance is achieved
42 * when prefetching destination as well. (NP)
54 2: ldrd r2, r3, [%0], #8 \n\
55 ldrd r4, r5, [%0], #8 \n\
57 strd r2, r3, [%1], #8 \n\
58 ldrd r2, r3, [%0], #8 \n\
59 strd r4, r5, [%1], #8 \n\
60 ldrd r4, r5, [%0], #8 \n\
61 strd r2, r3, [%1], #8 \n\
62 strd r4, r5, [%1], #8 \n\
63 mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\
64 ldrd r2, r3, [%0], #8 \n\
65 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\
66 ldrd r4, r5, [%0], #8 \n\
68 strd r2, r3, [%1], #8 \n\
69 ldrd r2, r3, [%0], #8 \n\
70 strd r4, r5, [%1], #8 \n\
71 ldrd r4, r5, [%0], #8 \n\
72 strd r2, r3, [%1], #8 \n\
73 strd r4, r5, [%1], #8 \n\
74 mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\
76 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\
79 : "+&r" (from
), "+&r" (to
), "=&r" (tmp
)
80 : "2" (PAGE_SIZE
/ 64 - 1)
81 : "r2", "r3", "r4", "r5", "ip");
84 void xscale_mc_copy_user_highpage(struct page
*to
, struct page
*from
,
85 unsigned long vaddr
, struct vm_area_struct
*vma
)
87 void *kto
= kmap_atomic(to
);
89 if (!test_and_set_bit(PG_dcache_clean
, &from
->flags
))
90 __flush_dcache_page(page_mapping_file(from
), from
);
92 raw_spin_lock(&minicache_lock
);
94 set_top_pte(COPYPAGE_MINICACHE
, mk_pte(from
, minicache_pgprot
));
96 mc_copy_user_page((void *)COPYPAGE_MINICACHE
, kto
);
98 raw_spin_unlock(&minicache_lock
);
104 * XScale optimised clear_user_page
107 xscale_mc_clear_user_highpage(struct page
*page
, unsigned long vaddr
)
109 void *ptr
, *kaddr
= kmap_atomic(page
);
116 strd r2, r3, [%0], #8 \n\
117 strd r2, r3, [%0], #8 \n\
118 strd r2, r3, [%0], #8 \n\
119 strd r2, r3, [%0], #8 \n\
120 mcr p15, 0, ip, c7, c10, 1 @ clean D line\n\
122 mcr p15, 0, ip, c7, c6, 1 @ invalidate D line\n\
125 : "0" (kaddr
), "I" (PAGE_SIZE
/ 32)
126 : "r1", "r2", "r3", "ip");
127 kunmap_atomic(kaddr
);
130 struct cpu_user_fns xscale_mc_user_fns __initdata
= {
131 .cpu_clear_user_highpage
= xscale_mc_clear_user_highpage
,
132 .cpu_copy_user_highpage
= xscale_mc_copy_user_highpage
,