arm64: dts: Revert "specify console via command line"
[linux/fpc-iii.git] / arch / arm / mm / pmsa-v8.c
blob0d7d5fb59247d42038e0c69dcec3d89499c77cd7
1 /*
2 * Based on linux/arch/arm/pmsa-v7.c
4 * ARM PMSAv8 supporting functions.
5 */
7 #include <linux/memblock.h>
8 #include <linux/range.h>
10 #include <asm/cp15.h>
11 #include <asm/cputype.h>
12 #include <asm/mpu.h>
14 #include <asm/memory.h>
15 #include <asm/sections.h>
17 #include "mm.h"
19 #ifndef CONFIG_CPU_V7M
21 #define PRSEL __ACCESS_CP15(c6, 0, c2, 1)
22 #define PRBAR __ACCESS_CP15(c6, 0, c3, 0)
23 #define PRLAR __ACCESS_CP15(c6, 0, c3, 1)
25 static inline u32 prlar_read(void)
27 return read_sysreg(PRLAR);
30 static inline u32 prbar_read(void)
32 return read_sysreg(PRBAR);
35 static inline void prsel_write(u32 v)
37 write_sysreg(v, PRSEL);
40 static inline void prbar_write(u32 v)
42 write_sysreg(v, PRBAR);
45 static inline void prlar_write(u32 v)
47 write_sysreg(v, PRLAR);
49 #else
51 static inline u32 prlar_read(void)
53 return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RLAR);
56 static inline u32 prbar_read(void)
58 return readl_relaxed(BASEADDR_V7M_SCB + PMSAv8_RBAR);
61 static inline void prsel_write(u32 v)
63 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RNR);
66 static inline void prbar_write(u32 v)
68 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RBAR);
71 static inline void prlar_write(u32 v)
73 writel_relaxed(v, BASEADDR_V7M_SCB + PMSAv8_RLAR);
76 #endif
78 static struct range __initdata io[MPU_MAX_REGIONS];
79 static struct range __initdata mem[MPU_MAX_REGIONS];
81 static unsigned int __initdata mpu_max_regions;
83 static __init bool is_region_fixed(int number)
85 switch (number) {
86 case PMSAv8_XIP_REGION:
87 case PMSAv8_KERNEL_REGION:
88 return true;
89 default:
90 return false;
94 void __init pmsav8_adjust_lowmem_bounds(void)
96 phys_addr_t mem_end;
97 struct memblock_region *reg;
98 bool first = true;
100 for_each_memblock(memory, reg) {
101 if (first) {
102 phys_addr_t phys_offset = PHYS_OFFSET;
105 * Initially only use memory continuous from
106 * PHYS_OFFSET */
107 if (reg->base != phys_offset)
108 panic("First memory bank must be contiguous from PHYS_OFFSET");
109 mem_end = reg->base + reg->size;
110 first = false;
111 } else {
113 * memblock auto merges contiguous blocks, remove
114 * all blocks afterwards in one go (we can't remove
115 * blocks separately while iterating)
117 pr_notice("Ignoring RAM after %pa, memory at %pa ignored\n",
118 &mem_end, &reg->base);
119 memblock_remove(reg->base, 0 - reg->base);
120 break;
125 static int __init __mpu_max_regions(void)
127 static int max_regions;
128 u32 mpuir;
130 if (max_regions)
131 return max_regions;
133 mpuir = read_cpuid_mputype();
135 max_regions = (mpuir & MPUIR_DREGION_SZMASK) >> MPUIR_DREGION;
137 return max_regions;
140 static int __init __pmsav8_setup_region(unsigned int number, u32 bar, u32 lar)
142 if (number > mpu_max_regions
143 || number >= MPU_MAX_REGIONS)
144 return -ENOENT;
146 dsb();
147 prsel_write(number);
148 isb();
149 prbar_write(bar);
150 prlar_write(lar);
152 mpu_rgn_info.rgns[number].prbar = bar;
153 mpu_rgn_info.rgns[number].prlar = lar;
155 mpu_rgn_info.used++;
157 return 0;
160 static int __init pmsav8_setup_ram(unsigned int number, phys_addr_t start,phys_addr_t end)
162 u32 bar, lar;
164 if (is_region_fixed(number))
165 return -EINVAL;
167 bar = start;
168 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
170 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED;
171 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
173 return __pmsav8_setup_region(number, bar, lar);
176 static int __init pmsav8_setup_io(unsigned int number, phys_addr_t start,phys_addr_t end)
178 u32 bar, lar;
180 if (is_region_fixed(number))
181 return -EINVAL;
183 bar = start;
184 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
186 bar |= PMSAv8_AP_PL1RW_PL0RW | PMSAv8_RGN_SHARED | PMSAv8_BAR_XN;
187 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_DEVICE_nGnRnE) | PMSAv8_LAR_EN;
189 return __pmsav8_setup_region(number, bar, lar);
192 static int __init pmsav8_setup_fixed(unsigned int number, phys_addr_t start,phys_addr_t end)
194 u32 bar, lar;
196 if (!is_region_fixed(number))
197 return -EINVAL;
199 bar = start;
200 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
202 bar |= PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED;
203 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
205 prsel_write(number);
206 isb();
208 if (prbar_read() != bar || prlar_read() != lar)
209 return -EINVAL;
211 /* Reserved region was set up early, we just need a record for secondaries */
212 mpu_rgn_info.rgns[number].prbar = bar;
213 mpu_rgn_info.rgns[number].prlar = lar;
215 mpu_rgn_info.used++;
217 return 0;
220 #ifndef CONFIG_CPU_V7M
221 static int __init pmsav8_setup_vector(unsigned int number, phys_addr_t start,phys_addr_t end)
223 u32 bar, lar;
225 if (number == PMSAv8_KERNEL_REGION)
226 return -EINVAL;
228 bar = start;
229 lar = (end - 1) & ~(PMSAv8_MINALIGN - 1);
231 bar |= PMSAv8_AP_PL1RW_PL0NA | PMSAv8_RGN_SHARED;
232 lar |= PMSAv8_LAR_IDX(PMSAv8_RGN_NORMAL) | PMSAv8_LAR_EN;
234 return __pmsav8_setup_region(number, bar, lar);
236 #endif
238 void __init pmsav8_setup(void)
240 int i, err = 0;
241 int region = PMSAv8_KERNEL_REGION;
243 /* How many regions are supported ? */
244 mpu_max_regions = __mpu_max_regions();
246 /* RAM: single chunk of memory */
247 add_range(mem, ARRAY_SIZE(mem), 0, memblock.memory.regions[0].base,
248 memblock.memory.regions[0].base + memblock.memory.regions[0].size);
250 /* IO: cover full 4G range */
251 add_range(io, ARRAY_SIZE(io), 0, 0, 0xffffffff);
253 /* RAM and IO: exclude kernel */
254 subtract_range(mem, ARRAY_SIZE(mem), __pa(KERNEL_START), __pa(KERNEL_END));
255 subtract_range(io, ARRAY_SIZE(io), __pa(KERNEL_START), __pa(KERNEL_END));
257 #ifdef CONFIG_XIP_KERNEL
258 /* RAM and IO: exclude xip */
259 subtract_range(mem, ARRAY_SIZE(mem), CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
260 subtract_range(io, ARRAY_SIZE(io), CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
261 #endif
263 #ifndef CONFIG_CPU_V7M
264 /* RAM and IO: exclude vectors */
265 subtract_range(mem, ARRAY_SIZE(mem), vectors_base, vectors_base + 2 * PAGE_SIZE);
266 subtract_range(io, ARRAY_SIZE(io), vectors_base, vectors_base + 2 * PAGE_SIZE);
267 #endif
268 /* IO: exclude RAM */
269 for (i = 0; i < ARRAY_SIZE(mem); i++)
270 subtract_range(io, ARRAY_SIZE(io), mem[i].start, mem[i].end);
272 /* Now program MPU */
274 #ifdef CONFIG_XIP_KERNEL
275 /* ROM */
276 err |= pmsav8_setup_fixed(PMSAv8_XIP_REGION, CONFIG_XIP_PHYS_ADDR, __pa(_exiprom));
277 #endif
278 /* Kernel */
279 err |= pmsav8_setup_fixed(region++, __pa(KERNEL_START), __pa(KERNEL_END));
282 /* IO */
283 for (i = 0; i < ARRAY_SIZE(io); i++) {
284 if (!io[i].end)
285 continue;
287 err |= pmsav8_setup_io(region++, io[i].start, io[i].end);
290 /* RAM */
291 for (i = 0; i < ARRAY_SIZE(mem); i++) {
292 if (!mem[i].end)
293 continue;
295 err |= pmsav8_setup_ram(region++, mem[i].start, mem[i].end);
298 /* Vectors */
299 #ifndef CONFIG_CPU_V7M
300 err |= pmsav8_setup_vector(region++, vectors_base, vectors_base + 2 * PAGE_SIZE);
301 #endif
302 if (err)
303 pr_warn("MPU region initialization failure! %d", err);
304 else
305 pr_info("Using ARM PMSAv8 Compliant MPU. Used %d of %d regions\n",
306 mpu_rgn_info.used, mpu_max_regions);