arch/arm64/boot/dts/exynos/exynos5433-tm2.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Samsung Exynos5433 TM2 board device tree source
   4  *
   5  * Copyright (c) 2016 Samsung Electronics Co., Ltd.
   6  *
   7  * Device tree source file for Samsung's TM2 board which is based on
   8  * Samsung Exynos5433 SoC.
   9  */
  10
  11 #include "exynos5433-tm2-common.dtsi"
  12
  13 / {
  14         model = "Samsung TM2 board";
  15         compatible = "samsung,tm2", "samsung,exynos5433";
  16 };
  17
  18 &cmu_disp {
  19         /*
  20          * TM2 and TM2e differ only by DISP_PLL rate, but define all assigned
  21          * clocks properties for DISP CMU for each board to keep them together
  22          * for easier review and maintenance.
  23          */
  24         assigned-clocks = <&cmu_disp CLK_FOUT_DISP_PLL>,
  25                           <&cmu_mif CLK_DIV_SCLK_DECON_TV_ECLK>,
  26                           <&cmu_disp CLK_MOUT_ACLK_DISP_333_USER>,
  27                           <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
  28                           <&cmu_disp CLK_MOUT_SCLK_DSIM0>,
  29                           <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
  30                           <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK>,
  31                           <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_RXCLKESC0_USER>,
  32                           <&cmu_disp CLK_MOUT_PHYCLK_MIPIDPHY0_BITCLKDIV8_USER>,
  33                           <&cmu_disp CLK_MOUT_DISP_PLL>,
  34                           <&cmu_mif CLK_MOUT_SCLK_DECON_TV_ECLK_A>,
  35                           <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
  36                           <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK>,
  37                           <&cmu_disp CLK_MOUT_SCLK_DSD_USER>;
  38         assigned-clock-parents = <0>, <0>,
  39                                  <&cmu_mif CLK_ACLK_DISP_333>,
  40                                  <&cmu_mif CLK_SCLK_DSIM0_DISP>,
  41                                  <&cmu_disp CLK_MOUT_SCLK_DSIM0_USER>,
  42                                  <&cmu_mif CLK_SCLK_DECON_ECLK_DISP>,
  43                                  <&cmu_disp CLK_MOUT_SCLK_DECON_ECLK_USER>,
  44                                  <&cmu_disp CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY>,
  45                                  <&cmu_disp CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY>,
  46                                  <&cmu_disp CLK_FOUT_DISP_PLL>,
  47                                  <&cmu_mif CLK_MOUT_BUS_PLL_DIV2>,
  48                                  <&cmu_mif CLK_SCLK_DECON_TV_ECLK_DISP>,
  49                                  <&cmu_disp CLK_MOUT_SCLK_DECON_TV_ECLK_USER>,
  50                                  <&cmu_mif CLK_SCLK_DSD_DISP>;
  51         assigned-clock-rates = <250000000>, <400000000>;
  52 };
  53
  54 &dsi {
  55         panel@0 {
  56                 compatible = "samsung,s6e3ha2";
  57                 reg = <0>;
  58                 vdd3-supply = <&ldo27_reg>;
  59                 vci-supply = <&ldo28_reg>;
  60                 reset-gpios = <&gpg0 0 GPIO_ACTIVE_LOW>;
  61                 enable-gpios = <&gpf1 5 GPIO_ACTIVE_HIGH>;
  62         };
  63 };
  64
  65 &hsi2c_9 {
  66         status = "okay";
  67
  68         touchkey@20 {
  69                 compatible = "cypress,tm2-touchkey";
  70                 reg = <0x20>;
  71                 interrupt-parent = <&gpa3>;
  72                 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
  73                 vcc-supply = <&ldo32_reg>;
  74                 vdd-supply = <&ldo33_reg>;
  75         };
  76 };
  77
  78 &ldo31_reg {
  79         regulator-name = "TSP_VDD_1.85V_AP";
  80         regulator-min-microvolt = <1850000>;
  81         regulator-max-microvolt = <1850000>;
  82 };
  83
  84 &ldo38_reg {
  85         regulator-name = "VCC_3.0V_MOTOR_AP";
  86         regulator-min-microvolt = <3000000>;
  87         regulator-max-microvolt = <3000000>;
  88 };
  89
  90 &stmfts {
  91         touchscreen-size-x = <1439>;
  92         touchscreen-size-y = <2559>;
  93 };