arm64: dts: Revert "specify console via command line"
[linux/fpc-iii.git] / arch / arm64 / boot / dts / marvell / armada-3720-espressobin.dtsi
blob42e992f9c8a54413eceaa87d7b23f3b0bb021bf7
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
4  * Copyright (C) 2016 Marvell
5  *
6  * Romain Perier <romain.perier@free-electrons.com>
7  *
8  */
10 #include <dt-bindings/gpio/gpio.h>
11 #include "armada-372x.dtsi"
13 / {
14         aliases {
15                 ethernet0 = &eth0;
16                 serial0 = &uart0;
17                 serial1 = &uart1;
18         };
20         chosen {
21                 stdout-path = "serial0:115200n8";
22         };
24         memory@0 {
25                 device_type = "memory";
26                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
27         };
29         vcc_sd_reg1: regulator {
30                 compatible = "regulator-gpio";
31                 regulator-name = "vcc_sd1";
32                 regulator-min-microvolt = <1800000>;
33                 regulator-max-microvolt = <3300000>;
34                 regulator-boot-on;
36                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
37                 gpios-states = <0>;
38                 states = <1800000 0x1
39                           3300000 0x0>;
40                 enable-active-high;
41         };
44 /* J9 */
45 &pcie0 {
46         status = "okay";
47         phys = <&comphy1 0>;
48         pinctrl-names = "default";
49         pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>;
52 /* J6 */
53 &sata {
54         status = "okay";
55         phys = <&comphy2 0>;
56         phy-names = "sata-phy";
59 /* J1 */
60 &sdhci1 {
61         wp-inverted;
62         bus-width = <4>;
63         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
64         marvell,pad-type = "sd";
65         vqmmc-supply = <&vcc_sd_reg1>;
67         pinctrl-names = "default";
68         pinctrl-0 = <&sdio_pins>;
69         status = "okay";
72 &spi0 {
73         status = "okay";
75         flash@0 {
76                 reg = <0>;
77                 compatible = "jedec,spi-nor";
78                 spi-max-frequency = <104000000>;
79                 m25p,fast-read;
80         };
83 /* Exported on the micro USB connector J5 through an FTDI */
84 &uart0 {
85         pinctrl-names = "default";
86         pinctrl-0 = <&uart1_pins>;
87         status = "okay";
91  * Connector J17 and J18 expose a number of different features. Some pins are
92  * multiplexed. This is the case for instance for the following features:
93  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
94  *   how to enable it. Beware that the signals are 1.8V TTL.
95  * - I2C
96  * - SPI
97  * - MMC
98  */
100 /* J7 */
101 &usb3 {
102         status = "okay";
105 /* J8 */
106 &usb2 {
107         status = "okay";
110 &mdio {
111         switch0: switch0@1 {
112                 compatible = "marvell,mv88e6085";
113                 #address-cells = <1>;
114                 #size-cells = <0>;
115                 reg = <1>;
117                 dsa,member = <0 0>;
119                 ports {
120                         #address-cells = <1>;
121                         #size-cells = <0>;
123                         port@0 {
124                                 reg = <0>;
125                                 label = "cpu";
126                                 ethernet = <&eth0>;
127                                 phy-mode = "rgmii-id";
128                                 fixed-link {
129                                         speed = <1000>;
130                                         full-duplex;
131                                 };
132                         };
134                         port@1 {
135                                 reg = <1>;
136                                 label = "wan";
137                                 phy-handle = <&switch0phy0>;
138                         };
140                         port@2 {
141                                 reg = <2>;
142                                 label = "lan0";
143                                 phy-handle = <&switch0phy1>;
144                         };
146                         port@3 {
147                                 reg = <3>;
148                                 label = "lan1";
149                                 phy-handle = <&switch0phy2>;
150                         };
152                 };
154                 mdio {
155                         #address-cells = <1>;
156                         #size-cells = <0>;
158                         switch0phy0: switch0phy0@11 {
159                                 reg = <0x11>;
160                         };
161                         switch0phy1: switch0phy1@12 {
162                                 reg = <0x12>;
163                         };
164                         switch0phy2: switch0phy2@13 {
165                                 reg = <0x13>;
166                         };
167                 };
168         };
171 &eth0 {
172         pinctrl-names = "default";
173         pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
174         phy-mode = "rgmii-id";
175         status = "okay";
177         fixed-link {
178                 speed = <1000>;
179                 full-duplex;
180         };