| blob | a0385a386a3fc6c63e61c19442492adb783d6838 |
1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra132.dtsi"
7 / {
8 model = "NVIDIA Tegra132 Norrin";
9 compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
11 aliases {
12 rtc0 = "/i2c@7000d000/as3722@40";
13 rtc1 = "/rtc@7000e000";
14 serial0 = &uarta;
15 };
17 chosen {
18 stdout-path = "serial0:115200n8";
19 };
21 memory {
22 device_type = "memory";
23 reg = <0x0 0x80000000 0x0 0x80000000>;
24 };
26 host1x@50000000 {
27 hdmi@54280000 {
28 status = "disabled";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio =
36 <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
37 };
39 sor@54540000 {
40 status = "okay";
42 nvidia,dpaux = <&dpaux>;
43 nvidia,panel = <&panel>;
44 };
46 dpaux: dpaux@545c0000 {
47 vdd-supply = <&vdd_3v3_panel>;
48 status = "okay";
49 };
50 };
52 gpu@57000000 {
53 status = "okay";
55 vdd-supply = <&vdd_gpu>;
56 };
58 pinmux@70000868 {
59 pinctrl-names = "default";
60 pinctrl-0 = <&pinmux_default>;
62 pinmux_default: pinmux@0 {
63 dap_mclk1_pw4 {
64 nvidia,pins = "dap_mclk1_pw4";
65 nvidia,function = "extperiph1";
66 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
67 nvidia,tristate = <TEGRA_PIN_DISABLE>;
68 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
69 };
70 dap2_din_pa4 {
71 nvidia,pins = "dap2_din_pa4";
72 nvidia,function = "i2s1";
73 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
74 nvidia,tristate = <TEGRA_PIN_DISABLE>;
75 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
76 };
77 dap2_dout_pa5 {
78 nvidia,pins = "dap2_dout_pa5",
79 "dap2_fs_pa2",
80 "dap2_sclk_pa3";
81 nvidia,function = "i2s1";
82 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
83 nvidia,tristate = <TEGRA_PIN_DISABLE>;
84 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
85 };
86 dap3_dout_pp2 {
87 nvidia,pins = "dap3_dout_pp2";
88 nvidia,function = "i2s2";
89 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
90 nvidia,tristate = <TEGRA_PIN_DISABLE>;
91 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
92 };
93 dvfs_pwm_px0 {
94 nvidia,pins = "dvfs_pwm_px0",
95 "dvfs_clk_px2";
96 nvidia,function = "cldvfs";
97 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
98 nvidia,tristate = <TEGRA_PIN_DISABLE>;
99 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
100 };
101 ulpi_clk_py0 {
102 nvidia,pins = "ulpi_clk_py0",
103 "ulpi_nxt_py2",
104 "ulpi_stp_py3";
105 nvidia,function = "spi1";
106 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
107 nvidia,tristate = <TEGRA_PIN_DISABLE>;
108 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
109 };
110 ulpi_dir_py1 {
111 nvidia,pins = "ulpi_dir_py1";
112 nvidia,function = "spi1";
113 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
114 nvidia,tristate = <TEGRA_PIN_DISABLE>;
115 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
116 };
117 cam_i2c_scl_pbb1 {
118 nvidia,pins = "cam_i2c_scl_pbb1",
119 "cam_i2c_sda_pbb2";
120 nvidia,function = "i2c3";
121 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
122 nvidia,tristate = <TEGRA_PIN_DISABLE>;
123 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
124 nvidia,lock = <TEGRA_PIN_DISABLE>;
125 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
126 };
127 gen2_i2c_scl_pt5 {
128 nvidia,pins = "gen2_i2c_scl_pt5",
129 "gen2_i2c_sda_pt6";
130 nvidia,function = "i2c2";
131 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132 nvidia,tristate = <TEGRA_PIN_DISABLE>;
133 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134 nvidia,lock = <TEGRA_PIN_DISABLE>;
135 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
136 };
137 pj7 {
138 nvidia,pins = "pj7";
139 nvidia,function = "uartd";
140 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
141 nvidia,tristate = <TEGRA_PIN_DISABLE>;
142 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
143 };
144 spdif_in_pk6 {
145 nvidia,pins = "spdif_in_pk6";
146 nvidia,function = "spdif";
147 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
148 nvidia,tristate = <TEGRA_PIN_DISABLE>;
149 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
150 };
151 pk7 {
152 nvidia,pins = "pk7";
153 nvidia,function = "uartd";
154 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
155 nvidia,tristate = <TEGRA_PIN_DISABLE>;
156 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
157 };
158 pg4 {
159 nvidia,pins = "pg4",
160 "pg5",
161 "pg6",
162 "pi3";
163 nvidia,function = "spi4";
164 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
165 nvidia,tristate = <TEGRA_PIN_DISABLE>;
166 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
167 };
168 pg7 {
169 nvidia,pins = "pg7";
170 nvidia,function = "spi4";
171 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
172 nvidia,tristate = <TEGRA_PIN_DISABLE>;
173 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
174 };
175 ph1 {
176 nvidia,pins = "ph1";
177 nvidia,function = "pwm1";
178 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
179 nvidia,tristate = <TEGRA_PIN_DISABLE>;
180 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
181 };
182 pk0 {
183 nvidia,pins = "pk0",
184 "kb_row15_ps7",
185 "clk_32k_out_pa0";
186 nvidia,function = "soc";
187 nvidia,pull = <TEGRA_PIN_PULL_UP>;
188 nvidia,tristate = <TEGRA_PIN_DISABLE>;
189 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
190 };
191 sdmmc1_clk_pz0 {
192 nvidia,pins = "sdmmc1_clk_pz0";
193 nvidia,function = "sdmmc1";
194 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
195 nvidia,tristate = <TEGRA_PIN_DISABLE>;
196 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
197 };
198 sdmmc1_cmd_pz1 {
199 nvidia,pins = "sdmmc1_cmd_pz1",
200 "sdmmc1_dat0_py7",
201 "sdmmc1_dat1_py6",
202 "sdmmc1_dat2_py5",
203 "sdmmc1_dat3_py4";
204 nvidia,function = "sdmmc1";
205 nvidia,pull = <TEGRA_PIN_PULL_UP>;
206 nvidia,tristate = <TEGRA_PIN_DISABLE>;
207 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
208 };
209 sdmmc3_clk_pa6 {
210 nvidia,pins = "sdmmc3_clk_pa6";
211 nvidia,function = "sdmmc3";
212 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
213 nvidia,tristate = <TEGRA_PIN_DISABLE>;
214 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
215 };
216 sdmmc3_cmd_pa7 {
217 nvidia,pins = "sdmmc3_cmd_pa7",
218 "sdmmc3_dat0_pb7",
219 "sdmmc3_dat1_pb6",
220 "sdmmc3_dat2_pb5",
221 "sdmmc3_dat3_pb4",
222 "kb_col4_pq4",
223 "sdmmc3_clk_lb_out_pee4",
224 "sdmmc3_clk_lb_in_pee5",
225 "sdmmc3_cd_n_pv2";
226 nvidia,function = "sdmmc3";
227 nvidia,pull = <TEGRA_PIN_PULL_UP>;
228 nvidia,tristate = <TEGRA_PIN_DISABLE>;
229 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
230 };
231 sdmmc4_clk_pcc4 {
232 nvidia,pins = "sdmmc4_clk_pcc4";
233 nvidia,function = "sdmmc4";
234 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235 nvidia,tristate = <TEGRA_PIN_DISABLE>;
236 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
237 };
238 sdmmc4_cmd_pt7 {
239 nvidia,pins = "sdmmc4_cmd_pt7",
240 "sdmmc4_dat0_paa0",
241 "sdmmc4_dat1_paa1",
242 "sdmmc4_dat2_paa2",
243 "sdmmc4_dat3_paa3",
244 "sdmmc4_dat4_paa4",
245 "sdmmc4_dat5_paa5",
246 "sdmmc4_dat6_paa6",
247 "sdmmc4_dat7_paa7";
248 nvidia,function = "sdmmc4";
249 nvidia,pull = <TEGRA_PIN_PULL_UP>;
250 nvidia,tristate = <TEGRA_PIN_DISABLE>;
251 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
252 };
253 mic_det_l {
254 nvidia,pins = "kb_row7_pr7";
255 nvidia,function = "rsvd2";
256 nvidia,pull = <TEGRA_PIN_PULL_UP>;
257 nvidia,tristate = <TEGRA_PIN_DISABLE>;
258 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
259 };
260 kb_row10_ps2 {
261 nvidia,pins = "kb_row10_ps2";
262 nvidia,function = "uarta";
263 nvidia,pull = <TEGRA_PIN_PULL_UP>;
264 nvidia,tristate = <TEGRA_PIN_DISABLE>;
265 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
266 };
267 kb_row9_ps1 {
268 nvidia,pins = "kb_row9_ps1";
269 nvidia,function = "uarta";
270 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
271 nvidia,tristate = <TEGRA_PIN_DISABLE>;
272 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
273 };
274 pwr_i2c_scl_pz6 {
275 nvidia,pins = "pwr_i2c_scl_pz6",
276 "pwr_i2c_sda_pz7";
277 nvidia,function = "i2cpwr";
278 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
279 nvidia,tristate = <TEGRA_PIN_DISABLE>;
280 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
281 nvidia,lock = <TEGRA_PIN_DISABLE>;
282 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
283 };
284 jtag_rtck {
285 nvidia,pins = "jtag_rtck";
286 nvidia,function = "rtck";
287 nvidia,pull = <TEGRA_PIN_PULL_UP>;
288 nvidia,tristate = <TEGRA_PIN_DISABLE>;
289 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
290 };
291 clk_32k_in {
292 nvidia,pins = "clk_32k_in";
293 nvidia,function = "clk";
294 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
295 nvidia,tristate = <TEGRA_PIN_DISABLE>;
296 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
297 };
298 core_pwr_req {
299 nvidia,pins = "core_pwr_req";
300 nvidia,function = "pwron";
301 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
302 nvidia,tristate = <TEGRA_PIN_DISABLE>;
303 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
304 };
305 cpu_pwr_req {
306 nvidia,pins = "cpu_pwr_req";
307 nvidia,function = "cpu";
308 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
309 nvidia,tristate = <TEGRA_PIN_DISABLE>;
310 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
311 };
312 kb_col0_ap {
313 nvidia,pins = "kb_col0_pq0";
314 nvidia,function = "rsvd4";
315 nvidia,pull = <TEGRA_PIN_PULL_UP>;
316 nvidia,tristate = <TEGRA_PIN_DISABLE>;
317 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
318 };
319 en_vdd_sd {
320 nvidia,pins = "kb_row0_pr0";
321 nvidia,function = "rsvd4";
322 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
323 nvidia,tristate = <TEGRA_PIN_DISABLE>;
324 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
325 };
326 lid_open {
327 nvidia,pins = "kb_row4_pr4";
328 nvidia,function = "rsvd3";
329 nvidia,pull = <TEGRA_PIN_PULL_UP>;
330 nvidia,tristate = <TEGRA_PIN_DISABLE>;
331 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332 };
333 pwr_int_n {
334 nvidia,pins = "pwr_int_n";
335 nvidia,function = "pmi";
336 nvidia,pull = <TEGRA_PIN_PULL_UP>;
337 nvidia,tristate = <TEGRA_PIN_DISABLE>;
338 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
339 };
340 reset_out_n {
341 nvidia,pins = "reset_out_n";
342 nvidia,function = "reset_out_n";
343 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
344 nvidia,tristate = <TEGRA_PIN_DISABLE>;
345 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
346 };
347 clk3_out_pee0 {
348 nvidia,pins = "clk3_out_pee0";
349 nvidia,function = "extperiph3";
350 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
351 nvidia,tristate = <TEGRA_PIN_DISABLE>;
352 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
353 };
354 gen1_i2c_scl_pc4 {
355 nvidia,pins = "gen1_i2c_scl_pc4",
356 "gen1_i2c_sda_pc5";
357 nvidia,function = "i2c1";
358 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
359 nvidia,tristate = <TEGRA_PIN_DISABLE>;
360 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
361 nvidia,lock = <TEGRA_PIN_DISABLE>;
362 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
363 };
364 hdmi_cec_pee3 {
365 nvidia,pins = "hdmi_cec_pee3";
366 nvidia,function = "cec";
367 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
368 nvidia,tristate = <TEGRA_PIN_DISABLE>;
369 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
370 nvidia,lock = <TEGRA_PIN_DISABLE>;
371 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
372 };
373 hdmi_int_pn7 {
374 nvidia,pins = "hdmi_int_pn7";
375 nvidia,function = "rsvd1";
376 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
377 nvidia,tristate = <TEGRA_PIN_DISABLE>;
378 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
379 };
380 ddc_scl_pv4 {
381 nvidia,pins = "ddc_scl_pv4",
382 "ddc_sda_pv5";
383 nvidia,function = "i2c4";
384 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
385 nvidia,tristate = <TEGRA_PIN_DISABLE>;
386 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
387 nvidia,lock = <TEGRA_PIN_DISABLE>;
388 nvidia,rcv-sel = <TEGRA_PIN_ENABLE>;
389 };
390 usb_vbus_en0_pn4 {
391 nvidia,pins = "usb_vbus_en0_pn4",
392 "usb_vbus_en1_pn5",
393 "usb_vbus_en2_pff1";
394 nvidia,function = "usb";
395 nvidia,pull = <TEGRA_PIN_PULL_UP>;
396 nvidia,tristate = <TEGRA_PIN_ENABLE>;
397 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
398 nvidia,lock = <TEGRA_PIN_DISABLE>;
399 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
400 };
401 drive_sdio1 {
402 nvidia,pins = "drive_sdio1";
403 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
404 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
405 nvidia,pull-down-strength = <36>;
406 nvidia,pull-up-strength = <20>;
407 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
408 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
409 };
410 drive_sdio3 {
411 nvidia,pins = "drive_sdio3";
412 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
413 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
414 nvidia,pull-down-strength = <22>;
415 nvidia,pull-up-strength = <36>;
416 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
417 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
418 };
419 drive_gma {
420 nvidia,pins = "drive_gma";
421 nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
422 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
423 nvidia,pull-down-strength = <2>;
424 nvidia,pull-up-strength = <1>;
425 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
426 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
427 nvidia,drive-type = <1>;
428 };
429 ac_ok {
430 nvidia,pins = "pj0";
431 nvidia,function = "gmi";
432 nvidia,pull = <TEGRA_PIN_PULL_UP>;
433 nvidia,tristate = <TEGRA_PIN_ENABLE>;
434 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
435 };
436 codec_irq_l {
437 nvidia,pins = "ph4";
438 nvidia,function = "gmi";
439 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
440 nvidia,tristate = <TEGRA_PIN_DISABLE>;
441 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
442 };
443 lcd_bl_en {
444 nvidia,pins = "ph2";
445 nvidia,function = "gmi";
446 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
447 nvidia,tristate = <TEGRA_PIN_DISABLE>;
448 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
449 };
450 touch_irq_l {
451 nvidia,pins = "gpio_w3_aud_pw3";
452 nvidia,function = "spi6";
453 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
454 nvidia,tristate = <TEGRA_PIN_DISABLE>;
455 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
456 };
457 tpm_davint_l {
458 nvidia,pins = "ph6";
459 nvidia,function = "gmi";
460 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
461 nvidia,tristate = <TEGRA_PIN_DISABLE>;
462 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
463 };
464 ts_irq_l {
465 nvidia,pins = "pk2";
466 nvidia,function = "gmi";
467 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
468 nvidia,tristate = <TEGRA_PIN_DISABLE>;
469 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
470 };
471 ts_reset_l {
472 nvidia,pins = "pk4";
473 nvidia,function = "gmi";
474 nvidia,pull = <1>;
475 nvidia,tristate = <TEGRA_PIN_DISABLE>;
476 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
477 };
478 ts_shdn_l {
479 nvidia,pins = "pk1";
480 nvidia,function = "gmi";
481 nvidia,pull = <TEGRA_PIN_PULL_UP>;
482 nvidia,tristate = <TEGRA_PIN_DISABLE>;
483 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
484 };
485 ph7 {
486 nvidia,pins = "ph7";
487 nvidia,function = "gmi";
488 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
489 nvidia,tristate = <TEGRA_PIN_DISABLE>;
490 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
491 };
492 sensor_irq_l {
493 nvidia,pins = "pi6";
494 nvidia,function = "gmi";
495 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
496 nvidia,tristate = <TEGRA_PIN_DISABLE>;
497 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
498 };
499 wifi_en {
500 nvidia,pins = "gpio_x7_aud_px7";
501 nvidia,function = "rsvd4";
502 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
503 nvidia,tristate = <TEGRA_PIN_DISABLE>;
504 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
505 };
506 chromeos_write_protect {
507 nvidia,pins = "kb_row1_pr1";
508 nvidia,function = "rsvd4";
509 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
510 nvidia,tristate = <TEGRA_PIN_DISABLE>;
511 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
512 };
513 hp_det_l {
514 nvidia,pins = "pi7";
515 nvidia,function = "rsvd1";
516 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
517 nvidia,tristate = <TEGRA_PIN_DISABLE>;
518 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
519 };
520 soc_warm_reset_l {
521 nvidia,pins = "pi5";
522 nvidia,function = "gmi";
523 nvidia,pull = <TEGRA_PIN_PULL_UP>;
524 nvidia,tristate = <TEGRA_PIN_DISABLE>;
525 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
526 };
527 };
528 };
530 serial@70006000 {
531 status = "okay";
532 };
534 pwm: pwm@7000a000 {
535 status = "okay";
536 };
538 /* HDMI DDC */
539 hdmi_ddc: i2c@7000c700 {
540 status = "okay";
541 clock-frequency = <100000>;
542 };
544 i2c@7000d000 {
545 status = "okay";
546 clock-frequency = <400000>;
548 as3722: pmic@40 {
549 compatible = "ams,as3722";
550 reg = <0x40>;
551 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
553 ams,system-power-controller;
555 #interrupt-cells = <2>;
556 interrupt-controller;
558 #gpio-cells = <2>;
559 gpio-controller;
561 pinctrl-names = "default";
562 pinctrl-0 = <&as3722_default>;
564 as3722_default: pinmux@0 {
565 gpio0 {
566 pins = "gpio0";
567 function = "gpio";
568 bias-pull-down;
569 };
571 gpio1 {
572 pins = "gpio1";
573 function = "gpio";
574 bias-pull-up;
575 };
577 gpio2_4_7 {
578 pins = "gpio2", "gpio4", "gpio7";
579 function = "gpio";
580 bias-pull-up;
581 };
583 gpio3 {
584 pins = "gpio3";
585 function = "gpio";
586 bias-high-impedance;
587 };
589 gpio5 {
590 pins = "gpio5";
591 function = "clk32k-out";
592 bias-pull-down;
593 };
595 gpio6 {
596 pins = "gpio6";
597 function = "clk32k-out";
598 bias-pull-down;
599 };
600 };
602 regulators {
603 vsup-sd2-supply = <&vdd_5v0_sys>;
604 vsup-sd3-supply = <&vdd_5v0_sys>;
605 vsup-sd4-supply = <&vdd_5v0_sys>;
606 vsup-sd5-supply = <&vdd_5v0_sys>;
607 vin-ldo0-supply = <&vdd_1v35_lp0>;
608 vin-ldo1-6-supply = <&vdd_3v3_sys>;
609 vin-ldo2-5-7-supply = <&vddio_1v8>;
610 vin-ldo3-4-supply = <&vdd_3v3_sys>;
611 vin-ldo9-10-supply = <&vdd_5v0_sys>;
612 vin-ldo11-supply = <&vdd_3v3_run>;
614 sd0 {
615 regulator-name = "+VDD_CPU_AP";
616 regulator-min-microvolt = <700000>;
617 regulator-max-microvolt = <1350000>;
618 regulator-max-microamp = <3500000>;
619 regulator-always-on;
620 regulator-boot-on;
621 ams,ext-control = <2>;
622 };
624 sd1 {
625 regulator-name = "+VDD_CORE";
626 regulator-min-microvolt = <700000>;
627 regulator-max-microvolt = <1350000>;
628 regulator-max-microamp = <4000000>;
629 regulator-always-on;
630 regulator-boot-on;
631 ams,ext-control = <1>;
632 };
634 vdd_1v35_lp0: sd2 {
635 regulator-name = "+1.35V_LP0(sd2)";
636 regulator-min-microvolt = <1350000>;
637 regulator-max-microvolt = <1350000>;
638 regulator-always-on;
639 regulator-boot-on;
640 };
642 sd3 {
643 regulator-name = "+1.35V_LP0(sd3)";
644 regulator-min-microvolt = <1350000>;
645 regulator-max-microvolt = <1350000>;
646 regulator-always-on;
647 regulator-boot-on;
648 };
650 vdd_1v05_run: sd4 {
651 regulator-name = "+1.05V_RUN";
652 regulator-min-microvolt = <1050000>;
653 regulator-max-microvolt = <1050000>;
654 };
656 vddio_1v8: sd5 {
657 regulator-name = "+1.8V_VDDIO";
658 regulator-min-microvolt = <1800000>;
659 regulator-max-microvolt = <1800000>;
660 regulator-always-on;
661 regulator-boot-on;
662 };
664 vdd_gpu: sd6 {
665 regulator-name = "+VDD_GPU_AP";
666 regulator-min-microvolt = <800000>;
667 regulator-max-microvolt = <1200000>;
668 regulator-min-microamp = <3500000>;
669 regulator-max-microamp = <3500000>;
670 regulator-always-on;
671 regulator-boot-on;
672 };
674 ldo0 {
675 regulator-name = "+1.05_RUN_AVDD";
676 regulator-min-microvolt = <1050000>;
677 regulator-max-microvolt = <1050000>;
678 regulator-always-on;
679 regulator-boot-on;
680 ams,ext-control = <1>;
681 };
683 ldo1 {
684 regulator-name = "+1.8V_RUN_CAM";
685 regulator-min-microvolt = <1800000>;
686 regulator-max-microvolt = <1800000>;
687 };
689 ldo2 {
690 regulator-name = "+1.2V_GEN_AVDD";
691 regulator-min-microvolt = <1200000>;
692 regulator-max-microvolt = <1200000>;
693 regulator-always-on;
694 regulator-boot-on;
695 };
697 ldo3 {
698 regulator-name = "+1.00V_LP0_VDD_RTC";
699 regulator-min-microvolt = <1000000>;
700 regulator-max-microvolt = <1000000>;
701 regulator-always-on;
702 regulator-boot-on;
703 ams,enable-tracking;
704 };
706 vdd_run_cam: ldo4 {
707 regulator-name = "+2.8V_RUN_CAM";
708 regulator-min-microvolt = <2800000>;
709 regulator-max-microvolt = <2800000>;
710 };
712 ldo5 {
713 regulator-name = "+1.2V_RUN_CAM_FRONT";
714 regulator-min-microvolt = <1200000>;
715 regulator-max-microvolt = <1200000>;
716 };
718 vddio_sdmmc3: ldo6 {
719 regulator-name = "+VDDIO_SDMMC3";
720 regulator-min-microvolt = <1800000>;
721 regulator-max-microvolt = <3300000>;
722 };
724 ldo7 {
725 regulator-name = "+1.05V_RUN_CAM_REAR";
726 regulator-min-microvolt = <1050000>;
727 regulator-max-microvolt = <1050000>;
728 };
730 ldo9 {
731 regulator-name = "+2.8V_RUN_TOUCH";
732 regulator-min-microvolt = <2800000>;
733 regulator-max-microvolt = <2800000>;
734 };
736 ldo10 {
737 regulator-name = "+2.8V_RUN_CAM_AF";
738 regulator-min-microvolt = <2800000>;
739 regulator-max-microvolt = <2800000>;
740 };
742 ldo11 {
743 regulator-name = "+1.8V_RUN_VPP_FUSE";
744 regulator-min-microvolt = <1800000>;
745 regulator-max-microvolt = <1800000>;
746 };
747 };
748 };
749 };
751 spi@7000d400 {
752 status = "okay";
754 ec: cros-ec@0 {
755 compatible = "google,cros-ec-spi";
756 spi-max-frequency = <3000000>;
757 interrupt-parent = <&gpio>;
758 interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>;
759 reg = <0>;
761 google,cros-ec-spi-msg-delay = <2000>;
763 i2c_20: i2c-tunnel {
764 compatible = "google,cros-ec-i2c-tunnel";
765 #address-cells = <1>;
766 #size-cells = <0>;
768 google,remote-bus = <0>;
770 charger: bq24735 {
771 compatible = "ti,bq24735";
772 reg = <0x9>;
773 interrupt-parent = <&gpio>;
774 interrupts = <TEGRA_GPIO(J, 0)
775 GPIO_ACTIVE_HIGH>;
776 ti,ac-detect-gpios = <&gpio
777 TEGRA_GPIO(J, 0)
778 GPIO_ACTIVE_HIGH>;
779 };
781 battery: smart-battery {
782 compatible = "sbs,sbs-battery";
783 reg = <0xb>;
784 battery-name = "battery";
785 sbs,i2c-retry-count = <2>;
786 sbs,poll-retry-count = <10>;
787 /* power-supplies = <&charger>; */
788 };
789 };
791 keyboard-controller {
792 compatible = "google,cros-ec-keyb";
793 keypad,num-rows = <8>;
794 keypad,num-columns = <13>;
795 google,needs-ghost-filter;
796 linux,keymap =
797 <MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
798 MATRIX_KEY(0x00, 0x02, KEY_F1)
799 MATRIX_KEY(0x00, 0x03, KEY_B)
800 MATRIX_KEY(0x00, 0x04, KEY_F10)
801 MATRIX_KEY(0x00, 0x06, KEY_N)
802 MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
803 MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
805 MATRIX_KEY(0x01, 0x01, KEY_ESC)
806 MATRIX_KEY(0x01, 0x02, KEY_F4)
807 MATRIX_KEY(0x01, 0x03, KEY_G)
808 MATRIX_KEY(0x01, 0x04, KEY_F7)
809 MATRIX_KEY(0x01, 0x06, KEY_H)
810 MATRIX_KEY(0x01, 0x08, KEY_APOSTROPHE)
811 MATRIX_KEY(0x01, 0x09, KEY_F9)
812 MATRIX_KEY(0x01, 0x0b, KEY_BACKSPACE)
814 MATRIX_KEY(0x02, 0x00, KEY_LEFTCTRL)
815 MATRIX_KEY(0x02, 0x01, KEY_TAB)
816 MATRIX_KEY(0x02, 0x02, KEY_F3)
817 MATRIX_KEY(0x02, 0x03, KEY_T)
818 MATRIX_KEY(0x02, 0x04, KEY_F6)
819 MATRIX_KEY(0x02, 0x05, KEY_RIGHTBRACE)
820 MATRIX_KEY(0x02, 0x06, KEY_Y)
821 MATRIX_KEY(0x02, 0x07, KEY_102ND)
822 MATRIX_KEY(0x02, 0x08, KEY_LEFTBRACE)
823 MATRIX_KEY(0x02, 0x09, KEY_F8)
825 MATRIX_KEY(0x03, 0x01, KEY_GRAVE)
826 MATRIX_KEY(0x03, 0x02, KEY_F2)
827 MATRIX_KEY(0x03, 0x03, KEY_5)
828 MATRIX_KEY(0x03, 0x04, KEY_F5)
829 MATRIX_KEY(0x03, 0x06, KEY_6)
830 MATRIX_KEY(0x03, 0x08, KEY_MINUS)
831 MATRIX_KEY(0x03, 0x0b, KEY_BACKSLASH)
833 MATRIX_KEY(0x04, 0x00, KEY_RIGHTCTRL)
834 MATRIX_KEY(0x04, 0x01, KEY_A)
835 MATRIX_KEY(0x04, 0x02, KEY_D)
836 MATRIX_KEY(0x04, 0x03, KEY_F)
837 MATRIX_KEY(0x04, 0x04, KEY_S)
838 MATRIX_KEY(0x04, 0x05, KEY_K)
839 MATRIX_KEY(0x04, 0x06, KEY_J)
840 MATRIX_KEY(0x04, 0x08, KEY_SEMICOLON)
841 MATRIX_KEY(0x04, 0x09, KEY_L)
842 MATRIX_KEY(0x04, 0x0a, KEY_BACKSLASH)
843 MATRIX_KEY(0x04, 0x0b, KEY_ENTER)
845 MATRIX_KEY(0x05, 0x01, KEY_Z)
846 MATRIX_KEY(0x05, 0x02, KEY_C)
847 MATRIX_KEY(0x05, 0x03, KEY_V)
848 MATRIX_KEY(0x05, 0x04, KEY_X)
849 MATRIX_KEY(0x05, 0x05, KEY_COMMA)
850 MATRIX_KEY(0x05, 0x06, KEY_M)
851 MATRIX_KEY(0x05, 0x07, KEY_LEFTSHIFT)
852 MATRIX_KEY(0x05, 0x08, KEY_SLASH)
853 MATRIX_KEY(0x05, 0x09, KEY_DOT)
854 MATRIX_KEY(0x05, 0x0b, KEY_SPACE)
856 MATRIX_KEY(0x06, 0x01, KEY_1)
857 MATRIX_KEY(0x06, 0x02, KEY_3)
858 MATRIX_KEY(0x06, 0x03, KEY_4)
859 MATRIX_KEY(0x06, 0x04, KEY_2)
860 MATRIX_KEY(0x06, 0x05, KEY_8)
861 MATRIX_KEY(0x06, 0x06, KEY_7)
862 MATRIX_KEY(0x06, 0x08, KEY_0)
863 MATRIX_KEY(0x06, 0x09, KEY_9)
864 MATRIX_KEY(0x06, 0x0a, KEY_LEFTALT)
865 MATRIX_KEY(0x06, 0x0b, KEY_DOWN)
866 MATRIX_KEY(0x06, 0x0c, KEY_RIGHT)
868 MATRIX_KEY(0x07, 0x01, KEY_Q)
869 MATRIX_KEY(0x07, 0x02, KEY_E)
870 MATRIX_KEY(0x07, 0x03, KEY_R)
871 MATRIX_KEY(0x07, 0x04, KEY_W)
872 MATRIX_KEY(0x07, 0x05, KEY_I)
873 MATRIX_KEY(0x07, 0x06, KEY_U)
874 MATRIX_KEY(0x07, 0x07, KEY_RIGHTSHIFT)
875 MATRIX_KEY(0x07, 0x08, KEY_P)
876 MATRIX_KEY(0x07, 0x09, KEY_O)
877 MATRIX_KEY(0x07, 0x0b, KEY_UP)
878 MATRIX_KEY(0x07, 0x0c, KEY_LEFT)>;
879 };
880 };
881 };
883 pmc@7000e400 {
884 nvidia,invert-interrupt;
885 nvidia,suspend-mode = <0>;
886 #wake-cells = <3>;
887 nvidia,cpu-pwr-good-time = <500>;
888 nvidia,cpu-pwr-off-time = <300>;
889 nvidia,core-pwr-good-time = <641 3845>;
890 nvidia,core-pwr-off-time = <61036>;
891 nvidia,core-power-req-active-high;
892 nvidia,sys-clock-req-active-high;
893 nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
894 };
896 /* WIFI/BT module */
897 sdhci@700b0000 {
898 status = "disabled";
899 };
901 /* external SD/MMC */
902 sdhci@700b0400 {
903 cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
904 power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
905 wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
906 status = "okay";
907 bus-width = <4>;
908 vqmmc-supply = <&vddio_sdmmc3>;
909 };
911 /* EMMC 4.51 */
912 sdhci@700b0600 {
913 status = "okay";
914 bus-width = <8>;
915 non-removable;
916 };
918 usb@7d000000 {
919 status = "okay";
920 };
922 usb-phy@7d000000 {
923 status = "okay";
924 vbus-supply = <&vdd_usb1_vbus>;
925 };
927 usb@7d004000 {
928 status = "okay";
929 };
931 usb-phy@7d004000 {
932 status = "okay";
933 vbus-supply = <&vdd_run_cam>;
934 };
936 usb@7d008000 {
937 status = "okay";
938 };
940 usb-phy@7d008000 {
941 status = "okay";
942 vbus-supply = <&vdd_usb3_vbus>;
943 };
945 backlight: backlight {
946 compatible = "pwm-backlight";
948 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
949 power-supply = <&vdd_led>;
950 pwms = <&pwm 1 1000000>;
952 brightness-levels = <0 4 8 16 32 64 128 255>;
953 default-brightness-level = <6>;
955 backlight-boot-off;
956 };
958 clocks {
959 compatible = "simple-bus";
960 #address-cells = <1>;
961 #size-cells = <0>;
963 clk32k_in: clock@0 {
964 compatible = "fixed-clock";
965 reg=<0>;
966 #clock-cells = <0>;
967 clock-frequency = <32768>;
968 };
969 };
971 gpio-keys {
972 compatible = "gpio-keys";
974 lid {
975 label = "Lid";
976 gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>;
977 linux,input-type = <5>;
978 linux,code = <0>;
979 debounce-interval = <1>;
980 wakeup-source;
981 };
983 power {
984 label = "Power";
985 gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
986 linux,code = <KEY_POWER>;
987 debounce-interval = <10>;
988 wakeup-source;
989 };
990 };
992 panel: panel {
993 compatible = "innolux,n116bge", "simple-panel";
994 backlight = <&backlight>;
995 ddc-i2c-bus = <&dpaux>;
996 };
998 regulators {
999 compatible = "simple-bus";
1000 #address-cells = <1>;
1001 #size-cells = <0>;
1003 vdd_mux: regulator@0 {
1004 compatible = "regulator-fixed";
1005 reg = <0>;
1006 regulator-name = "+VDD_MUX";
1007 regulator-min-microvolt = <19000000>;
1008 regulator-max-microvolt = <19000000>;
1009 regulator-always-on;
1010 regulator-boot-on;
1011 };
1013 vdd_5v0_sys: regulator@1 {
1014 compatible = "regulator-fixed";
1015 reg = <1>;
1016 regulator-name = "+5V_SYS";
1017 regulator-min-microvolt = <5000000>;
1018 regulator-max-microvolt = <5000000>;
1019 regulator-always-on;
1020 regulator-boot-on;
1021 vin-supply = <&vdd_mux>;
1022 };
1024 vdd_3v3_sys: regulator@2 {
1025 compatible = "regulator-fixed";
1026 reg = <2>;
1027 regulator-name = "+3.3V_SYS";
1028 regulator-min-microvolt = <3300000>;
1029 regulator-max-microvolt = <3300000>;
1030 regulator-always-on;
1031 regulator-boot-on;
1032 vin-supply = <&vdd_mux>;
1033 };
1035 vdd_3v3_run: regulator@3 {
1036 compatible = "regulator-fixed";
1037 reg = <3>;
1038 regulator-name = "+3.3V_RUN";
1039 regulator-min-microvolt = <3300000>;
1040 regulator-max-microvolt = <3300000>;
1041 regulator-always-on;
1042 regulator-boot-on;
1043 gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
1044 enable-active-high;
1045 vin-supply = <&vdd_3v3_sys>;
1046 };
1048 vdd_3v3_hdmi: regulator@4 {
1049 compatible = "regulator-fixed";
1050 reg = <4>;
1051 regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
1052 regulator-min-microvolt = <3300000>;
1053 regulator-max-microvolt = <3300000>;
1054 vin-supply = <&vdd_3v3_run>;
1055 };
1057 vdd_led: regulator@5 {
1058 compatible = "regulator-fixed";
1059 reg = <5>;
1060 regulator-name = "+VDD_LED";
1061 regulator-min-microvolt = <3300000>;
1062 regulator-max-microvolt = <3300000>;
1063 gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1064 enable-active-high;
1065 vin-supply = <&vdd_mux>;
1066 };
1068 vdd_usb1_vbus: regulator@6 {
1069 compatible = "regulator-fixed";
1070 reg = <6>;
1071 regulator-name = "+5V_USB_HS";
1072 regulator-min-microvolt = <5000000>;
1073 regulator-max-microvolt = <5000000>;
1074 gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
1075 enable-active-high;
1076 gpio-open-drain;
1077 vin-supply = <&vdd_5v0_sys>;
1078 };
1080 vdd_usb3_vbus: regulator@7 {
1081 compatible = "regulator-fixed";
1082 reg = <7>;
1083 regulator-name = "+5V_USB_SS";
1084 regulator-min-microvolt = <5000000>;
1085 regulator-max-microvolt = <5000000>;
1086 gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
1087 enable-active-high;
1088 gpio-open-drain;
1089 vin-supply = <&vdd_5v0_sys>;
1090 };
1092 vdd_3v3_panel: regulator@8 {
1093 compatible = "regulator-fixed";
1094 reg = <8>;
1095 regulator-name = "+3.3V_PANEL";
1096 regulator-min-microvolt = <3300000>;
1097 regulator-max-microvolt = <3300000>;
1098 gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
1099 enable-active-high;
1100 vin-supply = <&vdd_3v3_sys>;
1101 };
1103 vdd_hdmi_pll: regulator@9 {
1104 compatible = "regulator-fixed";
1105 reg = <9>;
1106 regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
1107 regulator-min-microvolt = <1050000>;
1108 regulator-max-microvolt = <1050000>;
1109 gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1110 vin-supply = <&vdd_1v05_run>;
1111 };
1113 vdd_5v0_hdmi: regulator@10 {
1114 compatible = "regulator-fixed";
1115 reg = <10>;
1116 regulator-name = "+5V_HDMI_CON";
1117 regulator-min-microvolt = <5000000>;
1118 regulator-max-microvolt = <5000000>;
1119 gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
1120 enable-active-high;
1121 vin-supply = <&vdd_5v0_sys>;
1122 };
1124 vdd_5v0_ts: regulator@11 {
1125 compatible = "regulator-fixed";
1126 reg = <11>;
1127 regulator-name = "+5V_VDD_TS";
1128 regulator-min-microvolt = <5000000>;
1129 regulator-max-microvolt = <5000000>;
1130 regulator-always-on;
1131 regulator-boot-on;
1132 gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1133 enable-active-high;
1134 };
1135 };
1136 };