arch/m68k/coldfire/m5407.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /***************************************************************************/
   3
   4 /*
   5  *      m5407.c  -- platform support for ColdFire 5407 based boards
   6  *
   7  *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
   8  *      Copyright (C) 2000, Lineo (www.lineo.com)
   9  */
  10
  11 /***************************************************************************/
  12
  13 #include <linux/kernel.h>
  14 #include <linux/param.h>
  15 #include <linux/init.h>
  16 #include <linux/io.h>
  17 #include <asm/machdep.h>
  18 #include <asm/coldfire.h>
  19 #include <asm/mcfsim.h>
  20 #include <asm/mcfclk.h>
  21
  22 /***************************************************************************/
  23
  24 DEFINE_CLK(pll, "pll.0", MCF_CLK);
  25 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
  26 DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
  27 DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
  28 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
  29 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
  30 DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
  31
  32 struct clk *mcf_clks[] = {
  33         &clk_pll,
  34         &clk_sys,
  35         &clk_mcftmr0,
  36         &clk_mcftmr1,
  37         &clk_mcfuart0,
  38         &clk_mcfuart1,
  39         &clk_mcfi2c0,
  40         NULL
  41 };
  42
  43 /***************************************************************************/
  44
  45 static void __init m5407_i2c_init(void)
  46 {
  47 #if IS_ENABLED(CONFIG_I2C_IMX)
  48         writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
  49                MCFSIM_I2CICR);
  50         mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
  51 #endif /* IS_ENABLED(CONFIG_I2C_IMX) */
  52 }
  53
  54 /***************************************************************************/
  55
  56 void __init config_BSP(char *commandp, int size)
  57 {
  58         mach_sched_init = hw_timer_init;
  59
  60         /* Only support the external interrupts on their primary level */
  61         mcf_mapirq2imr(25, MCFINTC_EINT1);
  62         mcf_mapirq2imr(27, MCFINTC_EINT3);
  63         mcf_mapirq2imr(29, MCFINTC_EINT5);
  64         mcf_mapirq2imr(31, MCFINTC_EINT7);
  65         m5407_i2c_init();
  66 }
  67
  68 /***************************************************************************/