arm64: dts: Revert "specify console via command line"
[linux/fpc-iii.git] / arch / m68k / include / asm / mvme16xhw.h
blobcc7f5ae1220ff73e898c58b9a56247fd118c515a
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _M68K_MVME16xHW_H_
3 #define _M68K_MVME16xHW_H_
5 #include <asm/irq.h>
8 typedef struct {
9 u_char ack_icr,
10 flt_icr,
11 sel_icr,
12 pe_icr,
13 bsy_icr,
14 spare1,
15 isr,
16 cr,
17 spare2,
18 spare3,
19 spare4,
20 data;
21 } MVMElp, *MVMElpPtr;
23 #define MVME_LPR_BASE 0xfff42030
25 #define mvmelp ((*(volatile MVMElpPtr)(MVME_LPR_BASE)))
27 typedef struct {
28 unsigned char
29 ctrl,
30 bcd_sec,
31 bcd_min,
32 bcd_hr,
33 bcd_dow,
34 bcd_dom,
35 bcd_mth,
36 bcd_year;
37 } MK48T08_t, *MK48T08ptr_t;
39 #define RTC_WRITE 0x80
40 #define RTC_READ 0x40
41 #define RTC_STOP 0x20
43 #define MVME_RTC_BASE 0xfffc1ff8
45 #define MVME_I596_BASE 0xfff46000
47 #define MVME_SCC_A_ADDR 0xfff45005
48 #define MVME_SCC_B_ADDR 0xfff45001
49 #define MVME_SCC_PCLK 10000000
51 #define MVME162_IRQ_TYPE_PRIO 0
53 #define MVME167_IRQ_PRN (IRQ_USER+20)
54 #define MVME16x_IRQ_I596 (IRQ_USER+23)
55 #define MVME16x_IRQ_SCSI (IRQ_USER+21)
56 #define MVME16x_IRQ_FLY (IRQ_USER+63)
57 #define MVME167_IRQ_SER_ERR (IRQ_USER+28)
58 #define MVME167_IRQ_SER_MODEM (IRQ_USER+29)
59 #define MVME167_IRQ_SER_TX (IRQ_USER+30)
60 #define MVME167_IRQ_SER_RX (IRQ_USER+31)
61 #define MVME16x_IRQ_TIMER (IRQ_USER+25)
62 #define MVME167_IRQ_ABORT (IRQ_USER+46)
63 #define MVME162_IRQ_ABORT (IRQ_USER+30)
65 /* SCC interrupts, for MVME162 */
66 #define MVME162_IRQ_SCC_BASE (IRQ_USER+0)
67 #define MVME162_IRQ_SCCB_TX (IRQ_USER+0)
68 #define MVME162_IRQ_SCCB_STAT (IRQ_USER+2)
69 #define MVME162_IRQ_SCCB_RX (IRQ_USER+4)
70 #define MVME162_IRQ_SCCB_SPCOND (IRQ_USER+6)
71 #define MVME162_IRQ_SCCA_TX (IRQ_USER+8)
72 #define MVME162_IRQ_SCCA_STAT (IRQ_USER+10)
73 #define MVME162_IRQ_SCCA_RX (IRQ_USER+12)
74 #define MVME162_IRQ_SCCA_SPCOND (IRQ_USER+14)
76 /* MVME162 version register */
78 #define MVME162_VERSION_REG 0xfff4202e
80 extern unsigned short mvme16x_config;
82 /* Lower 8 bits must match the revision register in the MC2 chip */
84 #define MVME16x_CONFIG_SPEED_32 0x0001
85 #define MVME16x_CONFIG_NO_VMECHIP2 0x0002
86 #define MVME16x_CONFIG_NO_SCSICHIP 0x0004
87 #define MVME16x_CONFIG_NO_ETHERNET 0x0008
88 #define MVME16x_CONFIG_GOT_FPU 0x0010
90 #define MVME16x_CONFIG_GOT_LP 0x0100
91 #define MVME16x_CONFIG_GOT_CD2401 0x0200
92 #define MVME16x_CONFIG_GOT_SCCA 0x0400
93 #define MVME16x_CONFIG_GOT_SCCB 0x0800
95 #endif