1 # SPDX-License-Identifier: GPL-2.0-only
4 select ARCH_32BIT_OFF_T
6 select ARCH_HAS_BINFMT_FLAT if !MMU
7 select ARCH_HAS_DMA_PREP_COHERENT
8 select ARCH_HAS_GCOV_PROFILE_ALL
9 select ARCH_HAS_SYNC_DMA_FOR_CPU
10 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
11 select ARCH_HAS_UNCACHED_SEGMENT if !MMU
12 select ARCH_MIGHT_HAVE_PC_PARPORT
13 select ARCH_WANT_IPC_PARSE_VERSION
14 select BUILDTIME_TABLE_SORT
16 select CLONE_BACKWARDS3
18 select DMA_DIRECT_REMAP if MMU
19 select GENERIC_ATOMIC64
20 select GENERIC_CLOCKEVENTS
21 select GENERIC_CPU_DEVICES
22 select GENERIC_IDLE_POLL_SETUP
23 select GENERIC_IRQ_PROBE
24 select GENERIC_IRQ_SHOW
25 select GENERIC_PCI_IOMAP
26 select GENERIC_SCHED_CLOCK
29 select HAVE_DEBUG_KMEMLEAK
30 select HAVE_DMA_CONTIGUOUS
31 select HAVE_DYNAMIC_FTRACE
32 select HAVE_FTRACE_MCOUNT_RECORD
33 select HAVE_FUNCTION_GRAPH_TRACER
34 select HAVE_FUNCTION_TRACER
35 select HAVE_MEMBLOCK_NODE_MAP
40 select MODULES_USE_ELF_RELA
42 select OF_EARLY_FLATTREE
43 select PCI_DOMAINS_GENERIC if PCI
44 select PCI_SYSCALL if PCI
45 select TRACING_SUPPORT
47 select CPU_NO_EFFICIENT_FFS
48 select MMU_GATHER_NO_RANGE if MMU
51 # Endianness selection
53 prompt "Endianness selection"
54 default CPU_LITTLE_ENDIAN
56 microblaze architectures can be configured for either little or
57 big endian formats. Be sure to select the appropriate mode.
62 config CPU_LITTLE_ENDIAN
70 config ARCH_HAS_ILOG2_U32
73 config ARCH_HAS_ILOG2_U64
76 config GENERIC_HWEIGHT
79 config GENERIC_CALIBRATE_DELAY
85 config STACKTRACE_SUPPORT
88 config LOCKDEP_SUPPORT
91 source "arch/microblaze/Kconfig.platform"
93 menu "Processor type and features"
95 source "kernel/Kconfig.hz"
101 comment "Boot options"
104 bool "Default bootloader kernel arguments"
107 string "Default kernel command string"
108 depends on CMDLINE_BOOL
109 default "console=ttyUL0,115200"
111 On some architectures there is currently no way for the boot loader
112 to pass arguments to the kernel. For these architectures, you should
113 supply some command-line options at build time by entering them
117 bool "Force default kernel command string"
118 depends on CMDLINE_BOOL
121 Set this to have arguments from the default kernel command string
122 override those passed by the boot loader.
125 bool "Enable seccomp to safely compute untrusted bytecode"
129 This kernel feature is useful for number crunching applications
130 that may need to compute untrusted bytecode during their
131 execution. By using pipes or other transports made available to
132 the process as file descriptors supporting the read/write
133 syscalls, it's possible to isolate those applications in
134 their own address space using seccomp. Once seccomp is
135 enabled via /proc/<pid>/seccomp, it cannot be disabled
136 and the task is only allowed to execute a few safe syscalls
137 defined by each seccomp mode.
139 If unsure, say Y. Only embedded should say N here.
143 menu "Kernel features"
149 config ADVANCED_OPTIONS
150 bool "Prompt for advanced kernel configuration options"
152 This option will enable prompting for a variety of advanced kernel
153 configuration options. These options can cause the kernel to not
154 work if they are set incorrectly, but can be used to optimize certain
155 aspects of kernel memory management.
157 Unless you know what you are doing, say N here.
159 comment "Default settings for advanced configuration options are used"
160 depends on !ADVANCED_OPTIONS
162 config XILINX_UNCACHED_SHADOW
163 bool "Are you using uncached shadow for RAM ?"
164 depends on ADVANCED_OPTIONS && !MMU
167 This is needed to be able to allocate uncachable memory regions.
168 The feature requires the design to define the RAM memory controller
169 window to be twice as large as the actual physical memory.
172 bool "High memory support"
175 The address space of Microblaze processors is only 4 Gigabytes large
176 and it has to accommodate user address space, kernel address
177 space as well as some memory mapped IO. That means that, if you
178 have a large amount of physical memory and/or IO, not all of the
179 memory can be "permanently mapped" by the kernel. The physical
180 memory that is not permanently mapped is called "high memory".
184 config LOWMEM_SIZE_BOOL
185 bool "Set maximum low memory"
186 depends on ADVANCED_OPTIONS && MMU
188 This option allows you to set the maximum amount of memory which
189 will be used as "low memory", that is, memory which the kernel can
190 access directly, without having to set up a kernel virtual mapping.
191 This can be useful in optimizing the layout of kernel virtual
194 Say N here unless you know what you are doing.
197 hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
200 config MANUAL_RESET_VECTOR
201 hex "Microblaze reset vector address setup"
204 Set this option to have the kernel override the CPU Reset vector.
205 If zero, no change will be made to the MicroBlaze reset vector at
207 If non-zero, a jump instruction to this address, will be written
208 to the reset vector at address 0x0.
209 If you are unsure, set it to default value 0x0.
211 config KERNEL_START_BOOL
212 bool "Set custom kernel base address"
213 depends on ADVANCED_OPTIONS
215 This option allows you to set the kernel virtual address at which
216 the kernel will map low memory (the kernel image will be linked at
217 this address). This can be useful in optimizing the virtual memory
218 layout of the system.
220 Say N here unless you know what you are doing.
223 hex "Virtual address of kernel base" if KERNEL_START_BOOL
224 default "0xc0000000" if MMU
225 default KERNEL_BASE_ADDR if !MMU
227 config TASK_SIZE_BOOL
228 bool "Set custom user task size"
229 depends on ADVANCED_OPTIONS && MMU
231 This option allows you to set the amount of virtual address space
232 allocated to user tasks. This can be useful in optimizing the
233 virtual memory layout of the system.
235 Say N here unless you know what you are doing.
238 hex "Size of user task space" if TASK_SIZE_BOOL
243 default MICROBLAZE_4K_PAGES
244 depends on ADVANCED_OPTIONS && !MMU
246 Select the kernel logical page size. Increasing the page size
247 will reduce software overhead at each page boundary, allow
248 hardware prefetch mechanisms to be more effective, and allow
249 larger dma transfers increasing IO efficiency and reducing
250 overhead. However the utilization of memory will increase.
251 For example, each cached file will using a multiple of the
252 page size to hold its contents and the difference between the
253 end of file and the end of page is wasted.
255 If unsure, choose 4K_PAGES.
257 config MICROBLAZE_4K_PAGES
260 config MICROBLAZE_16K_PAGES
263 config MICROBLAZE_64K_PAGES
273 bool "Xilinx PCI host bridge support"