arch/mips/loongson64/irq.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 #include <loongson.h>
   3 #include <irq.h>
   4 #include <linux/interrupt.h>
   5 #include <linux/init.h>
   6
   7 #include <asm/irq_cpu.h>
   8 #include <asm/i8259.h>
   9 #include <asm/mipsregs.h>
  10
  11 #include "smp.h"
  12
  13 extern void loongson3_send_irq_by_ipi(int cpu, int irqs);
  14
  15 unsigned int irq_cpu[16] = {[0 ... 15] = -1};
  16 unsigned int ht_irq[] = {0, 1, 3, 4, 5, 6, 7, 8, 12, 14, 15};
  17 unsigned int local_irq = 1<<0 | 1<<1 | 1<<2 | 1<<7 | 1<<8 | 1<<12;
  18
  19 int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity,
  20                           bool force)
  21 {
  22         unsigned int cpu;
  23         struct cpumask new_affinity;
  24
  25         /* I/O devices are connected on package-0 */
  26         cpumask_copy(&new_affinity, affinity);
  27         for_each_cpu(cpu, affinity)
  28                 if (cpu_data[cpu].package > 0)
  29                         cpumask_clear_cpu(cpu, &new_affinity);
  30
  31         if (cpumask_empty(&new_affinity))
  32                 return -EINVAL;
  33
  34         cpumask_copy(d->common->affinity, &new_affinity);
  35
  36         return IRQ_SET_MASK_OK_NOCOPY;
  37 }
  38
  39 static void ht_irqdispatch(void)
  40 {
  41         unsigned int i, irq;
  42         struct irq_data *irqd;
  43         struct cpumask affinity;
  44
  45         irq = LOONGSON_HT1_INT_VECTOR(0);
  46         LOONGSON_HT1_INT_VECTOR(0) = irq; /* Acknowledge the IRQs */
  47
  48         for (i = 0; i < ARRAY_SIZE(ht_irq); i++) {
  49                 if (!(irq & (0x1 << ht_irq[i])))
  50                         continue;
  51
  52                 /* handled by local core */
  53                 if (local_irq & (0x1 << ht_irq[i])) {
  54                         do_IRQ(ht_irq[i]);
  55                         continue;
  56                 }
  57
  58                 irqd = irq_get_irq_data(ht_irq[i]);
  59                 cpumask_and(&affinity, irqd->common->affinity, cpu_active_mask);
  60                 if (cpumask_empty(&affinity)) {
  61                         do_IRQ(ht_irq[i]);
  62                         continue;
  63                 }
  64
  65                 irq_cpu[ht_irq[i]] = cpumask_next(irq_cpu[ht_irq[i]], &affinity);
  66                 if (irq_cpu[ht_irq[i]] >= nr_cpu_ids)
  67                         irq_cpu[ht_irq[i]] = cpumask_first(&affinity);
  68
  69                 if (irq_cpu[ht_irq[i]] == 0) {
  70                         do_IRQ(ht_irq[i]);
  71                         continue;
  72                 }
  73
  74                 /* balanced by other cores */
  75                 loongson3_send_irq_by_ipi(irq_cpu[ht_irq[i]], (0x1 << ht_irq[i]));
  76         }
  77 }
  78
  79 #define UNUSED_IPS (CAUSEF_IP5 | CAUSEF_IP4 | CAUSEF_IP1 | CAUSEF_IP0)
  80
  81 asmlinkage void plat_irq_dispatch(void)
  82 {
  83         unsigned int pending;
  84
  85         pending = read_c0_cause() & read_c0_status() & ST0_IM;
  86
  87         if (pending & CAUSEF_IP7)
  88                 do_IRQ(LOONGSON_TIMER_IRQ);
  89 #if defined(CONFIG_SMP)
  90         if (pending & CAUSEF_IP6)
  91                 loongson3_ipi_interrupt(NULL);
  92 #endif
  93         if (pending & CAUSEF_IP3)
  94                 ht_irqdispatch();
  95         if (pending & CAUSEF_IP2)
  96                 do_IRQ(LOONGSON_UART_IRQ);
  97         if (pending & UNUSED_IPS) {
  98                 pr_err("%s : spurious interrupt\n", __func__);
  99                 spurious_interrupt();
 100         }
 101 }
 102
 103 static inline void mask_loongson_irq(struct irq_data *d) { }
 104 static inline void unmask_loongson_irq(struct irq_data *d) { }
 105
 106  /* For MIPS IRQs which shared by all cores */
 107 static struct irq_chip loongson_irq_chip = {
 108         .name           = "Loongson",
 109         .irq_ack        = mask_loongson_irq,
 110         .irq_mask       = mask_loongson_irq,
 111         .irq_mask_ack   = mask_loongson_irq,
 112         .irq_unmask     = unmask_loongson_irq,
 113         .irq_eoi        = unmask_loongson_irq,
 114 };
 115
 116 void irq_router_init(void)
 117 {
 118         int i;
 119
 120         /* route LPC int to cpu core0 int 0 */
 121         LOONGSON_INT_ROUTER_LPC =
 122                 LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 0);
 123         /* route HT1 int0 ~ int7 to cpu core0 INT1*/
 124         for (i = 0; i < 8; i++)
 125                 LOONGSON_INT_ROUTER_HT1(i) =
 126                         LOONGSON_INT_COREx_INTy(loongson_sysconf.boot_cpu_id, 1);
 127         /* enable HT1 interrupt */
 128         LOONGSON_HT1_INTN_EN(0) = 0xffffffff;
 129         /* enable router interrupt intenset */
 130         LOONGSON_INT_ROUTER_INTENSET =
 131                 LOONGSON_INT_ROUTER_INTEN | (0xffff << 16) | 0x1 << 10;
 132 }
 133
 134 void __init arch_init_irq(void)
 135 {
 136         struct irq_chip *chip;
 137
 138         clear_c0_status(ST0_IM | ST0_BEV);
 139
 140         irq_router_init();
 141         mips_cpu_irq_init();
 142         init_i8259_irqs();
 143         chip = irq_get_chip(I8259A_IRQ_BASE);
 144         chip->irq_set_affinity = plat_set_irq_affinity;
 145
 146         irq_set_chip_and_handler(LOONGSON_UART_IRQ,
 147                         &loongson_irq_chip, handle_percpu_irq);
 148         irq_set_chip_and_handler(LOONGSON_BRIDGE_IRQ,
 149                         &loongson_irq_chip, handle_percpu_irq);
 150
 151         set_c0_status(STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP6);
 152 }
 153
 154 #ifdef CONFIG_HOTPLUG_CPU
 155
 156 void fixup_irqs(void)
 157 {
 158         irq_cpu_offline();
 159         clear_c0_status(ST0_IM);
 160 }
 161
 162 #endif