arm64: dts: Revert "specify console via command line"
[linux/fpc-iii.git] / arch / mips / rb532 / gpio.c
blob94f02ada4082622d72dac89e2d89463217be6f20
1 /*
2 * Miscellaneous functions for IDT EB434 board
4 * Copyright 2004 IDT Inc. (rischelp@idt.com)
5 * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
6 * Copyright 2007 Florian Fainelli <florian@openwrt.org>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
14 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
16 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
19 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <linux/kernel.h>
30 #include <linux/init.h>
31 #include <linux/types.h>
32 #include <linux/export.h>
33 #include <linux/spinlock.h>
34 #include <linux/platform_device.h>
35 #include <linux/gpio/driver.h>
37 #include <asm/mach-rc32434/rb.h>
38 #include <asm/mach-rc32434/gpio.h>
40 struct rb532_gpio_chip {
41 struct gpio_chip chip;
42 void __iomem *regbase;
45 static struct resource rb532_gpio_reg0_res[] = {
47 .name = "gpio_reg0",
48 .start = REGBASE + GPIOBASE,
49 .end = REGBASE + GPIOBASE + sizeof(struct rb532_gpio_reg) - 1,
50 .flags = IORESOURCE_MEM,
54 /* rb532_set_bit - sanely set a bit
56 * bitval: new value for the bit
57 * offset: bit index in the 4 byte address range
58 * ioaddr: 4 byte aligned address being altered
60 static inline void rb532_set_bit(unsigned bitval,
61 unsigned offset, void __iomem *ioaddr)
63 unsigned long flags;
64 u32 val;
66 local_irq_save(flags);
68 val = readl(ioaddr);
69 val &= ~(!bitval << offset); /* unset bit if bitval == 0 */
70 val |= (!!bitval << offset); /* set bit if bitval == 1 */
71 writel(val, ioaddr);
73 local_irq_restore(flags);
76 /* rb532_get_bit - read a bit
78 * returns the boolean state of the bit, which may be > 1
80 static inline int rb532_get_bit(unsigned offset, void __iomem *ioaddr)
82 return readl(ioaddr) & (1 << offset);
86 * Return GPIO level */
87 static int rb532_gpio_get(struct gpio_chip *chip, unsigned offset)
89 struct rb532_gpio_chip *gpch;
91 gpch = gpiochip_get_data(chip);
92 return !!rb532_get_bit(offset, gpch->regbase + GPIOD);
96 * Set output GPIO level
98 static void rb532_gpio_set(struct gpio_chip *chip,
99 unsigned offset, int value)
101 struct rb532_gpio_chip *gpch;
103 gpch = gpiochip_get_data(chip);
104 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
108 * Set GPIO direction to input
110 static int rb532_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
112 struct rb532_gpio_chip *gpch;
114 gpch = gpiochip_get_data(chip);
116 /* disable alternate function in case it's set */
117 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
119 rb532_set_bit(0, offset, gpch->regbase + GPIOCFG);
120 return 0;
124 * Set GPIO direction to output
126 static int rb532_gpio_direction_output(struct gpio_chip *chip,
127 unsigned offset, int value)
129 struct rb532_gpio_chip *gpch;
131 gpch = gpiochip_get_data(chip);
133 /* disable alternate function in case it's set */
134 rb532_set_bit(0, offset, gpch->regbase + GPIOFUNC);
136 /* set the initial output value */
137 rb532_set_bit(value, offset, gpch->regbase + GPIOD);
139 rb532_set_bit(1, offset, gpch->regbase + GPIOCFG);
140 return 0;
143 static int rb532_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
145 return 8 + 4 * 32 + gpio;
148 static struct rb532_gpio_chip rb532_gpio_chip[] = {
149 [0] = {
150 .chip = {
151 .label = "gpio0",
152 .direction_input = rb532_gpio_direction_input,
153 .direction_output = rb532_gpio_direction_output,
154 .get = rb532_gpio_get,
155 .set = rb532_gpio_set,
156 .to_irq = rb532_gpio_to_irq,
157 .base = 0,
158 .ngpio = 32,
164 * Set GPIO interrupt level
166 void rb532_gpio_set_ilevel(int bit, unsigned gpio)
168 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOILEVEL);
170 EXPORT_SYMBOL(rb532_gpio_set_ilevel);
173 * Set GPIO interrupt status
175 void rb532_gpio_set_istat(int bit, unsigned gpio)
177 rb532_set_bit(bit, gpio, rb532_gpio_chip->regbase + GPIOISTAT);
179 EXPORT_SYMBOL(rb532_gpio_set_istat);
182 * Configure GPIO alternate function
184 void rb532_gpio_set_func(unsigned gpio)
186 rb532_set_bit(1, gpio, rb532_gpio_chip->regbase + GPIOFUNC);
188 EXPORT_SYMBOL(rb532_gpio_set_func);
190 int __init rb532_gpio_init(void)
192 struct resource *r;
194 r = rb532_gpio_reg0_res;
195 rb532_gpio_chip->regbase = ioremap(r->start, resource_size(r));
197 if (!rb532_gpio_chip->regbase) {
198 printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
199 return -ENXIO;
202 /* Register our GPIO chip */
203 gpiochip_add_data(&rb532_gpio_chip->chip, rb532_gpio_chip);
205 return 0;
207 arch_initcall(rb532_gpio_init);