2 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
3 * Copyright (C) 2009 Wind River Systems Inc
4 * Implemented by fredrik.markstrom@gmail.com and ivarholmqvist@gmail.com
6 * Based on DMA code from MIPS.
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
13 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/dma-mapping.h>
18 #include <linux/cache.h>
19 #include <asm/cacheflush.h>
21 void arch_sync_dma_for_device(phys_addr_t paddr
, size_t size
,
22 enum dma_data_direction dir
)
24 void *vaddr
= phys_to_virt(paddr
);
28 invalidate_dcache_range((unsigned long)vaddr
,
29 (unsigned long)(vaddr
+ size
));
33 * We just need to flush the caches here , but Nios2 flush
34 * instruction will do both writeback and invalidate.
36 case DMA_BIDIRECTIONAL
: /* flush and invalidate */
37 flush_dcache_range((unsigned long)vaddr
,
38 (unsigned long)(vaddr
+ size
));
45 void arch_sync_dma_for_cpu(phys_addr_t paddr
, size_t size
,
46 enum dma_data_direction dir
)
48 void *vaddr
= phys_to_virt(paddr
);
51 case DMA_BIDIRECTIONAL
:
53 invalidate_dcache_range((unsigned long)vaddr
,
54 (unsigned long)(vaddr
+ size
));
63 void arch_dma_prep_coherent(struct page
*page
, size_t size
)
65 unsigned long start
= (unsigned long)page_address(page
);
67 flush_dcache_range(start
, start
+ size
);
70 void *uncached_kernel_address(void *ptr
)
72 unsigned long addr
= (unsigned long)ptr
;
74 addr
|= CONFIG_NIOS2_IO_REGION_BASE
;
79 void *cached_kernel_address(void *ptr
)
81 unsigned long addr
= (unsigned long)ptr
;
83 addr
&= ~CONFIG_NIOS2_IO_REGION_BASE
;
84 addr
|= CONFIG_NIOS2_KERNEL_REGION_BASE
;