1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001 Dave Engebretsen, IBM Corporation
4 * Copyright (C) 2003 Anton Blanchard <anton@au.ibm.com>, IBM
6 * RTAS specific routines for PCI.
8 * Based on code from pci.c, chrp_pci.c and pSeries_pci.c
11 #include <linux/kernel.h>
12 #include <linux/threads.h>
13 #include <linux/pci.h>
14 #include <linux/string.h>
15 #include <linux/init.h>
18 #include <asm/pgtable.h>
21 #include <asm/machdep.h>
22 #include <asm/pci-bridge.h>
23 #include <asm/iommu.h>
26 #include <asm/ppc-pci.h>
30 static int read_pci_config
;
31 static int write_pci_config
;
32 static int ibm_read_pci_config
;
33 static int ibm_write_pci_config
;
35 static inline int config_access_valid(struct pci_dn
*dn
, int where
)
39 if (where
< 4096 && dn
->pci_ext_config_space
)
45 int rtas_read_config(struct pci_dn
*pdn
, int where
, int size
, u32
*val
)
48 unsigned long buid
, addr
;
52 return PCIBIOS_DEVICE_NOT_FOUND
;
53 if (!config_access_valid(pdn
, where
))
54 return PCIBIOS_BAD_REGISTER_NUMBER
;
56 if (pdn
->edev
&& pdn
->edev
->pe
&&
57 (pdn
->edev
->pe
->state
& EEH_PE_CFG_BLOCKED
))
58 return PCIBIOS_SET_FAILED
;
61 addr
= rtas_config_addr(pdn
->busno
, pdn
->devfn
, where
);
62 buid
= pdn
->phb
->buid
;
64 ret
= rtas_call(ibm_read_pci_config
, 4, 2, &returnval
,
65 addr
, BUID_HI(buid
), BUID_LO(buid
), size
);
67 ret
= rtas_call(read_pci_config
, 2, 2, &returnval
, addr
, size
);
72 return PCIBIOS_DEVICE_NOT_FOUND
;
74 return PCIBIOS_SUCCESSFUL
;
77 static int rtas_pci_read_config(struct pci_bus
*bus
,
79 int where
, int size
, u32
*val
)
86 pdn
= pci_get_pdn_by_devfn(bus
, devfn
);
88 /* Validity of pdn is checked in here */
89 ret
= rtas_read_config(pdn
, where
, size
, val
);
90 if (*val
== EEH_IO_ERROR_VALUE(size
) &&
91 eeh_dev_check_failure(pdn_to_eeh_dev(pdn
)))
92 return PCIBIOS_DEVICE_NOT_FOUND
;
97 int rtas_write_config(struct pci_dn
*pdn
, int where
, int size
, u32 val
)
99 unsigned long buid
, addr
;
103 return PCIBIOS_DEVICE_NOT_FOUND
;
104 if (!config_access_valid(pdn
, where
))
105 return PCIBIOS_BAD_REGISTER_NUMBER
;
107 if (pdn
->edev
&& pdn
->edev
->pe
&&
108 (pdn
->edev
->pe
->state
& EEH_PE_CFG_BLOCKED
))
109 return PCIBIOS_SET_FAILED
;
112 addr
= rtas_config_addr(pdn
->busno
, pdn
->devfn
, where
);
113 buid
= pdn
->phb
->buid
;
115 ret
= rtas_call(ibm_write_pci_config
, 5, 1, NULL
, addr
,
116 BUID_HI(buid
), BUID_LO(buid
), size
, (ulong
) val
);
118 ret
= rtas_call(write_pci_config
, 3, 1, NULL
, addr
, size
, (ulong
)val
);
122 return PCIBIOS_DEVICE_NOT_FOUND
;
124 return PCIBIOS_SUCCESSFUL
;
127 static int rtas_pci_write_config(struct pci_bus
*bus
,
129 int where
, int size
, u32 val
)
133 pdn
= pci_get_pdn_by_devfn(bus
, devfn
);
135 /* Validity of pdn is checked in here. */
136 return rtas_write_config(pdn
, where
, size
, val
);
139 static struct pci_ops rtas_pci_ops
= {
140 .read
= rtas_pci_read_config
,
141 .write
= rtas_pci_write_config
,
144 static int is_python(struct device_node
*dev
)
146 const char *model
= of_get_property(dev
, "model", NULL
);
148 if (model
&& strstr(model
, "Python"))
154 static void python_countermeasures(struct device_node
*dev
)
156 struct resource registers
;
157 void __iomem
*chip_regs
;
160 if (of_address_to_resource(dev
, 0, ®isters
)) {
161 printk(KERN_ERR
"Can't get address for Python workarounds !\n");
165 /* Python's register file is 1 MB in size. */
166 chip_regs
= ioremap(registers
.start
& ~(0xfffffUL
), 0x100000);
169 * Firmware doesn't always clear this bit which is critical
170 * for good performance - Anton
173 #define PRG_CL_RESET_VALID 0x00010000
175 val
= in_be32(chip_regs
+ 0xf6030);
176 if (val
& PRG_CL_RESET_VALID
) {
177 printk(KERN_INFO
"Python workaround: ");
178 val
&= ~PRG_CL_RESET_VALID
;
179 out_be32(chip_regs
+ 0xf6030, val
);
181 * We must read it back for changes to
184 val
= in_be32(chip_regs
+ 0xf6030);
185 printk("reg0: %x\n", val
);
191 void __init
init_pci_config_tokens(void)
193 read_pci_config
= rtas_token("read-pci-config");
194 write_pci_config
= rtas_token("write-pci-config");
195 ibm_read_pci_config
= rtas_token("ibm,read-pci-config");
196 ibm_write_pci_config
= rtas_token("ibm,write-pci-config");
199 unsigned long get_phb_buid(struct device_node
*phb
)
203 if (ibm_read_pci_config
== -1)
205 if (of_address_to_resource(phb
, 0, &r
))
210 static int phb_set_bus_ranges(struct device_node
*dev
,
211 struct pci_controller
*phb
)
213 const __be32
*bus_range
;
216 bus_range
= of_get_property(dev
, "bus-range", &len
);
217 if (bus_range
== NULL
|| len
< 2 * sizeof(int)) {
221 phb
->first_busno
= be32_to_cpu(bus_range
[0]);
222 phb
->last_busno
= be32_to_cpu(bus_range
[1]);
227 int rtas_setup_phb(struct pci_controller
*phb
)
229 struct device_node
*dev
= phb
->dn
;
232 python_countermeasures(dev
);
234 if (phb_set_bus_ranges(dev
, phb
))
237 phb
->ops
= &rtas_pci_ops
;
238 phb
->buid
= get_phb_buid(dev
);