1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
4 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
5 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
7 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
11 #include <linux/linkage.h>
12 #include <linux/errno.h>
17 #include <asm/contregs.h>
18 #include <asm/ptrace.h>
19 #include <asm/asm-offsets.h>
21 #include <asm/vaddrs.h>
23 #include <asm/pgtable.h>
24 #include <asm/winmacro.h>
25 #include <asm/signal.h>
28 #include <asm/thread_info.h>
29 #include <asm/param.h>
30 #include <asm/unistd.h>
32 #include <asm/asmmacro.h>
33 #include <asm/export.h>
37 /* These are just handy. */
38 #define _SV save %sp, -STACKFRAME_SZ, %sp
41 #define FLUSH_ALL_KERNEL_WINDOWS \
42 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
43 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
49 .globl arch_kgdb_breakpoint
50 .type arch_kgdb_breakpoint,#function
55 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
58 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
63 * This code cannot touch registers %l0 %l1 and %l2
64 * because SAVE_ALL depends on their values. It depends
65 * on %l3 also, but we regenerate it before a call.
66 * Other registers are:
67 * %l3 -- base address of fdc registers
69 * %l5 -- scratch for ld/st address
71 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
74 /* Do we have work to do? */
75 sethi %hi(doing_pdma), %l7
76 ld [%l7 + %lo(doing_pdma)], %l7
81 /* Load fdc register base */
82 sethi %hi(fdc_status), %l3
83 ld [%l3 + %lo(fdc_status)], %l3
85 /* Setup register addresses */
86 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
87 ld [%l5 + %lo(pdma_vaddr)], %l4
88 sethi %hi(pdma_size), %l5 ! bytes to go
89 ld [%l5 + %lo(pdma_size)], %l6
93 andcc %l7, 0x80, %g0 ! Does fifo still have data
94 bz floppy_fifo_emptied ! fifo has been emptied...
95 andcc %l7, 0x20, %g0 ! in non-dma mode still?
96 bz floppy_overrun ! nope, overrun
97 andcc %l7, 0x40, %g0 ! 0=write 1=read
101 /* Ok, actually read this byte */
112 /* Ok, actually write this byte */
119 /* fall through... */
121 sethi %hi(pdma_vaddr), %l5
122 st %l4, [%l5 + %lo(pdma_vaddr)]
123 sethi %hi(pdma_size), %l5
124 st %l6, [%l5 + %lo(pdma_size)]
125 /* Flip terminal count pin */
126 set auxio_register, %l7
136 /* Kill some time so the bits set */
142 /* Prevent recursion */
143 sethi %hi(doing_pdma), %l7
145 st %g0, [%l7 + %lo(doing_pdma)]
147 /* We emptied the FIFO, but we haven't read everything
148 * as of yet. Store the current transfer address and
149 * bytes left to read so we can continue when the next
153 sethi %hi(pdma_vaddr), %l5
154 st %l4, [%l5 + %lo(pdma_vaddr)]
155 sethi %hi(pdma_size), %l7
156 st %l6, [%l7 + %lo(pdma_size)]
158 /* Restore condition codes */
166 sethi %hi(pdma_vaddr), %l5
167 st %l4, [%l5 + %lo(pdma_vaddr)]
168 sethi %hi(pdma_size), %l5
169 st %l6, [%l5 + %lo(pdma_size)]
170 /* Prevent recursion */
171 sethi %hi(doing_pdma), %l7
172 st %g0, [%l7 + %lo(doing_pdma)]
174 /* fall through... */
179 /* Set all IRQs off. */
186 mov 11, %o0 ! floppy irq level (unused anyway)
187 mov %g0, %o1 ! devid is not used in fast interrupts
188 call sparc_floppy_irq
189 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
193 #endif /* (CONFIG_BLK_DEV_FD) */
195 /* Bad trap handler */
196 .globl bad_trap_handler
203 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
205 mov %l7, %o1 ! trap number
209 /* For now all IRQ's not registered get sent here. handler_irq() will
210 * see if a routine is registered to handle this interrupt and if not
211 * it will say so on the console.
215 .globl real_irq_entry, patch_handler_irq
220 .globl patchme_maybe_smp_msg
223 patchme_maybe_smp_msg:
234 mov %l7, %o0 ! irq level
237 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
238 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
239 wr %g2, PSR_ET, %psr ! keep ET up
245 /* SMP per-cpu ticker interrupts are handled specially. */
247 bne real_irq_continue+4
253 call smp4m_percpu_timer_interrupt
254 add %sp, STACKFRAME_SZ, %o0
259 #define GET_PROCESSOR4M_ID(reg) \
261 srl %reg, 12, %reg; \
264 /* Here is where we check for possible SMP IPI passed to us
265 * on some level other than 15 which is the NMI and only used
266 * for cross calls. That has a separate entry point below.
268 * IPIs are sent on Level 12, 13 and 14. See IRQ_IPI_*.
271 GET_PROCESSOR4M_ID(o3)
272 sethi %hi(sun4m_irq_percpu), %l5
274 or %l5, %lo(sun4m_irq_percpu), %o5
275 sethi %hi(0x70000000), %o2 ! Check all soft-IRQs
277 ld [%o1 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
282 st %o2, [%o1 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x70000000
284 ld [%o1 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
291 srl %o3, 28, %o2 ! shift for simpler checks below
292 maybe_smp4m_msg_check_single:
294 beq,a maybe_smp4m_msg_check_mask
296 call smp_call_function_single_interrupt
299 maybe_smp4m_msg_check_mask:
300 beq,a maybe_smp4m_msg_check_resched
302 call smp_call_function_interrupt
305 maybe_smp4m_msg_check_resched:
306 /* rescheduling is done in RESTORE_ALL regardless, but incr stats */
307 beq,a maybe_smp4m_msg_out
309 call smp_resched_interrupt
315 .globl linux_trap_ipi15_sun4m
316 linux_trap_ipi15_sun4m:
318 sethi %hi(0x80000000), %o2
319 GET_PROCESSOR4M_ID(o0)
320 sethi %hi(sun4m_irq_percpu), %l5
321 or %l5, %lo(sun4m_irq_percpu), %o5
324 ld [%o5 + 0x00], %o3 ! sun4m_irq_percpu[cpu]->pending
326 be sun4m_nmi_error ! Must be an NMI async memory error
327 st %o2, [%o5 + 0x04] ! sun4m_irq_percpu[cpu]->clear=0x80000000
329 ld [%o5 + 0x00], %g0 ! sun4m_irq_percpu[cpu]->pending
336 call smp4m_cross_call_irq
338 b ret_trap_lockless_ipi
342 /* SMP per-cpu ticker interrupts are handled specially. */
346 sethi %hi(CC_ICLR), %o0
347 sethi %hi(1 << 14), %o1
348 or %o0, %lo(CC_ICLR), %o0
349 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
354 call smp4d_percpu_timer_interrupt
355 add %sp, STACKFRAME_SZ, %o0
361 .globl linux_trap_ipi15_sun4d
362 linux_trap_ipi15_sun4d:
364 sethi %hi(CC_BASE), %o4
365 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
366 or %o4, (CC_EREG - CC_BASE), %o0
367 ldda [%o0] ASI_M_MXCC, %o0
370 sethi %hi(BB_STAT2), %o2
371 lduba [%o2] ASI_M_CTL, %o2
372 andcc %o2, BB_STAT2_MASK, %g0
374 or %o4, (CC_ICLR - CC_BASE), %o0
375 sethi %hi(1 << 15), %o1
376 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
382 call smp4d_cross_call_irq
384 b ret_trap_lockless_ipi
391 lduha [%l4] ASI_M_MXCC, %l5
392 sethi %hi(1 << 15), %l7
394 stha %l5, [%l4] ASI_M_MXCC
399 .extern leon_ipi_interrupt
400 /* SMP per-cpu IPI interrupts are handled specially. */
408 call leonsmp_ipi_interrupt
409 add %sp, STACKFRAME_SZ, %o1 ! pt_regs
415 .globl linux_trap_ipi15_leon
416 linux_trap_ipi15_leon:
423 call leon_cross_call_irq
425 b ret_trap_lockless_ipi
428 #endif /* CONFIG_SMP */
430 /* This routine handles illegal instructions and privileged
431 * instruction attempts from user code.
434 .globl bad_instruction
436 sethi %hi(0xc1f80000), %l4
438 sethi %hi(0x81d80000), %l7
444 wr %l0, PSR_ET, %psr ! re-enable traps
447 add %sp, STACKFRAME_SZ, %o0
450 call do_illegal_instruction
455 1: /* unimplemented flush - just skip */
460 .globl priv_instruction
467 add %sp, STACKFRAME_SZ, %o0
470 call do_priv_instruction
475 /* This routine handles unaligned data accesses. */
479 andcc %l0, PSR_PS, %g0
489 call kernel_unaligned_trap
490 add %sp, STACKFRAME_SZ, %o0
497 wr %l0, PSR_ET, %psr ! re-enable traps
501 call user_unaligned_trap
502 add %sp, STACKFRAME_SZ, %o0
506 /* This routine handles floating point disabled traps. */
508 .globl fpd_trap_handler
512 wr %l0, PSR_ET, %psr ! re-enable traps
515 add %sp, STACKFRAME_SZ, %o0
523 /* This routine handles Floating Point Exceptions. */
525 .globl fpe_trap_handler
527 set fpsave_magic, %l5
530 sethi %hi(fpsave), %l5
531 or %l5, %lo(fpsave), %l5
534 sethi %hi(fpsave_catch2), %l5
535 or %l5, %lo(fpsave_catch2), %l5
541 sethi %hi(fpsave_catch), %l5
542 or %l5, %lo(fpsave_catch), %l5
551 wr %l0, PSR_ET, %psr ! re-enable traps
554 add %sp, STACKFRAME_SZ, %o0
562 /* This routine handles Tag Overflow Exceptions. */
564 .globl do_tag_overflow
568 wr %l0, PSR_ET, %psr ! re-enable traps
571 add %sp, STACKFRAME_SZ, %o0
574 call handle_tag_overflow
579 /* This routine handles Watchpoint Exceptions. */
585 wr %l0, PSR_ET, %psr ! re-enable traps
588 add %sp, STACKFRAME_SZ, %o0
591 call handle_watchpoint
596 /* This routine handles Register Access Exceptions. */
602 wr %l0, PSR_ET, %psr ! re-enable traps
605 add %sp, STACKFRAME_SZ, %o0
608 call handle_reg_access
613 /* This routine handles Co-Processor Disabled Exceptions. */
615 .globl do_cp_disabled
619 wr %l0, PSR_ET, %psr ! re-enable traps
622 add %sp, STACKFRAME_SZ, %o0
625 call handle_cp_disabled
630 /* This routine handles Co-Processor Exceptions. */
632 .globl do_cp_exception
636 wr %l0, PSR_ET, %psr ! re-enable traps
639 add %sp, STACKFRAME_SZ, %o0
642 call handle_cp_exception
647 /* This routine handles Hardware Divide By Zero Exceptions. */
653 wr %l0, PSR_ET, %psr ! re-enable traps
656 add %sp, STACKFRAME_SZ, %o0
659 call handle_hw_divzero
665 .globl do_flush_windows
672 andcc %l0, PSR_PS, %g0
676 call flush_user_windows
679 /* Advance over the trap instruction. */
680 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
682 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
683 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
687 .globl flush_patch_one
689 /* We get these for debugging routines using __builtin_return_address() */
692 FLUSH_ALL_KERNEL_WINDOWS
694 /* Advance over the trap instruction. */
695 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
697 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
698 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
702 /* The getcc software trap. The user wants the condition codes from
703 * the %psr in register %g1.
707 .globl getcc_trap_handler
709 srl %l0, 20, %g1 ! give user
710 and %g1, 0xf, %g1 ! only ICC bits in %psr
711 jmp %l2 ! advance over trap instruction
712 rett %l2 + 0x4 ! like this...
714 /* The setcc software trap. The user has condition codes in %g1
715 * that it would like placed in the %psr. Be careful not to flip
716 * any unintentional bits!
720 .globl setcc_trap_handler
724 andn %l0, %l5, %l0 ! clear ICC bits in %psr
725 and %l4, %l5, %l4 ! clear non-ICC bits in user value
726 or %l4, %l0, %l4 ! or them in... mix mix mix
728 wr %l4, 0x0, %psr ! set new %psr
729 WRITE_PAUSE ! TI scumbags...
731 jmp %l2 ! advance over trap instruction
732 rett %l2 + 0x4 ! like this...
735 /* NMI async memory error handling. */
736 sethi %hi(0x80000000), %l4
737 sethi %hi(sun4m_irq_global), %o5
738 ld [%o5 + %lo(sun4m_irq_global)], %l5
739 st %l4, [%l5 + 0x0c] ! sun4m_irq_global->mask_set=0x80000000
741 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
750 st %l4, [%l5 + 0x08] ! sun4m_irq_global->mask_clear=0x80000000
752 ld [%l5 + 0x00], %g0 ! sun4m_irq_global->pending
758 .globl linux_trap_ipi15_sun4m
759 linux_trap_ipi15_sun4m:
764 #endif /* CONFIG_SMP */
772 LEON_PI(lda [%l5] ASI_LEON_MMUREGS, %l6) ! read sfar first
773 SUN_PI_(lda [%l5] ASI_M_MMUREGS, %l6) ! read sfar first
775 LEON_PI(lda [%l4] ASI_LEON_MMUREGS, %l5) ! read sfsr last
776 SUN_PI_(lda [%l4] ASI_M_MMUREGS, %l5) ! read sfsr last
779 srl %l5, 6, %l5 ! and encode all info into l7
784 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
790 and %o1, 1, %o1 ! arg2 = text_faultp
792 and %o2, 2, %o2 ! arg3 = writep
793 andn %o3, 0xfff, %o3 ! arg4 = faulting address
799 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
821 add %sp, STACKFRAME_SZ, %o0
823 ld [%curptr + TI_FLAGS], %l5
824 andcc %l5, _TIF_SYSCALL_TRACE, %g0
832 /* We don't want to muck with user registers like a
833 * normal syscall, just return.
838 .globl sys_rt_sigreturn
841 add %sp, STACKFRAME_SZ, %o0
843 ld [%curptr + TI_FLAGS], %l5
844 andcc %l5, _TIF_SYSCALL_TRACE, %g0
848 add %sp, STACKFRAME_SZ, %o0
853 /* We are returning to a signal handler. */
856 /* Now that we have a real sys_clone, sys_fork() is
857 * implemented in terms of it. Our _real_ implementation
858 * of SunOS vfork() will use sys_vfork().
860 * XXX These three should be consolidated into mostly shared
861 * XXX code just like on sparc64... -DaveM
864 .globl sys_fork, flush_patch_two
868 FLUSH_ALL_KERNEL_WINDOWS;
869 ld [%curptr + TI_TASK], %o4
872 mov SIGCHLD, %o0 ! arg0: clone flags
875 mov %fp, %o1 ! arg1: usp
876 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
877 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
882 /* Whee, kernel threads! */
883 .globl sys_clone, flush_patch_three
887 FLUSH_ALL_KERNEL_WINDOWS;
888 ld [%curptr + TI_TASK], %o4
892 /* arg0,1: flags,usp -- loaded already */
893 cmp %o1, 0x0 ! Is new_usp NULL?
897 mov %fp, %o1 ! yes, use callers usp
898 andn %o1, 7, %o1 ! no, align to 8 bytes
900 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
901 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
906 /* Whee, real vfork! */
907 .globl sys_vfork, flush_patch_four
910 FLUSH_ALL_KERNEL_WINDOWS;
911 ld [%curptr + TI_TASK], %o4
916 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
917 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
919 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
920 sethi %hi(sparc_do_fork), %l1
922 jmpl %l1 + %lo(sparc_do_fork), %g0
923 add %sp, STACKFRAME_SZ, %o2
926 linux_sparc_ni_syscall:
927 sethi %hi(sys_ni_syscall), %l7
929 or %l7, %lo(sys_ni_syscall), %l7
932 add %sp, STACKFRAME_SZ, %o0
939 /* Syscall tracing can modify the registers. */
940 ld [%sp + STACKFRAME_SZ + PT_G1], %g1
941 sethi %hi(sys_call_table), %l7
942 ld [%sp + STACKFRAME_SZ + PT_I0], %i0
943 or %l7, %lo(sys_call_table), %l7
944 ld [%sp + STACKFRAME_SZ + PT_I1], %i1
945 ld [%sp + STACKFRAME_SZ + PT_I2], %i2
946 ld [%sp + STACKFRAME_SZ + PT_I3], %i3
947 ld [%sp + STACKFRAME_SZ + PT_I4], %i4
948 ld [%sp + STACKFRAME_SZ + PT_I5], %i5
965 ld [%g3 + TI_TASK], %o0
967 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
969 .globl ret_from_kernel_thread
970 ret_from_kernel_thread:
972 ld [%g3 + TI_TASK], %o0
973 ld [%sp + STACKFRAME_SZ + PT_G1], %l0
975 ld [%sp + STACKFRAME_SZ + PT_G2], %o0
977 ld [%sp + STACKFRAME_SZ + PT_PSR], %l0
978 andn %l0, PSR_CWP, %l0
980 and %l1, PSR_CWP, %l1
982 st %l0, [%sp + STACKFRAME_SZ + PT_PSR]
986 /* Linux native system calls enter here... */
988 .globl linux_sparc_syscall
990 sethi %hi(PSR_SYSCALL), %l4
992 /* Direct access to user regs, must faster. */
994 bgeu linux_sparc_ni_syscall
1002 wr %l0, PSR_ET, %psr
1007 ld [%curptr + TI_FLAGS], %l5
1009 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1011 bne linux_syscall_trace
1018 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1021 ld [%curptr + TI_FLAGS], %l6
1022 cmp %o0, -ERESTART_RESTARTBLOCK
1023 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1026 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1028 /* System call success, clear Carry condition code. */
1031 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1032 bne linux_syscall_trace2
1033 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1034 add %l1, 0x4, %l2 /* npc = npc+4 */
1035 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1037 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1039 /* System call failure, set Carry condition code.
1040 * Also, get abs(errno) to return to the process.
1044 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1046 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1047 bne linux_syscall_trace2
1048 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1049 add %l1, 0x4, %l2 /* npc = npc+4 */
1050 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1052 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1054 linux_syscall_trace2:
1055 add %sp, STACKFRAME_SZ, %o0
1058 add %l1, 0x4, %l2 /* npc = npc+4 */
1059 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1061 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1064 /* Saving and restoring the FPU state is best done from lowlevel code.
1066 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1067 * void *fpqueue, unsigned long *fpqdepth)
1072 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1079 /* We have an fpqueue to save. */
1093 std %f0, [%o0 + 0x00]
1094 std %f2, [%o0 + 0x08]
1095 std %f4, [%o0 + 0x10]
1096 std %f6, [%o0 + 0x18]
1097 std %f8, [%o0 + 0x20]
1098 std %f10, [%o0 + 0x28]
1099 std %f12, [%o0 + 0x30]
1100 std %f14, [%o0 + 0x38]
1101 std %f16, [%o0 + 0x40]
1102 std %f18, [%o0 + 0x48]
1103 std %f20, [%o0 + 0x50]
1104 std %f22, [%o0 + 0x58]
1105 std %f24, [%o0 + 0x60]
1106 std %f26, [%o0 + 0x68]
1107 std %f28, [%o0 + 0x70]
1109 std %f30, [%o0 + 0x78]
1111 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1112 * code for pointing out this possible deadlock, while we save state
1113 * above we could trap on the fsr store so our low level fpu trap
1114 * code has to know how to deal with this.
1124 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1128 ldd [%o0 + 0x00], %f0
1129 ldd [%o0 + 0x08], %f2
1130 ldd [%o0 + 0x10], %f4
1131 ldd [%o0 + 0x18], %f6
1132 ldd [%o0 + 0x20], %f8
1133 ldd [%o0 + 0x28], %f10
1134 ldd [%o0 + 0x30], %f12
1135 ldd [%o0 + 0x38], %f14
1136 ldd [%o0 + 0x40], %f16
1137 ldd [%o0 + 0x48], %f18
1138 ldd [%o0 + 0x50], %f20
1139 ldd [%o0 + 0x58], %f22
1140 ldd [%o0 + 0x60], %f24
1141 ldd [%o0 + 0x68], %f26
1142 ldd [%o0 + 0x70], %f28
1143 ldd [%o0 + 0x78], %f30
1148 /* __ndelay and __udelay take two arguments:
1149 * 0 - nsecs or usecs to delay
1150 * 1 - per_cpu udelay_val (loops per jiffy)
1152 * Note that ndelay gives HZ times higher resolution but has a 10ms
1153 * limit. udelay can handle up to 1s.
1157 save %sp, -STACKFRAME_SZ, %sp
1158 mov %i0, %o0 ! round multiplier up so large ns ok
1159 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1162 mov %i1, %o1 ! udelay_val
1166 mov %o1, %o0 ! >>32 later for better resolution
1170 save %sp, -STACKFRAME_SZ, %sp
1172 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1173 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1176 mov %i1, %o1 ! udelay_val
1179 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1180 or %g0, %lo(0x028f4b62), %l0
1181 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1185 mov HZ, %o0 ! >>32 earlier for wider range
1197 EXPORT_SYMBOL(__udelay)
1198 EXPORT_SYMBOL(__ndelay)
1200 /* Handle a software breakpoint */
1201 /* We have to inform parent that child has stopped */
1203 .globl breakpoint_trap
1207 wr %l0, PSR_ET, %psr
1210 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1211 call sparc_breakpoint
1212 add %sp, STACKFRAME_SZ, %o0
1217 ENTRY(kgdb_trap_low)
1220 wr %l0, PSR_ET, %psr
1223 mov %l7, %o0 ! trap_level
1225 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1228 ENDPROC(kgdb_trap_low)
1232 .globl flush_patch_exception
1233 flush_patch_exception:
1234 FLUSH_ALL_KERNEL_WINDOWS;
1236 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1237 mov 1, %g1 ! signal EFAULT condition
1240 .globl kill_user_windows, kuw_patch1_7win
1242 kuw_patch1_7win: sll %o3, 6, %o3
1244 /* No matter how much overhead this routine has in the worst
1245 * case scenario, it is several times better than taking the
1246 * traps with the old method of just doing flush_user_windows().
1249 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1250 orcc %g0, %o0, %g0 ! if no bits set, we are done
1251 be 3f ! nothing to do
1252 rd %psr, %o5 ! must clear interrupts
1253 or %o5, PSR_PIL, %o4 ! or else that could change
1254 wr %o4, 0x0, %psr ! the uwinmask state
1255 WRITE_PAUSE ! burn them cycles
1257 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1258 orcc %g0, %o0, %g0 ! did an interrupt come in?
1259 be 4f ! yep, we are done
1260 rd %wim, %o3 ! get current wim
1261 srl %o3, 1, %o4 ! simulate a save
1263 sll %o3, 7, %o3 ! compute next wim
1264 or %o4, %o3, %o3 ! result
1265 andncc %o0, %o3, %o0 ! clean this bit in umask
1266 bne kuw_patch1 ! not done yet
1267 srl %o3, 1, %o4 ! begin another save simulation
1268 wr %o3, 0x0, %wim ! set the new wim
1269 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
1271 wr %o5, 0x0, %psr ! re-enable interrupts
1272 WRITE_PAUSE ! burn baby burn
1275 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1278 .globl restore_current
1280 LOAD_CURRENT(g6, o0)
1284 #ifdef CONFIG_PCIC_PCI
1285 #include <asm/pcic.h>
1288 .globl linux_trap_ipi15_pcic
1289 linux_trap_ipi15_pcic:
1294 * First deactivate NMI
1295 * or we cannot drop ET, cannot get window spill traps.
1296 * The busy loop is necessary because the PIO error
1297 * sometimes does not go away quickly and we trap again.
1299 sethi %hi(pcic_regs), %o1
1300 ld [%o1 + %lo(pcic_regs)], %o2
1302 ! Get pending status for printouts later.
1303 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1305 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1306 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
1308 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1309 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1313 or %l0, PSR_PIL, %l4
1316 wr %l4, PSR_ET, %psr
1320 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1323 .globl pcic_nmi_trap_patch
1324 pcic_nmi_trap_patch:
1325 sethi %hi(linux_trap_ipi15_pcic), %l3
1326 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1330 #endif /* CONFIG_PCIC_PCI */
1334 save %sp, -0x40, %sp
1335 save %sp, -0x40, %sp
1336 save %sp, -0x40, %sp
1337 save %sp, -0x40, %sp
1338 save %sp, -0x40, %sp
1339 save %sp, -0x40, %sp
1340 save %sp, -0x40, %sp
1351 ENTRY(hard_smp_processor_id)
1355 .section .cpuid_patch, "ax"
1356 /* Instruction location. */
1358 /* SUN4D implementation. */
1359 lda [%g0] ASI_M_VIKING_TMP1, %o0
1362 /* LEON implementation. */
1369 ENDPROC(hard_smp_processor_id)
1372 /* End of entry.S */