1 // SPDX-License-Identifier: GPL-2.0
3 * Interrupt request handling routines. On the
4 * Sparc the IRQs are basically 'cast in stone'
5 * and you are supposed to probe the prom's device
6 * node trees to find out who's got which IRQ.
8 * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
9 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
10 * Copyright (C) 1995,2002 Pete A. Zaitcev (zaitcev@yahoo.com)
11 * Copyright (C) 1996 Dave Redman (djhr@tadpole.co.uk)
12 * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org)
15 #include <linux/kernel_stat.h>
16 #include <linux/seq_file.h>
17 #include <linux/export.h>
19 #include <asm/cacheflush.h>
20 #include <asm/cpudata.h>
21 #include <asm/setup.h>
28 /* platform specific irq setup */
29 struct sparc_config sparc_config
;
31 unsigned long arch_local_irq_save(void)
41 : "=&r" (retval
), "=r" (tmp
)
47 EXPORT_SYMBOL(arch_local_irq_save
);
49 void arch_local_irq_enable(void)
62 EXPORT_SYMBOL(arch_local_irq_enable
);
64 void arch_local_irq_restore(unsigned long old_psr
)
72 "wr %0, %2, %%psr\n\t"
75 : "i" (PSR_PIL
), "r" (old_psr
)
78 EXPORT_SYMBOL(arch_local_irq_restore
);
81 * Dave Redman (djhr@tadpole.co.uk)
83 * IRQ numbers.. These are no longer restricted to 15..
85 * this is done to enable SBUS cards and onboard IO to be masked
86 * correctly. using the interrupt level isn't good enough.
89 * A device interrupting at sbus level6 and the Floppy both come in
90 * at IRQ11, but enabling and disabling them requires writing to
91 * different bits in the SLAVIO/SEC.
93 * As a result of these changes sun4m machines could now support
94 * directed CPU interrupts using the existing enable/disable irq code
97 * Sun4d complicates things even further. IRQ numbers are arbitrary
98 * 32-bit values in that case. Since this is similar to sparc64,
99 * we adopt a virtual IRQ numbering scheme as is done there.
100 * Virutal interrupt numbers are allocated by build_irq(). So NR_IRQS
101 * just becomes a limit of how many interrupt sources we can handle in
102 * a single system. Even fully loaded SS2000 machines top off at
103 * about 32 interrupt sources or so, therefore a NR_IRQS value of 64
104 * is more than enough.
106 * We keep a map of per-PIL enable interrupts. These get wired
107 * up via the irq_chip->startup() method which gets invoked by
108 * the generic IRQ layer during request_irq().
112 /* Table of allocated irqs. Unused entries has irq == 0 */
113 static struct irq_bucket irq_table
[NR_IRQS
];
114 /* Protect access to irq_table */
115 static DEFINE_SPINLOCK(irq_table_lock
);
117 /* Map between the irq identifier used in hw to the irq_bucket. */
118 struct irq_bucket
*irq_map
[SUN4D_MAX_IRQ
];
119 /* Protect access to irq_map */
120 static DEFINE_SPINLOCK(irq_map_lock
);
122 /* Allocate a new irq from the irq_table */
123 unsigned int irq_alloc(unsigned int real_irq
, unsigned int pil
)
128 spin_lock_irqsave(&irq_table_lock
, flags
);
129 for (i
= 1; i
< NR_IRQS
; i
++) {
130 if (irq_table
[i
].real_irq
== real_irq
&& irq_table
[i
].pil
== pil
)
134 for (i
= 1; i
< NR_IRQS
; i
++) {
135 if (!irq_table
[i
].irq
)
140 irq_table
[i
].real_irq
= real_irq
;
141 irq_table
[i
].irq
= i
;
142 irq_table
[i
].pil
= pil
;
144 printk(KERN_ERR
"IRQ: Out of virtual IRQs.\n");
148 spin_unlock_irqrestore(&irq_table_lock
, flags
);
153 /* Based on a single pil handler_irq may need to call several
154 * interrupt handlers. Use irq_map as entry to irq_table,
155 * and let each entry in irq_table point to the next entry.
157 void irq_link(unsigned int irq
)
159 struct irq_bucket
*p
;
163 BUG_ON(irq
>= NR_IRQS
);
165 spin_lock_irqsave(&irq_map_lock
, flags
);
169 BUG_ON(pil
>= SUN4D_MAX_IRQ
);
170 p
->next
= irq_map
[pil
];
173 spin_unlock_irqrestore(&irq_map_lock
, flags
);
176 void irq_unlink(unsigned int irq
)
178 struct irq_bucket
*p
, **pnext
;
181 BUG_ON(irq
>= NR_IRQS
);
183 spin_lock_irqsave(&irq_map_lock
, flags
);
186 BUG_ON(p
->pil
>= SUN4D_MAX_IRQ
);
187 pnext
= &irq_map
[p
->pil
];
189 pnext
= &(*pnext
)->next
;
192 spin_unlock_irqrestore(&irq_map_lock
, flags
);
196 /* /proc/interrupts printing */
197 int arch_show_interrupts(struct seq_file
*p
, int prec
)
202 seq_printf(p
, "RES: ");
203 for_each_online_cpu(j
)
204 seq_printf(p
, "%10u ", cpu_data(j
).irq_resched_count
);
205 seq_printf(p
, " IPI rescheduling interrupts\n");
206 seq_printf(p
, "CAL: ");
207 for_each_online_cpu(j
)
208 seq_printf(p
, "%10u ", cpu_data(j
).irq_call_count
);
209 seq_printf(p
, " IPI function call interrupts\n");
211 seq_printf(p
, "NMI: ");
212 for_each_online_cpu(j
)
213 seq_printf(p
, "%10u ", cpu_data(j
).counter
);
214 seq_printf(p
, " Non-maskable interrupts\n");
218 void handler_irq(unsigned int pil
, struct pt_regs
*regs
)
220 struct pt_regs
*old_regs
;
221 struct irq_bucket
*p
;
224 old_regs
= set_irq_regs(regs
);
229 struct irq_bucket
*next
= p
->next
;
231 generic_handle_irq(p
->irq
);
235 set_irq_regs(old_regs
);
238 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
239 static unsigned int floppy_irq
;
241 int sparc_floppy_request_irq(unsigned int irq
, irq_handler_t irq_handler
)
243 unsigned int cpu_irq
;
247 err
= request_irq(irq
, irq_handler
, 0, "floppy", NULL
);
251 /* Save for later use in floppy interrupt handler */
254 cpu_irq
= (irq
& (NR_IRQS
- 1));
256 /* Dork with trap table if we get this far. */
257 #define INSTANTIATE(table) \
258 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_one = SPARC_RD_PSR_L0; \
259 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two = \
260 SPARC_BRANCH((unsigned long) floppy_hardint, \
261 (unsigned long) &table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_two);\
262 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_three = SPARC_RD_WIM_L3; \
263 table[SP_TRAP_IRQ1+(cpu_irq-1)].inst_four = SPARC_NOP;
265 INSTANTIATE(sparc_ttable
)
267 #if defined CONFIG_SMP
268 if (sparc_cpu_model
!= sparc_leon
) {
269 struct tt_entry
*trap_table
;
271 trap_table
= &trapbase_cpu1
;
272 INSTANTIATE(trap_table
)
273 trap_table
= &trapbase_cpu2
;
274 INSTANTIATE(trap_table
)
275 trap_table
= &trapbase_cpu3
;
276 INSTANTIATE(trap_table
)
281 * XXX Correct thing whould be to flush only I- and D-cache lines
282 * which contain the handler in question. But as of time of the
283 * writing we have no CPU-neutral interface to fine-grained flushes.
288 EXPORT_SYMBOL(sparc_floppy_request_irq
);
291 * These variables are used to access state from the assembler
292 * interrupt handler, floppy_hardint, so we cannot put these in
293 * the floppy driver image because that would not work in the
296 volatile unsigned char *fdc_status
;
297 EXPORT_SYMBOL(fdc_status
);
300 EXPORT_SYMBOL(pdma_vaddr
);
302 unsigned long pdma_size
;
303 EXPORT_SYMBOL(pdma_size
);
305 volatile int doing_pdma
;
306 EXPORT_SYMBOL(doing_pdma
);
309 EXPORT_SYMBOL(pdma_base
);
311 unsigned long pdma_areasize
;
312 EXPORT_SYMBOL(pdma_areasize
);
314 /* Use the generic irq support to call floppy_interrupt
315 * which was setup using request_irq() in sparc_floppy_request_irq().
316 * We only have one floppy interrupt so we do not need to check
317 * for additional handlers being wired up by irq_link()
319 void sparc_floppy_irq(int irq
, void *dev_id
, struct pt_regs
*regs
)
321 struct pt_regs
*old_regs
;
323 old_regs
= set_irq_regs(regs
);
325 generic_handle_irq(floppy_irq
);
327 set_irq_regs(old_regs
);
332 * This could probably be made indirect too and assigned in the CPU
333 * bits of the code. That would be much nicer I think and would also
334 * fit in with the idea of being able to tune your kernel for your machine
335 * by removing unrequired machine and device support.
339 void __init
init_IRQ(void)
341 switch (sparc_cpu_model
) {
345 sun4m_pci_init_IRQ();
359 prom_printf("Cannot initialize IRQs on this Sun machine...");