1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com) Aeroflex Gaisler AB
4 * Copyright (C) 2009 Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
7 #include <linux/kernel.h>
8 #include <linux/errno.h>
9 #include <linux/mutex.h>
11 #include <linux/of_platform.h>
12 #include <linux/interrupt.h>
13 #include <linux/of_device.h>
14 #include <linux/clocksource.h>
15 #include <linux/clockchips.h>
17 #include <asm/oplib.h>
18 #include <asm/timer.h>
21 #include <asm/leon_amba.h>
22 #include <asm/traps.h>
23 #include <asm/cacheflush.h>
25 #include <asm/setup.h>
31 struct leon3_irqctrl_regs_map
*leon3_irqctrl_regs
; /* interrupt controller base address */
32 struct leon3_gptimer_regs_map
*leon3_gptimer_regs
; /* timer controller base address */
34 int leondebug_irq_disable
;
35 int leon_debug_irqout
;
36 static volatile u32 dummy_master_l10_counter
;
37 unsigned long amba_system_id
;
38 static DEFINE_SPINLOCK(leon_irq_lock
);
40 static unsigned long leon3_gptimer_idx
; /* Timer Index (0..6) within Timer Core */
41 static unsigned long leon3_gptimer_ackmask
; /* For clearing pending bit */
42 unsigned long leon3_gptimer_irq
; /* interrupt controller irq number */
43 unsigned int sparc_leon_eirq
;
44 #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
45 #define LEON_IACK (&leon3_irqctrl_regs->iclear)
46 #define LEON_DO_ACK_HW 1
48 /* Return the last ACKed IRQ by the Extended IRQ controller. It has already
49 * been (automatically) ACKed when the CPU takes the trap.
51 static inline unsigned int leon_eirq_get(int cpu
)
53 return LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs
->intid
[cpu
]) & 0x1f;
56 /* Handle one or multiple IRQs from the extended interrupt controller */
57 static void leon_handle_ext_irq(struct irq_desc
*desc
)
61 int cpu
= sparc_leon3_cpuid();
63 eirq
= leon_eirq_get(cpu
);
65 if ((eirq
& 0x10) && p
&& p
->irq
) /* bit4 tells if IRQ happened */
66 generic_handle_irq(p
->irq
);
69 /* The extended IRQ controller has been found, this function registers it */
70 static void leon_eirq_setup(unsigned int eirq
)
72 unsigned long mask
, oldmask
;
75 if (eirq
< 1 || eirq
> 0xf) {
76 printk(KERN_ERR
"LEON EXT IRQ NUMBER BAD: %d\n", eirq
);
80 veirq
= leon_build_device_irq(eirq
, leon_handle_ext_irq
, "extirq", 0);
83 * Unmask the Extended IRQ, the IRQs routed through the Ext-IRQ
84 * controller have a mask-bit of their own, so this is safe.
88 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(boot_cpu_id
));
89 LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id
), (oldmask
| mask
));
90 sparc_leon_eirq
= eirq
;
93 unsigned long leon_get_irqmask(unsigned int irq
)
97 if (!irq
|| ((irq
> 0xf) && !sparc_leon_eirq
)
98 || ((irq
> 0x1f) && sparc_leon_eirq
)) {
100 "leon_get_irqmask: false irq number: %d\n", irq
);
103 mask
= LEON_HARD_INT(irq
);
109 static int irq_choose_cpu(const struct cpumask
*affinity
)
113 cpumask_and(&mask
, cpu_online_mask
, affinity
);
114 if (cpumask_equal(&mask
, cpu_online_mask
) || cpumask_empty(&mask
))
117 return cpumask_first(&mask
);
120 #define irq_choose_cpu(affinity) boot_cpu_id
123 static int leon_set_affinity(struct irq_data
*data
, const struct cpumask
*dest
,
126 unsigned long mask
, oldmask
, flags
;
129 mask
= (unsigned long)data
->chip_data
;
130 oldcpu
= irq_choose_cpu(irq_data_get_affinity_mask(data
));
131 newcpu
= irq_choose_cpu(dest
);
133 if (oldcpu
== newcpu
)
136 /* unmask on old CPU first before enabling on the selected CPU */
137 spin_lock_irqsave(&leon_irq_lock
, flags
);
138 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(oldcpu
));
139 LEON3_BYPASS_STORE_PA(LEON_IMASK(oldcpu
), (oldmask
& ~mask
));
140 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(newcpu
));
141 LEON3_BYPASS_STORE_PA(LEON_IMASK(newcpu
), (oldmask
| mask
));
142 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
144 return IRQ_SET_MASK_OK
;
147 static void leon_unmask_irq(struct irq_data
*data
)
149 unsigned long mask
, oldmask
, flags
;
152 mask
= (unsigned long)data
->chip_data
;
153 cpu
= irq_choose_cpu(irq_data_get_affinity_mask(data
));
154 spin_lock_irqsave(&leon_irq_lock
, flags
);
155 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu
));
156 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu
), (oldmask
| mask
));
157 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
160 static void leon_mask_irq(struct irq_data
*data
)
162 unsigned long mask
, oldmask
, flags
;
165 mask
= (unsigned long)data
->chip_data
;
166 cpu
= irq_choose_cpu(irq_data_get_affinity_mask(data
));
167 spin_lock_irqsave(&leon_irq_lock
, flags
);
168 oldmask
= LEON3_BYPASS_LOAD_PA(LEON_IMASK(cpu
));
169 LEON3_BYPASS_STORE_PA(LEON_IMASK(cpu
), (oldmask
& ~mask
));
170 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
173 static unsigned int leon_startup_irq(struct irq_data
*data
)
176 leon_unmask_irq(data
);
180 static void leon_shutdown_irq(struct irq_data
*data
)
183 irq_unlink(data
->irq
);
186 /* Used by external level sensitive IRQ handlers on the LEON: ACK IRQ ctrl */
187 static void leon_eoi_irq(struct irq_data
*data
)
189 unsigned long mask
= (unsigned long)data
->chip_data
;
191 if (mask
& LEON_DO_ACK_HW
)
192 LEON3_BYPASS_STORE_PA(LEON_IACK
, mask
& ~LEON_DO_ACK_HW
);
195 static struct irq_chip leon_irq
= {
197 .irq_startup
= leon_startup_irq
,
198 .irq_shutdown
= leon_shutdown_irq
,
199 .irq_mask
= leon_mask_irq
,
200 .irq_unmask
= leon_unmask_irq
,
201 .irq_eoi
= leon_eoi_irq
,
202 .irq_set_affinity
= leon_set_affinity
,
206 * Build a LEON IRQ for the edge triggered LEON IRQ controller:
207 * Edge (normal) IRQ - handle_simple_irq, ack=DON'T-CARE, never ack
208 * Level IRQ (PCI|Level-GPIO) - handle_fasteoi_irq, ack=1, ack after ISR
209 * Per-CPU Edge - handle_percpu_irq, ack=0
211 unsigned int leon_build_device_irq(unsigned int real_irq
,
212 irq_flow_handler_t flow_handler
,
213 const char *name
, int do_ack
)
217 struct irq_desc
*desc
;
220 mask
= leon_get_irqmask(real_irq
);
224 irq
= irq_alloc(real_irq
, real_irq
);
229 mask
|= LEON_DO_ACK_HW
;
231 desc
= irq_to_desc(irq
);
232 if (!desc
|| !desc
->handle_irq
|| desc
->handle_irq
== handle_bad_irq
) {
233 irq_set_chip_and_handler_name(irq
, &leon_irq
,
235 irq_set_chip_data(irq
, (void *)mask
);
242 static unsigned int _leon_build_device_irq(struct platform_device
*op
,
243 unsigned int real_irq
)
245 return leon_build_device_irq(real_irq
, handle_simple_irq
, "edge", 0);
248 void leon_update_virq_handling(unsigned int virq
,
249 irq_flow_handler_t flow_handler
,
250 const char *name
, int do_ack
)
252 unsigned long mask
= (unsigned long)irq_get_chip_data(virq
);
254 mask
&= ~LEON_DO_ACK_HW
;
256 mask
|= LEON_DO_ACK_HW
;
258 irq_set_chip_and_handler_name(virq
, &leon_irq
,
260 irq_set_chip_data(virq
, (void *)mask
);
263 static u32
leon_cycles_offset(void)
265 u32 rld
, val
, ctrl
, off
;
267 rld
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].rld
);
268 val
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].val
);
269 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
270 if (LEON3_GPTIMER_CTRL_ISPENDING(ctrl
)) {
271 val
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].val
);
282 /* smp clockevent irq */
283 static irqreturn_t
leon_percpu_timer_ce_interrupt(int irq
, void *unused
)
285 struct clock_event_device
*ce
;
286 int cpu
= smp_processor_id();
288 leon_clear_profile_irq(cpu
);
290 if (cpu
== boot_cpu_id
)
291 timer_interrupt(irq
, NULL
);
293 ce
= &per_cpu(sparc32_clockevent
, cpu
);
296 if (ce
->event_handler
)
297 ce
->event_handler(ce
);
303 #endif /* CONFIG_SMP */
305 void __init
leon_init_timers(void)
308 struct device_node
*rootnp
, *np
, *nnp
;
317 sparc_config
.get_cycles_offset
= leon_cycles_offset
;
318 sparc_config
.cs_period
= 1000000 / HZ
;
319 sparc_config
.features
|= FEAT_L10_CLOCKSOURCE
;
322 sparc_config
.features
|= FEAT_L10_CLOCKEVENT
;
325 leondebug_irq_disable
= 0;
326 leon_debug_irqout
= 0;
327 master_l10_counter
= (u32 __iomem
*)&dummy_master_l10_counter
;
328 dummy_master_l10_counter
= 0;
330 rootnp
= of_find_node_by_path("/ambapp0");
334 /* Find System ID: GRLIB build ID and optional CHIP ID */
335 pp
= of_find_property(rootnp
, "systemid", &len
);
337 amba_system_id
= *(unsigned long *)pp
->value
;
339 /* Find IRQMP IRQ Controller Registers base adr otherwise bail out */
340 np
= of_find_node_by_name(rootnp
, "GAISLER_IRQMP");
342 np
= of_find_node_by_name(rootnp
, "01_00d");
346 pp
= of_find_property(np
, "reg", &len
);
349 leon3_irqctrl_regs
= *(struct leon3_irqctrl_regs_map
**)pp
->value
;
351 /* Find GPTIMER Timer Registers base address otherwise bail out. */
355 np
= of_find_node_by_name(nnp
, "GAISLER_GPTIMER");
357 np
= of_find_node_by_name(nnp
, "01_011");
363 pp
= of_find_property(np
, "ampopts", &len
);
365 ampopts
= *(int *)pp
->value
;
367 /* Skip this instance, resource already
368 * allocated by other OS */
374 /* Select Timer-Instance on Timer Core. Default is zero */
375 leon3_gptimer_idx
= ampopts
& 0x7;
377 pp
= of_find_property(np
, "reg", &len
);
379 leon3_gptimer_regs
= *(struct leon3_gptimer_regs_map
**)
381 pp
= of_find_property(np
, "interrupts", &len
);
383 leon3_gptimer_irq
= *(unsigned int *)pp
->value
;
385 if (!(leon3_gptimer_regs
&& leon3_irqctrl_regs
&& leon3_gptimer_irq
))
388 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
389 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
,
390 ctrl
| LEON3_GPTIMER_CTRL_PENDING
);
391 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
393 if ((ctrl
& LEON3_GPTIMER_CTRL_PENDING
) != 0)
394 leon3_gptimer_ackmask
= ~LEON3_GPTIMER_CTRL_PENDING
;
396 leon3_gptimer_ackmask
= ~0;
398 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].val
, 0);
399 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].rld
,
400 (((1000000 / HZ
) - 1)));
401 LEON3_BYPASS_STORE_PA(
402 &leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
, 0);
405 * The IRQ controller may (if implemented) consist of multiple
406 * IRQ controllers, each mapped on a 4Kb boundary.
407 * Each CPU may be routed to different IRQCTRLs, however
408 * we assume that all CPUs (in SMP system) is routed to the
409 * same IRQ Controller, and for non-SMP only one IRQCTRL is
411 * In AMP systems, Linux must run on CPU0 for the time being.
413 icsel
= LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs
->icsel
[boot_cpu_id
/8]);
414 icsel
= (icsel
>> ((7 - (boot_cpu_id
&0x7)) * 4)) & 0xf;
415 leon3_irqctrl_regs
+= icsel
;
417 /* Mask all IRQs on boot-cpu IRQ controller */
418 LEON3_BYPASS_STORE_PA(&leon3_irqctrl_regs
->mask
[boot_cpu_id
], 0);
420 /* Probe extended IRQ controller */
421 eirq
= (LEON3_BYPASS_LOAD_PA(&leon3_irqctrl_regs
->mpstatus
)
424 leon_eirq_setup(eirq
);
431 * In SMP, sun4m adds a IPI handler to IRQ trap handler that
432 * LEON never must take, sun4d and LEON overwrites the branch
435 local_irq_save(flags
);
436 patchme_maybe_smp_msg
[0] = 0x01000000; /* NOP out the branch */
437 local_ops
->cache_all();
438 local_irq_restore(flags
);
442 config
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->config
);
443 if (config
& (1 << LEON3_GPTIMER_SEPIRQ
))
444 leon3_gptimer_irq
+= leon3_gptimer_idx
;
445 else if ((config
& LEON3_GPTIMER_TIMERS
) > 1)
446 pr_warn("GPTIMER uses shared irqs, using other timers of the same core will fail.\n");
449 /* Install per-cpu IRQ handler for broadcasted ticker */
450 irq
= leon_build_device_irq(leon3_gptimer_irq
, handle_percpu_irq
,
452 err
= request_irq(irq
, leon_percpu_timer_ce_interrupt
,
453 IRQF_PERCPU
| IRQF_TIMER
, "timer", NULL
);
455 irq
= _leon_build_device_irq(NULL
, leon3_gptimer_irq
);
456 err
= request_irq(irq
, timer_interrupt
, IRQF_TIMER
, "timer", NULL
);
459 pr_err("Unable to attach timer IRQ%d\n", irq
);
462 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
,
466 LEON3_GPTIMER_IRQEN
);
469 printk(KERN_ERR
"No Timer/irqctrl found\n");
474 static void leon_clear_clock_irq(void)
478 ctrl
= LEON3_BYPASS_LOAD_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
);
479 LEON3_BYPASS_STORE_PA(&leon3_gptimer_regs
->e
[leon3_gptimer_idx
].ctrl
,
480 ctrl
& leon3_gptimer_ackmask
);
483 static void leon_load_profile_irq(int cpu
, unsigned int limit
)
488 void leon_clear_profile_irq(int cpu
)
492 void leon_enable_irq_cpu(unsigned int irq_nr
, unsigned int cpu
)
494 unsigned long mask
, flags
, *addr
;
495 mask
= leon_get_irqmask(irq_nr
);
496 spin_lock_irqsave(&leon_irq_lock
, flags
);
497 addr
= (unsigned long *)LEON_IMASK(cpu
);
498 LEON3_BYPASS_STORE_PA(addr
, (LEON3_BYPASS_LOAD_PA(addr
) | mask
));
499 spin_unlock_irqrestore(&leon_irq_lock
, flags
);
504 void __init
leon_init_IRQ(void)
506 sparc_config
.init_timers
= leon_init_timers
;
507 sparc_config
.build_device_irq
= _leon_build_device_irq
;
508 sparc_config
.clock_rate
= 1000000;
509 sparc_config
.clear_clock_irq
= leon_clear_clock_irq
;
510 sparc_config
.load_profile_irq
= leon_load_profile_irq
;