1 /* SPDX-License-Identifier: GPL-2.0 */
3 * viking.S: High speed Viking cache/mmu operations
5 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
6 * Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz)
7 * Copyright (C) 1999 Pavel Semerad (semerad@ss1000.ms.mff.cuni.cz)
10 #include <asm/ptrace.h>
12 #include <asm/asm-offsets.h>
16 #include <asm/pgtsrmmu.h>
17 #include <asm/viking.h>
22 sun4dsmp_flush_tlb_spin:
29 .globl viking_flush_cache_all, viking_flush_cache_mm
30 .globl viking_flush_cache_range, viking_flush_cache_page
31 .globl viking_flush_page, viking_mxcc_flush_page
32 .globl viking_flush_page_for_dma, viking_flush_page_to_ram
33 .globl viking_flush_sig_insns
34 .globl viking_flush_tlb_all, viking_flush_tlb_mm
35 .globl viking_flush_tlb_range, viking_flush_tlb_page
38 sethi %hi(PAGE_OFFSET), %g2
40 srl %g3, 12, %g1 ! ppage >> 12
42 clr %o1 ! set counter, 0 - 127
43 sethi %hi(PAGE_OFFSET + PAGE_SIZE - 0x80000000), %o3
44 sethi %hi(0x80000000), %o4
45 sethi %hi(VIKING_PTAG_VALID), %o5
46 sethi %hi(2*PAGE_SIZE), %o0
47 sethi %hi(PAGE_SIZE), %g7
48 clr %o2 ! block counter, 0 - 3
51 or %g4, %o4, %g4 ! 0x80000000 | (set << 5)
53 sll %o2, 26, %g5 ! block << 26
56 ldda [%g5] ASI_M_DATAC_TAG, %g2
57 cmp %g3, %g1 ! ptag == ppage?
61 andcc %g2, %o5, %g0 ! ptag VALID?
63 add %g4, %o3, %g2 ! (PAGE_OFFSET + PAGE_SIZE) | (set << 5)
80 sll %o2, 26, %g5 ! block << 26
90 viking_mxcc_flush_page:
91 sethi %hi(PAGE_OFFSET), %g2
93 sub %g3, -PAGE_SIZE, %g3 ! ppage + PAGE_SIZE
94 sethi %hi(MXCC_SRCSTREAM), %o3 ! assume %hi(MXCC_SRCSTREAM) == %hi(MXCC_DESTSTREAM)
95 mov 0x10, %g2 ! set cacheable bit
96 or %o3, %lo(MXCC_SRCSTREAM), %o2
97 or %o3, %lo(MXCC_DESSTREAM), %o3
98 sub %g3, MXCC_STREAM_SIZE, %g3
100 stda %g2, [%o2] ASI_M_MXCC
101 stda %g2, [%o3] ASI_M_MXCC
102 andncc %g3, PAGE_MASK, %g0
104 sub %g3, MXCC_STREAM_SIZE, %g3
109 viking_flush_cache_page:
110 viking_flush_cache_range:
112 ld [%o0 + VMA_VM_MM], %o0
114 viking_flush_cache_mm:
116 ld [%o0 + AOFF_mm_context], %g1
118 bne viking_flush_cache_all
120 b,a viking_flush_cache_out
122 viking_flush_cache_all:
123 WINDOW_FLUSH(%g4, %g5)
124 viking_flush_cache_out:
128 viking_flush_tlb_all:
131 sta %g0, [%g1] ASI_M_FLUSH_PROBE
134 mov SRMMU_CTX_REG, %g1
135 ld [%o0 + AOFF_mm_context], %o1
136 lda [%g1] ASI_M_MMUREGS, %g5
142 sta %o1, [%g1] ASI_M_MMUREGS
143 sta %g0, [%g2] ASI_M_FLUSH_PROBE
145 sta %g5, [%g1] ASI_M_MMUREGS
151 viking_flush_tlb_range:
152 ld [%o0 + VMA_VM_MM], %o0
153 mov SRMMU_CTX_REG, %g1
154 ld [%o0 + AOFF_mm_context], %o3
155 lda [%g1] ASI_M_MMUREGS, %g5
160 sethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
161 sta %o3, [%g1] ASI_M_MMUREGS
164 sta %g0, [%o1] ASI_M_FLUSH_PROBE
168 sta %g0, [%o1] ASI_M_FLUSH_PROBE
170 sta %g5, [%g1] ASI_M_MMUREGS
176 viking_flush_tlb_page:
177 ld [%o0 + VMA_VM_MM], %o0
178 mov SRMMU_CTX_REG, %g1
179 ld [%o0 + AOFF_mm_context], %o3
180 lda [%g1] ASI_M_MMUREGS, %g5
185 and %o1, PAGE_MASK, %o1
186 sta %o3, [%g1] ASI_M_MMUREGS
187 sta %g0, [%o1] ASI_M_FLUSH_PROBE
189 sta %g5, [%g1] ASI_M_MMUREGS
195 viking_flush_page_to_ram:
196 viking_flush_page_for_dma:
197 viking_flush_sig_insns:
202 .globl sun4dsmp_flush_tlb_all, sun4dsmp_flush_tlb_mm
203 .globl sun4dsmp_flush_tlb_range, sun4dsmp_flush_tlb_page
204 sun4dsmp_flush_tlb_all:
205 sethi %hi(sun4dsmp_flush_tlb_spin), %g3
206 1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
210 sta %g0, [%g1] ASI_M_FLUSH_PROBE
212 stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
215 ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
218 sun4dsmp_flush_tlb_mm:
219 sethi %hi(sun4dsmp_flush_tlb_spin), %g3
220 1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
223 mov SRMMU_CTX_REG, %g1
224 ld [%o0 + AOFF_mm_context], %o1
225 lda [%g1] ASI_M_MMUREGS, %g5
227 sta %o1, [%g1] ASI_M_MMUREGS
228 sta %g0, [%g2] ASI_M_FLUSH_PROBE
229 sta %g5, [%g1] ASI_M_MMUREGS
231 stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
234 ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
237 sun4dsmp_flush_tlb_range:
238 sethi %hi(sun4dsmp_flush_tlb_spin), %g3
239 1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
242 mov SRMMU_CTX_REG, %g1
243 ld [%o0 + VMA_VM_MM], %o0
244 ld [%o0 + AOFF_mm_context], %o3
245 lda [%g1] ASI_M_MMUREGS, %g5
246 sethi %hi(~((1 << SRMMU_PGDIR_SHIFT) - 1)), %o4
247 sta %o3, [%g1] ASI_M_MMUREGS
250 sta %g0, [%o1] ASI_M_FLUSH_PROBE
254 sta %g0, [%o1] ASI_M_FLUSH_PROBE
255 sta %g5, [%g1] ASI_M_MMUREGS
257 stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
260 ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
263 sun4dsmp_flush_tlb_page:
264 sethi %hi(sun4dsmp_flush_tlb_spin), %g3
265 1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5
268 mov SRMMU_CTX_REG, %g1
269 ld [%o0 + VMA_VM_MM], %o0
270 ld [%o0 + AOFF_mm_context], %o3
271 lda [%g1] ASI_M_MMUREGS, %g5
272 and %o1, PAGE_MASK, %o1
273 sta %o3, [%g1] ASI_M_MMUREGS
274 sta %g0, [%o1] ASI_M_FLUSH_PROBE
275 sta %g5, [%g1] ASI_M_MMUREGS
277 stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)]
280 ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5