arch/x86/kernel/process_32.c

   1 /*
   2  *  Copyright (C) 1995  Linus Torvalds
   3  *
   4  *  Pentium III FXSR, SSE support
   5  *      Gareth Hughes <gareth@valinux.com>, May 2000
   6  */
   7
   8 /*
   9  * This file handles the architecture-dependent parts of process handling..
  10  */
  11
  12 #include <linux/cpu.h>
  13 #include <linux/errno.h>
  14 #include <linux/sched.h>
  15 #include <linux/sched/task.h>
  16 #include <linux/sched/task_stack.h>
  17 #include <linux/fs.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/elfcore.h>
  21 #include <linux/smp.h>
  22 #include <linux/stddef.h>
  23 #include <linux/slab.h>
  24 #include <linux/vmalloc.h>
  25 #include <linux/user.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/delay.h>
  28 #include <linux/reboot.h>
  29 #include <linux/mc146818rtc.h>
  30 #include <linux/export.h>
  31 #include <linux/kallsyms.h>
  32 #include <linux/ptrace.h>
  33 #include <linux/personality.h>
  34 #include <linux/percpu.h>
  35 #include <linux/prctl.h>
  36 #include <linux/ftrace.h>
  37 #include <linux/uaccess.h>
  38 #include <linux/io.h>
  39 #include <linux/kdebug.h>
  40 #include <linux/syscalls.h>
  41
  42 #include <asm/pgtable.h>
  43 #include <asm/ldt.h>
  44 #include <asm/processor.h>
  45 #include <asm/fpu/internal.h>
  46 #include <asm/desc.h>
  47
  48 #include <linux/err.h>
  49
  50 #include <asm/tlbflush.h>
  51 #include <asm/cpu.h>
  52 #include <asm/syscalls.h>
  53 #include <asm/debugreg.h>
  54 #include <asm/switch_to.h>
  55 #include <asm/vm86.h>
  56 #include <asm/resctrl_sched.h>
  57 #include <asm/proto.h>
  58
  59 #include "process.h"
  60
  61 void __show_regs(struct pt_regs *regs, enum show_regs_mode mode)
  62 {
  63         unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L;
  64         unsigned long d0, d1, d2, d3, d6, d7;
  65         unsigned short gs;
  66
  67         if (user_mode(regs))
  68                 gs = get_user_gs(regs);
  69         else
  70                 savesegment(gs, gs);
  71
  72         show_ip(regs, KERN_DEFAULT);
  73
  74         printk(KERN_DEFAULT "EAX: %08lx EBX: %08lx ECX: %08lx EDX: %08lx\n",
  75                 regs->ax, regs->bx, regs->cx, regs->dx);
  76         printk(KERN_DEFAULT "ESI: %08lx EDI: %08lx EBP: %08lx ESP: %08lx\n",
  77                 regs->si, regs->di, regs->bp, regs->sp);
  78         printk(KERN_DEFAULT "DS: %04x ES: %04x FS: %04x GS: %04x SS: %04x EFLAGS: %08lx\n",
  79                (u16)regs->ds, (u16)regs->es, (u16)regs->fs, gs, regs->ss, regs->flags);
  80
  81         if (mode != SHOW_REGS_ALL)
  82                 return;
  83
  84         cr0 = read_cr0();
  85         cr2 = read_cr2();
  86         cr3 = __read_cr3();
  87         cr4 = __read_cr4();
  88         printk(KERN_DEFAULT "CR0: %08lx CR2: %08lx CR3: %08lx CR4: %08lx\n",
  89                         cr0, cr2, cr3, cr4);
  90
  91         get_debugreg(d0, 0);
  92         get_debugreg(d1, 1);
  93         get_debugreg(d2, 2);
  94         get_debugreg(d3, 3);
  95         get_debugreg(d6, 6);
  96         get_debugreg(d7, 7);
  97
  98         /* Only print out debug registers if they are in their non-default state. */
  99         if ((d0 == 0) && (d1 == 0) && (d2 == 0) && (d3 == 0) &&
 100             (d6 == DR6_RESERVED) && (d7 == 0x400))
 101                 return;
 102
 103         printk(KERN_DEFAULT "DR0: %08lx DR1: %08lx DR2: %08lx DR3: %08lx\n",
 104                         d0, d1, d2, d3);
 105         printk(KERN_DEFAULT "DR6: %08lx DR7: %08lx\n",
 106                         d6, d7);
 107 }
 108
 109 void release_thread(struct task_struct *dead_task)
 110 {
 111         BUG_ON(dead_task->mm);
 112         release_vm86_irqs(dead_task);
 113 }
 114
 115 void
 116 start_thread(struct pt_regs *regs, unsigned long new_ip, unsigned long new_sp)
 117 {
 118         set_user_gs(regs, 0);
 119         regs->fs                = 0;
 120         regs->ds                = __USER_DS;
 121         regs->es                = __USER_DS;
 122         regs->ss                = __USER_DS;
 123         regs->cs                = __USER_CS;
 124         regs->ip                = new_ip;
 125         regs->sp                = new_sp;
 126         regs->flags             = X86_EFLAGS_IF;
 127 }
 128 EXPORT_SYMBOL_GPL(start_thread);
 129
 130
 131 /*
 132  *      switch_to(x,y) should switch tasks from x to y.
 133  *
 134  * We fsave/fwait so that an exception goes off at the right time
 135  * (as a call from the fsave or fwait in effect) rather than to
 136  * the wrong process. Lazy FP saving no longer makes any sense
 137  * with modern CPU's, and this simplifies a lot of things (SMP
 138  * and UP become the same).
 139  *
 140  * NOTE! We used to use the x86 hardware context switching. The
 141  * reason for not using it any more becomes apparent when you
 142  * try to recover gracefully from saved state that is no longer
 143  * valid (stale segment register values in particular). With the
 144  * hardware task-switch, there is no way to fix up bad state in
 145  * a reasonable manner.
 146  *
 147  * The fact that Intel documents the hardware task-switching to
 148  * be slow is a fairly red herring - this code is not noticeably
 149  * faster. However, there _is_ some room for improvement here,
 150  * so the performance issues may eventually be a valid point.
 151  * More important, however, is the fact that this allows us much
 152  * more flexibility.
 153  *
 154  * The return value (in %ax) will be the "prev" task after
 155  * the task-switch, and shows up in ret_from_fork in entry.S,
 156  * for example.
 157  */
 158 __visible __notrace_funcgraph struct task_struct *
 159 __switch_to(struct task_struct *prev_p, struct task_struct *next_p)
 160 {
 161         struct thread_struct *prev = &prev_p->thread,
 162                              *next = &next_p->thread;
 163         struct fpu *prev_fpu = &prev->fpu;
 164         struct fpu *next_fpu = &next->fpu;
 165         int cpu = smp_processor_id();
 166
 167         /* never put a printk in __switch_to... printk() calls wake_up*() indirectly */
 168
 169         if (!test_thread_flag(TIF_NEED_FPU_LOAD))
 170                 switch_fpu_prepare(prev_fpu, cpu);
 171
 172         /*
 173          * Save away %gs. No need to save %fs, as it was saved on the
 174          * stack on entry.  No need to save %es and %ds, as those are
 175          * always kernel segments while inside the kernel.  Doing this
 176          * before setting the new TLS descriptors avoids the situation
 177          * where we temporarily have non-reloadable segments in %fs
 178          * and %gs.  This could be an issue if the NMI handler ever
 179          * used %fs or %gs (it does not today), or if the kernel is
 180          * running inside of a hypervisor layer.
 181          */
 182         lazy_save_gs(prev->gs);
 183
 184         /*
 185          * Load the per-thread Thread-Local Storage descriptor.
 186          */
 187         load_TLS(next, cpu);
 188
 189         switch_to_extra(prev_p, next_p);
 190
 191         /*
 192          * Leave lazy mode, flushing any hypercalls made here.
 193          * This must be done before restoring TLS segments so
 194          * the GDT and LDT are properly updated.
 195          */
 196         arch_end_context_switch(next_p);
 197
 198         /*
 199          * Reload esp0 and cpu_current_top_of_stack.  This changes
 200          * current_thread_info().  Refresh the SYSENTER configuration in
 201          * case prev or next is vm86.
 202          */
 203         update_task_stack(next_p);
 204         refresh_sysenter_cs(next);
 205         this_cpu_write(cpu_current_top_of_stack,
 206                        (unsigned long)task_stack_page(next_p) +
 207                        THREAD_SIZE);
 208
 209         /*
 210          * Restore %gs if needed (which is common)
 211          */
 212         if (prev->gs | next->gs)
 213                 lazy_load_gs(next->gs);
 214
 215         this_cpu_write(current_task, next_p);
 216
 217         switch_fpu_finish(next_fpu);
 218
 219         /* Load the Intel cache allocation PQR MSR. */
 220         resctrl_sched_in();
 221
 222         return prev_p;
 223 }
 224
 225 SYSCALL_DEFINE2(arch_prctl, int, option, unsigned long, arg2)
 226 {
 227         return do_arch_prctl_common(current, option, arg2);
 228 }