1 Renesas AHB to PCI bridge
2 -------------------------
4 This is the bridge used internally to connect the USB controllers to the
5 AHB. There is one bridge instance per USB port connected to the internal
6 OHCI and EHCI controllers.
9 - compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
10 "renesas,pci-r8a7791" for the R8A7791 SoC;
11 "renesas,pci-r8a7794" for the R8A7794 SoC.
12 - reg: A list of physical regions to access the device: the first is
13 the operational registers for the OHCI/EHCI controllers and the
14 second is for the bridge configuration and control registers.
15 - interrupts: interrupt for the device.
16 - clocks: The reference to the device clock.
17 - bus-range: The PCI bus number range; as this is a single bus, the range
18 should be specified as the same value twice.
19 - #address-cells: must be 3.
20 - #size-cells: must be 2.
21 - #interrupt-cells: must be 1.
22 - interrupt-map: standard property used to define the mapping of the PCI
23 interrupts to the GIC interrupts.
24 - interrupt-map-mask: standard property that helps to define the interrupt
27 Example SoC configuration:
30 compatible = "renesas,pci-r8a7790";
31 clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
32 reg = <0x0 0xee090000 0x0 0xc00>,
33 <0x0 0xee080000 0x0 0x1100>;
34 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
40 #interrupt-cells = <1>;
41 interrupt-map-mask = <0xff00 0 0 0x7>;
42 interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
43 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
44 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
47 reg = <0x800 0 0 0 0>;
54 reg = <0x1000 0 0 0 0>;
65 pinctrl-0 = <&usb0_pins>;
66 pinctrl-names = "default";