1 #include <linux/device.h>
7 MCE_UCNA_SEVERITY
= MCE_DEFERRED_SEVERITY
,
16 extern struct atomic_notifier_head x86_mce_decoder_chain
;
19 #define INITIAL_CHECK_INTERVAL 5 * 60 /* 5 minutes */
21 /* One object for each MCE bank, shared by all CPUs */
23 u64 ctl
; /* subevents to enable */
24 unsigned char init
; /* initialise bank? */
25 struct device_attribute attr
; /* device attribute */
26 char attrname
[ATTR_LEN
]; /* attribute name */
29 struct mce_evt_llist
{
30 struct llist_node llnode
;
34 void mce_gen_pool_process(void);
35 bool mce_gen_pool_empty(void);
36 int mce_gen_pool_add(struct mce
*mce
);
37 int mce_gen_pool_init(void);
39 extern int (*mce_severity
)(struct mce
*a
, int tolerant
, char **msg
, bool is_excp
);
40 struct dentry
*mce_get_debugfs_dir(void);
42 extern struct mce_bank
*mce_banks
;
43 extern mce_banks_t mce_banks_ce_disabled
;
45 #ifdef CONFIG_X86_MCE_INTEL
46 unsigned long cmci_intel_adjust_timer(unsigned long interval
);
47 bool mce_intel_cmci_poll(void);
48 void mce_intel_hcpu_update(unsigned long cpu
);
49 void cmci_disable_bank(int bank
);
51 # define cmci_intel_adjust_timer mce_adjust_timer_default
52 static inline bool mce_intel_cmci_poll(void) { return false; }
53 static inline void mce_intel_hcpu_update(unsigned long cpu
) { }
54 static inline void cmci_disable_bank(int bank
) { }
57 void mce_timer_kick(unsigned long interval
);
59 #ifdef CONFIG_ACPI_APEI
60 int apei_write_mce(struct mce
*m
);
61 ssize_t
apei_read_mce(struct mce
*m
, u64
*record_id
);
62 int apei_check_mce(void);
63 int apei_clear_mce(u64 record_id
);
65 static inline int apei_write_mce(struct mce
*m
)
69 static inline ssize_t
apei_read_mce(struct mce
*m
, u64
*record_id
)
73 static inline int apei_check_mce(void)
77 static inline int apei_clear_mce(u64 record_id
)
83 void mce_inject_log(struct mce
*m
);