2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * Derived mostly from Intel HDA driver with following copyrights:
8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9 * PeiSen Hou <pshou@realtek.com.tw>
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; version 2 of the License.
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <sound/pcm.h>
33 * initialize the PCI registers
35 static void skl_update_pci_byte(struct pci_dev
*pci
, unsigned int reg
,
36 unsigned char mask
, unsigned char val
)
40 pci_read_config_byte(pci
, reg
, &data
);
43 pci_write_config_byte(pci
, reg
, data
);
46 static void skl_init_pci(struct skl
*skl
)
48 struct hdac_ext_bus
*ebus
= &skl
->ebus
;
51 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
52 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
53 * Ensuring these bits are 0 clears playback static on some HD Audio
55 * The PCI register TCSEL is defined in the Intel manuals.
57 dev_dbg(ebus_to_hbus(ebus
)->dev
, "Clearing TCSEL\n");
58 skl_update_pci_byte(skl
->pci
, AZX_PCIREG_TCSEL
, 0x07, 0);
62 static void skl_stream_update(struct hdac_bus
*bus
, struct hdac_stream
*hstr
)
64 snd_pcm_period_elapsed(hstr
->substream
);
67 static irqreturn_t
skl_interrupt(int irq
, void *dev_id
)
69 struct hdac_ext_bus
*ebus
= dev_id
;
70 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
73 if (!pm_runtime_active(bus
->dev
))
76 spin_lock(&bus
->reg_lock
);
78 status
= snd_hdac_chip_readl(bus
, INTSTS
);
79 if (status
== 0 || status
== 0xffffffff) {
80 spin_unlock(&bus
->reg_lock
);
85 status
= snd_hdac_chip_readb(bus
, RIRBSTS
);
86 if (status
& RIRB_INT_MASK
) {
87 if (status
& RIRB_INT_RESPONSE
)
88 snd_hdac_bus_update_rirb(bus
);
89 snd_hdac_chip_writeb(bus
, RIRBSTS
, RIRB_INT_MASK
);
92 spin_unlock(&bus
->reg_lock
);
94 return snd_hdac_chip_readl(bus
, INTSTS
) ? IRQ_WAKE_THREAD
: IRQ_HANDLED
;
97 static irqreturn_t
skl_threaded_handler(int irq
, void *dev_id
)
99 struct hdac_ext_bus
*ebus
= dev_id
;
100 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
103 status
= snd_hdac_chip_readl(bus
, INTSTS
);
105 snd_hdac_bus_handle_stream_irq(bus
, status
, skl_stream_update
);
110 static int skl_acquire_irq(struct hdac_ext_bus
*ebus
, int do_disconnect
)
112 struct skl
*skl
= ebus_to_skl(ebus
);
113 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
116 ret
= request_threaded_irq(skl
->pci
->irq
, skl_interrupt
,
117 skl_threaded_handler
,
119 KBUILD_MODNAME
, ebus
);
122 "unable to grab IRQ %d, disabling device\n",
127 bus
->irq
= skl
->pci
->irq
;
128 pci_intx(skl
->pci
, 1);
133 #ifdef CONFIG_PM_SLEEP
137 static int skl_suspend(struct device
*dev
)
139 struct pci_dev
*pci
= to_pci_dev(dev
);
140 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
141 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
143 snd_hdac_bus_stop_chip(bus
);
144 snd_hdac_bus_enter_link_reset(bus
);
149 static int skl_resume(struct device
*dev
)
151 struct pci_dev
*pci
= to_pci_dev(dev
);
152 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
153 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
154 struct skl
*hda
= ebus_to_skl(ebus
);
158 snd_hdac_bus_init_chip(bus
, 1);
162 #endif /* CONFIG_PM_SLEEP */
165 static int skl_runtime_suspend(struct device
*dev
)
167 struct pci_dev
*pci
= to_pci_dev(dev
);
168 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
169 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
170 struct skl
*skl
= ebus_to_skl(ebus
);
173 dev_dbg(bus
->dev
, "in %s\n", __func__
);
175 /* enable controller wake up event */
176 snd_hdac_chip_updatew(bus
, WAKEEN
, 0, STATESTS_INT_MASK
);
178 snd_hdac_ext_bus_link_power_down_all(ebus
);
180 ret
= skl_suspend_dsp(skl
);
184 snd_hdac_bus_stop_chip(bus
);
185 snd_hdac_bus_enter_link_reset(bus
);
190 static int skl_runtime_resume(struct device
*dev
)
192 struct pci_dev
*pci
= to_pci_dev(dev
);
193 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
194 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
195 struct skl
*skl
= ebus_to_skl(ebus
);
198 dev_dbg(bus
->dev
, "in %s\n", __func__
);
200 /* Read STATESTS before controller reset */
201 status
= snd_hdac_chip_readw(bus
, STATESTS
);
204 snd_hdac_bus_init_chip(bus
, true);
205 /* disable controller Wake Up event */
206 snd_hdac_chip_updatew(bus
, WAKEEN
, STATESTS_INT_MASK
, 0);
208 return skl_resume_dsp(skl
);
210 #endif /* CONFIG_PM */
212 static const struct dev_pm_ops skl_pm
= {
213 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend
, skl_resume
)
214 SET_RUNTIME_PM_OPS(skl_runtime_suspend
, skl_runtime_resume
, NULL
)
220 static int skl_free(struct hdac_ext_bus
*ebus
)
222 struct skl
*skl
= ebus_to_skl(ebus
);
223 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
225 skl
->init_failed
= 1; /* to be sure */
227 snd_hdac_ext_stop_streams(ebus
);
230 free_irq(bus
->irq
, (void *)bus
);
232 iounmap(bus
->remap_addr
);
234 snd_hdac_bus_free_stream_pages(bus
);
235 snd_hdac_stream_free_all(ebus
);
236 snd_hdac_link_free_all(ebus
);
237 pci_release_regions(skl
->pci
);
238 pci_disable_device(skl
->pci
);
240 snd_hdac_ext_bus_exit(ebus
);
245 static int skl_dmic_device_register(struct skl
*skl
)
247 struct hdac_bus
*bus
= ebus_to_hbus(&skl
->ebus
);
248 struct platform_device
*pdev
;
251 /* SKL has one dmic port, so allocate dmic device for this */
252 pdev
= platform_device_alloc("dmic-codec", -1);
254 dev_err(bus
->dev
, "failed to allocate dmic device\n");
258 ret
= platform_device_add(pdev
);
260 dev_err(bus
->dev
, "failed to add dmic device: %d\n", ret
);
261 platform_device_put(pdev
);
264 skl
->dmic_dev
= pdev
;
269 static void skl_dmic_device_unregister(struct skl
*skl
)
272 platform_device_unregister(skl
->dmic_dev
);
276 * Probe the given codec address
278 static int probe_codec(struct hdac_ext_bus
*ebus
, int addr
)
280 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
281 unsigned int cmd
= (addr
<< 28) | (AC_NODE_ROOT
<< 20) |
282 (AC_VERB_PARAMETERS
<< 8) | AC_PAR_VENDOR_ID
;
285 mutex_lock(&bus
->cmd_mutex
);
286 snd_hdac_bus_send_cmd(bus
, cmd
);
287 snd_hdac_bus_get_response(bus
, addr
, &res
);
288 mutex_unlock(&bus
->cmd_mutex
);
291 dev_dbg(bus
->dev
, "codec #%d probed OK\n", addr
);
293 return snd_hdac_ext_bus_device_init(ebus
, addr
);
296 /* Codec initialization */
297 static int skl_codec_create(struct hdac_ext_bus
*ebus
)
299 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
302 max_slots
= HDA_MAX_CODECS
;
304 /* First try to probe all given codec slots */
305 for (c
= 0; c
< max_slots
; c
++) {
306 if ((bus
->codec_mask
& (1 << c
))) {
307 if (probe_codec(ebus
, c
) < 0) {
309 * Some BIOSen give you wrong codec addresses
313 "Codec #%d probe error; disabling it...\n", c
);
314 bus
->codec_mask
&= ~(1 << c
);
316 * More badly, accessing to a non-existing
317 * codec often screws up the controller bus,
318 * and disturbs the further communications.
319 * Thus if an error occurs during probing,
320 * better to reset the controller bus to get
321 * back to the sanity state.
323 snd_hdac_bus_stop_chip(bus
);
324 snd_hdac_bus_init_chip(bus
, true);
332 static const struct hdac_bus_ops bus_core_ops
= {
333 .command
= snd_hdac_bus_send_cmd
,
334 .get_response
= snd_hdac_bus_get_response
,
340 static int skl_create(struct pci_dev
*pci
,
341 const struct hdac_io_ops
*io_ops
,
345 struct hdac_ext_bus
*ebus
;
351 err
= pci_enable_device(pci
);
355 skl
= devm_kzalloc(&pci
->dev
, sizeof(*skl
), GFP_KERNEL
);
357 pci_disable_device(pci
);
361 snd_hdac_ext_bus_init(ebus
, &pci
->dev
, &bus_core_ops
, io_ops
);
362 ebus
->bus
.use_posbuf
= 1;
365 ebus
->bus
.bdl_pos_adj
= 0;
372 static int skl_first_init(struct hdac_ext_bus
*ebus
)
374 struct skl
*skl
= ebus_to_skl(ebus
);
375 struct hdac_bus
*bus
= ebus_to_hbus(ebus
);
376 struct pci_dev
*pci
= skl
->pci
;
379 int cp_streams
, pb_streams
, start_idx
;
381 err
= pci_request_regions(pci
, "Skylake HD audio");
385 bus
->addr
= pci_resource_start(pci
, 0);
386 bus
->remap_addr
= pci_ioremap_bar(pci
, 0);
387 if (bus
->remap_addr
== NULL
) {
388 dev_err(bus
->dev
, "ioremap error\n");
392 snd_hdac_ext_bus_parse_capabilities(ebus
);
394 if (skl_acquire_irq(ebus
, 0) < 0)
398 synchronize_irq(bus
->irq
);
400 gcap
= snd_hdac_chip_readw(bus
, GCAP
);
401 dev_dbg(bus
->dev
, "chipset global capabilities = 0x%x\n", gcap
);
403 /* allow 64bit DMA address if supported by H/W */
404 if (!dma_set_mask(bus
->dev
, DMA_BIT_MASK(64))) {
405 dma_set_coherent_mask(bus
->dev
, DMA_BIT_MASK(64));
407 dma_set_mask(bus
->dev
, DMA_BIT_MASK(32));
408 dma_set_coherent_mask(bus
->dev
, DMA_BIT_MASK(32));
411 /* read number of streams from GCAP register */
412 cp_streams
= (gcap
>> 8) & 0x0f;
413 pb_streams
= (gcap
>> 12) & 0x0f;
415 if (!pb_streams
&& !cp_streams
)
418 ebus
->num_streams
= cp_streams
+ pb_streams
;
420 /* initialize streams */
421 snd_hdac_ext_stream_init_all
422 (ebus
, 0, cp_streams
, SNDRV_PCM_STREAM_CAPTURE
);
423 start_idx
= cp_streams
;
424 snd_hdac_ext_stream_init_all
425 (ebus
, start_idx
, pb_streams
, SNDRV_PCM_STREAM_PLAYBACK
);
427 err
= snd_hdac_bus_alloc_stream_pages(bus
);
431 /* initialize chip */
434 snd_hdac_bus_init_chip(bus
, true);
436 /* codec detection */
437 if (!bus
->codec_mask
) {
438 dev_err(bus
->dev
, "no codecs found!\n");
445 static int skl_probe(struct pci_dev
*pci
,
446 const struct pci_device_id
*pci_id
)
449 struct hdac_ext_bus
*ebus
= NULL
;
450 struct hdac_bus
*bus
= NULL
;
453 /* we use ext core ops, so provide NULL for ops here */
454 err
= skl_create(pci
, NULL
, &skl
);
459 bus
= ebus_to_hbus(ebus
);
461 err
= skl_first_init(ebus
);
465 skl
->nhlt
= skl_nhlt_init(bus
->dev
);
467 if (skl
->nhlt
== NULL
)
470 pci_set_drvdata(skl
->pci
, ebus
);
472 /* check if dsp is there */
474 err
= skl_init_dsp(skl
);
476 dev_dbg(bus
->dev
, "error failed to register dsp\n");
481 snd_hdac_ext_bus_get_ml_capabilities(ebus
);
483 /* create device for soc dmic */
484 err
= skl_dmic_device_register(skl
);
488 /* register platform dai and controls */
489 err
= skl_platform_register(bus
->dev
);
493 /* create codec instances */
494 err
= skl_codec_create(ebus
);
499 pm_runtime_set_autosuspend_delay(bus
->dev
, SKL_SUSPEND_DELAY
);
500 pm_runtime_use_autosuspend(bus
->dev
);
501 pm_runtime_put_noidle(bus
->dev
);
502 pm_runtime_allow(bus
->dev
);
507 skl_platform_unregister(bus
->dev
);
509 skl_dmic_device_unregister(skl
);
513 skl
->init_failed
= 1;
519 static void skl_remove(struct pci_dev
*pci
)
521 struct hdac_ext_bus
*ebus
= pci_get_drvdata(pci
);
522 struct skl
*skl
= ebus_to_skl(ebus
);
525 release_firmware(skl
->tplg
);
527 if (pci_dev_run_wake(pci
))
528 pm_runtime_get_noresume(&pci
->dev
);
530 skl_platform_unregister(&pci
->dev
);
532 skl_dmic_device_unregister(skl
);
534 dev_set_drvdata(&pci
->dev
, NULL
);
538 static const struct pci_device_id skl_ids
[] = {
539 /* Sunrise Point-LP */
540 { PCI_DEVICE(0x8086, 0x9d70), 0},
543 MODULE_DEVICE_TABLE(pci
, skl_ids
);
545 /* pci_driver definition */
546 static struct pci_driver skl_driver
= {
547 .name
= KBUILD_MODNAME
,
550 .remove
= skl_remove
,
555 module_pci_driver(skl_driver
);
557 MODULE_LICENSE("GPL v2");
558 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");