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irqchip: Fix dependencies for archs w/o HAS_IOMEM
[linux/fpc-iii.git] / sound / soc / samsung / i2s.c
blobea4ab374a2231d8a79799e821a90b6a759c2291e
1 /* sound/soc/samsung/i2s.c
2 *
3 * ALSA SoC Audio Layer - Samsung I2S Controller driver
4 *
5 * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6 * Jaswinder Singh <jassisinghbrar@gmail.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23
24 #include <sound/soc.h>
25 #include <sound/pcm_params.h>
26
27 #include <linux/platform_data/asoc-s3c.h>
28
29 #include "dma.h"
30 #include "idma.h"
31 #include "i2s.h"
32 #include "i2s-regs.h"
33
34 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
35
36 enum samsung_dai_type {
37 TYPE_PRI,
38 TYPE_SEC,
39 };
40
41 struct samsung_i2s_variant_regs {
42 unsigned int bfs_off;
43 unsigned int rfs_off;
44 unsigned int sdf_off;
45 unsigned int txr_off;
46 unsigned int rclksrc_off;
47 unsigned int mss_off;
48 unsigned int cdclkcon_off;
49 unsigned int lrp_off;
50 unsigned int bfs_mask;
51 unsigned int rfs_mask;
52 unsigned int ftx0cnt_off;
53 };
54
55 struct samsung_i2s_dai_data {
56 int dai_type;
57 u32 quirks;
58 const struct samsung_i2s_variant_regs *i2s_variant_regs;
59 };
60
61 struct i2s_dai {
62 /* Platform device for this DAI */
63 struct platform_device *pdev;
64 /* Memory mapped SFR region */
65 void __iomem *addr;
66 /* Rate of RCLK source clock */
67 unsigned long rclk_srcrate;
68 /* Frame Clock */
69 unsigned frmclk;
70 /*
71 * Specifically requested RCLK,BCLK by MACHINE Driver.
72 * 0 indicates CPU driver is free to choose any value.
73 */
74 unsigned rfs, bfs;
75 /* I2S Controller's core clock */
76 struct clk *clk;
77 /* Clock for generating I2S signals */
78 struct clk *op_clk;
79 /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
80 struct i2s_dai *pri_dai;
81 /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
82 struct i2s_dai *sec_dai;
83 #define DAI_OPENED (1 << 0) /* Dai is opened */
84 #define DAI_MANAGER (1 << 1) /* Dai is the manager */
85 unsigned mode;
86 /* Driver for this DAI */
87 struct snd_soc_dai_driver i2s_dai_drv;
88 /* DMA parameters */
89 struct s3c_dma_params dma_playback;
90 struct s3c_dma_params dma_capture;
91 struct s3c_dma_params idma_playback;
92 u32 quirks;
93 u32 suspend_i2smod;
94 u32 suspend_i2scon;
95 u32 suspend_i2spsr;
96 const struct samsung_i2s_variant_regs *variant_regs;
97
98 /* Spinlock protecting access to the device's registers */
99 spinlock_t spinlock;
100 spinlock_t *lock;
101
102 /* Below fields are only valid if this is the primary FIFO */
103 struct clk *clk_table[3];
104 struct clk_onecell_data clk_data;
105 };
106
107 /* Lock for cross i/f checks */
108 static DEFINE_SPINLOCK(lock);
109
110 /* If this is the 'overlay' stereo DAI */
111 static inline bool is_secondary(struct i2s_dai *i2s)
112 {
113 return i2s->pri_dai ? true : false;
114 }
115
116 /* If operating in SoC-Slave mode */
117 static inline bool is_slave(struct i2s_dai *i2s)
118 {
119 u32 mod = readl(i2s->addr + I2SMOD);
120 return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
121 }
122
123 /* If this interface of the controller is transmitting data */
124 static inline bool tx_active(struct i2s_dai *i2s)
125 {
126 u32 active;
127
128 if (!i2s)
129 return false;
130
131 active = readl(i2s->addr + I2SCON);
132
133 if (is_secondary(i2s))
134 active &= CON_TXSDMA_ACTIVE;
135 else
136 active &= CON_TXDMA_ACTIVE;
137
138 return active ? true : false;
139 }
140
141 /* Return pointer to the other DAI */
142 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
143 {
144 return i2s->pri_dai ? : i2s->sec_dai;
145 }
146
147 /* If the other interface of the controller is transmitting data */
148 static inline bool other_tx_active(struct i2s_dai *i2s)
149 {
150 struct i2s_dai *other = get_other_dai(i2s);
151
152 return tx_active(other);
153 }
154
155 /* If any interface of the controller is transmitting data */
156 static inline bool any_tx_active(struct i2s_dai *i2s)
157 {
158 return tx_active(i2s) || other_tx_active(i2s);
159 }
160
161 /* If this interface of the controller is receiving data */
162 static inline bool rx_active(struct i2s_dai *i2s)
163 {
164 u32 active;
165
166 if (!i2s)
167 return false;
168
169 active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
170
171 return active ? true : false;
172 }
173
174 /* If the other interface of the controller is receiving data */
175 static inline bool other_rx_active(struct i2s_dai *i2s)
176 {
177 struct i2s_dai *other = get_other_dai(i2s);
178
179 return rx_active(other);
180 }
181
182 /* If any interface of the controller is receiving data */
183 static inline bool any_rx_active(struct i2s_dai *i2s)
184 {
185 return rx_active(i2s) || other_rx_active(i2s);
186 }
187
188 /* If the other DAI is transmitting or receiving data */
189 static inline bool other_active(struct i2s_dai *i2s)
190 {
191 return other_rx_active(i2s) || other_tx_active(i2s);
192 }
193
194 /* If this DAI is transmitting or receiving data */
195 static inline bool this_active(struct i2s_dai *i2s)
196 {
197 return tx_active(i2s) || rx_active(i2s);
198 }
199
200 /* If the controller is active anyway */
201 static inline bool any_active(struct i2s_dai *i2s)
202 {
203 return this_active(i2s) || other_active(i2s);
204 }
205
206 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
207 {
208 return snd_soc_dai_get_drvdata(dai);
209 }
210
211 static inline bool is_opened(struct i2s_dai *i2s)
212 {
213 if (i2s && (i2s->mode & DAI_OPENED))
214 return true;
215 else
216 return false;
217 }
218
219 static inline bool is_manager(struct i2s_dai *i2s)
220 {
221 if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
222 return true;
223 else
224 return false;
225 }
226
227 /* Read RCLK of I2S (in multiples of LRCLK) */
228 static inline unsigned get_rfs(struct i2s_dai *i2s)
229 {
230 u32 rfs;
231 rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
232 rfs &= i2s->variant_regs->rfs_mask;
233
234 switch (rfs) {
235 case 7: return 192;
236 case 6: return 96;
237 case 5: return 128;
238 case 4: return 64;
239 case 3: return 768;
240 case 2: return 384;
241 case 1: return 512;
242 default: return 256;
243 }
244 }
245
246 /* Write RCLK of I2S (in multiples of LRCLK) */
247 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
248 {
249 u32 mod = readl(i2s->addr + I2SMOD);
250 int rfs_shift = i2s->variant_regs->rfs_off;
251
252 mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
253
254 switch (rfs) {
255 case 192:
256 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
257 break;
258 case 96:
259 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
260 break;
261 case 128:
262 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
263 break;
264 case 64:
265 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
266 break;
267 case 768:
268 mod |= (MOD_RCLK_768FS << rfs_shift);
269 break;
270 case 512:
271 mod |= (MOD_RCLK_512FS << rfs_shift);
272 break;
273 case 384:
274 mod |= (MOD_RCLK_384FS << rfs_shift);
275 break;
276 default:
277 mod |= (MOD_RCLK_256FS << rfs_shift);
278 break;
279 }
280
281 writel(mod, i2s->addr + I2SMOD);
282 }
283
284 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
285 static inline unsigned get_bfs(struct i2s_dai *i2s)
286 {
287 u32 bfs;
288 bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
289 bfs &= i2s->variant_regs->bfs_mask;
290
291 switch (bfs) {
292 case 8: return 256;
293 case 7: return 192;
294 case 6: return 128;
295 case 5: return 96;
296 case 4: return 64;
297 case 3: return 24;
298 case 2: return 16;
299 case 1: return 48;
300 default: return 32;
301 }
302 }
303
304 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
305 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
306 {
307 u32 mod = readl(i2s->addr + I2SMOD);
308 int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
309 int bfs_shift = i2s->variant_regs->bfs_off;
310
311 /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
312 if (!tdm && bfs > 48) {
313 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
314 return;
315 }
316
317 mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
318
319 switch (bfs) {
320 case 48:
321 mod |= (MOD_BCLK_48FS << bfs_shift);
322 break;
323 case 32:
324 mod |= (MOD_BCLK_32FS << bfs_shift);
325 break;
326 case 24:
327 mod |= (MOD_BCLK_24FS << bfs_shift);
328 break;
329 case 16:
330 mod |= (MOD_BCLK_16FS << bfs_shift);
331 break;
332 case 64:
333 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
334 break;
335 case 96:
336 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
337 break;
338 case 128:
339 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
340 break;
341 case 192:
342 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
343 break;
344 case 256:
345 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
346 break;
347 default:
348 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
349 return;
350 }
351
352 writel(mod, i2s->addr + I2SMOD);
353 }
354
355 /* Sample-Size */
356 static inline int get_blc(struct i2s_dai *i2s)
357 {
358 int blc = readl(i2s->addr + I2SMOD);
359
360 blc = (blc >> 13) & 0x3;
361
362 switch (blc) {
363 case 2: return 24;
364 case 1: return 8;
365 default: return 16;
366 }
367 }
368
369 /* TX Channel Control */
370 static void i2s_txctrl(struct i2s_dai *i2s, int on)
371 {
372 void __iomem *addr = i2s->addr;
373 int txr_off = i2s->variant_regs->txr_off;
374 u32 con = readl(addr + I2SCON);
375 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
376
377 if (on) {
378 con |= CON_ACTIVE;
379 con &= ~CON_TXCH_PAUSE;
380
381 if (is_secondary(i2s)) {
382 con |= CON_TXSDMA_ACTIVE;
383 con &= ~CON_TXSDMA_PAUSE;
384 } else {
385 con |= CON_TXDMA_ACTIVE;
386 con &= ~CON_TXDMA_PAUSE;
387 }
388
389 if (any_rx_active(i2s))
390 mod |= 2 << txr_off;
391 else
392 mod |= 0 << txr_off;
393 } else {
394 if (is_secondary(i2s)) {
395 con |= CON_TXSDMA_PAUSE;
396 con &= ~CON_TXSDMA_ACTIVE;
397 } else {
398 con |= CON_TXDMA_PAUSE;
399 con &= ~CON_TXDMA_ACTIVE;
400 }
401
402 if (other_tx_active(i2s)) {
403 writel(con, addr + I2SCON);
404 return;
405 }
406
407 con |= CON_TXCH_PAUSE;
408
409 if (any_rx_active(i2s))
410 mod |= 1 << txr_off;
411 else
412 con &= ~CON_ACTIVE;
413 }
414
415 writel(mod, addr + I2SMOD);
416 writel(con, addr + I2SCON);
417 }
418
419 /* RX Channel Control */
420 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
421 {
422 void __iomem *addr = i2s->addr;
423 int txr_off = i2s->variant_regs->txr_off;
424 u32 con = readl(addr + I2SCON);
425 u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
426
427 if (on) {
428 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
429 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
430
431 if (any_tx_active(i2s))
432 mod |= 2 << txr_off;
433 else
434 mod |= 1 << txr_off;
435 } else {
436 con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
437 con &= ~CON_RXDMA_ACTIVE;
438
439 if (any_tx_active(i2s))
440 mod |= 0 << txr_off;
441 else
442 con &= ~CON_ACTIVE;
443 }
444
445 writel(mod, addr + I2SMOD);
446 writel(con, addr + I2SCON);
447 }
448
449 /* Flush FIFO of an interface */
450 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
451 {
452 void __iomem *fic;
453 u32 val;
454
455 if (!i2s)
456 return;
457
458 if (is_secondary(i2s))
459 fic = i2s->addr + I2SFICS;
460 else
461 fic = i2s->addr + I2SFIC;
462
463 /* Flush the FIFO */
464 writel(readl(fic) | flush, fic);
465
466 /* Be patient */
467 val = msecs_to_loops(1) / 1000; /* 1 usec */
468 while (--val)
469 cpu_relax();
470
471 writel(readl(fic) & ~flush, fic);
472 }
473
474 static int i2s_set_sysclk(struct snd_soc_dai *dai,
475 int clk_id, unsigned int rfs, int dir)
476 {
477 struct i2s_dai *i2s = to_info(dai);
478 struct i2s_dai *other = get_other_dai(i2s);
479 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
480 unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
481 unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
482 u32 mod, mask, val = 0;
483
484 spin_lock(i2s->lock);
485 mod = readl(i2s->addr + I2SMOD);
486 spin_unlock(i2s->lock);
487
488 switch (clk_id) {
489 case SAMSUNG_I2S_OPCLK:
490 mask = MOD_OPCLK_MASK;
491 val = dir;
492 break;
493 case SAMSUNG_I2S_CDCLK:
494 mask = 1 << i2s_regs->cdclkcon_off;
495 /* Shouldn't matter in GATING(CLOCK_IN) mode */
496 if (dir == SND_SOC_CLOCK_IN)
497 rfs = 0;
498
499 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
500 (any_active(i2s) &&
501 (((dir == SND_SOC_CLOCK_IN)
502 && !(mod & cdcon_mask)) ||
503 ((dir == SND_SOC_CLOCK_OUT)
504 && (mod & cdcon_mask))))) {
505 dev_err(&i2s->pdev->dev,
506 "%s:%d Other DAI busy\n", __func__, __LINE__);
507 return -EAGAIN;
508 }
509
510 if (dir == SND_SOC_CLOCK_IN)
511 val = 1 << i2s_regs->cdclkcon_off;
512
513 i2s->rfs = rfs;
514 break;
515
516 case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
517 case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
518 mask = 1 << i2s_regs->rclksrc_off;
519
520 if ((i2s->quirks & QUIRK_NO_MUXPSR)
521 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
522 clk_id = 0;
523 else
524 clk_id = 1;
525
526 if (!any_active(i2s)) {
527 if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
528 if ((clk_id && !(mod & rsrc_mask)) ||
529 (!clk_id && (mod & rsrc_mask))) {
530 clk_disable_unprepare(i2s->op_clk);
531 clk_put(i2s->op_clk);
532 } else {
533 i2s->rclk_srcrate =
534 clk_get_rate(i2s->op_clk);
535 return 0;
536 }
537 }
538
539 if (clk_id)
540 i2s->op_clk = clk_get(&i2s->pdev->dev,
541 "i2s_opclk1");
542 else
543 i2s->op_clk = clk_get(&i2s->pdev->dev,
544 "i2s_opclk0");
545
546 if (WARN_ON(IS_ERR(i2s->op_clk)))
547 return PTR_ERR(i2s->op_clk);
548
549 clk_prepare_enable(i2s->op_clk);
550 i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
551
552 /* Over-ride the other's */
553 if (other) {
554 other->op_clk = i2s->op_clk;
555 other->rclk_srcrate = i2s->rclk_srcrate;
556 }
557 } else if ((!clk_id && (mod & rsrc_mask))
558 || (clk_id && !(mod & rsrc_mask))) {
559 dev_err(&i2s->pdev->dev,
560 "%s:%d Other DAI busy\n", __func__, __LINE__);
561 return -EAGAIN;
562 } else {
563 /* Call can't be on the active DAI */
564 i2s->op_clk = other->op_clk;
565 i2s->rclk_srcrate = other->rclk_srcrate;
566 return 0;
567 }
568
569 if (clk_id == 1)
570 val = 1 << i2s_regs->rclksrc_off;
571 break;
572 default:
573 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
574 return -EINVAL;
575 }
576
577 spin_lock(i2s->lock);
578 mod = readl(i2s->addr + I2SMOD);
579 mod = (mod & ~mask) | val;
580 writel(mod, i2s->addr + I2SMOD);
581 spin_unlock(i2s->lock);
582
583 return 0;
584 }
585
586 static int i2s_set_fmt(struct snd_soc_dai *dai,
587 unsigned int fmt)
588 {
589 struct i2s_dai *i2s = to_info(dai);
590 int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
591 u32 mod, tmp = 0;
592
593 lrp_shift = i2s->variant_regs->lrp_off;
594 sdf_shift = i2s->variant_regs->sdf_off;
595 mod_slave = 1 << i2s->variant_regs->mss_off;
596
597 sdf_mask = MOD_SDF_MASK << sdf_shift;
598 lrp_rlow = MOD_LR_RLOW << lrp_shift;
599
600 /* Format is priority */
601 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
602 case SND_SOC_DAIFMT_RIGHT_J:
603 tmp |= lrp_rlow;
604 tmp |= (MOD_SDF_MSB << sdf_shift);
605 break;
606 case SND_SOC_DAIFMT_LEFT_J:
607 tmp |= lrp_rlow;
608 tmp |= (MOD_SDF_LSB << sdf_shift);
609 break;
610 case SND_SOC_DAIFMT_I2S:
611 tmp |= (MOD_SDF_IIS << sdf_shift);
612 break;
613 default:
614 dev_err(&i2s->pdev->dev, "Format not supported\n");
615 return -EINVAL;
616 }
617
618 /*
619 * INV flag is relative to the FORMAT flag - if set it simply
620 * flips the polarity specified by the Standard
621 */
622 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
623 case SND_SOC_DAIFMT_NB_NF:
624 break;
625 case SND_SOC_DAIFMT_NB_IF:
626 if (tmp & lrp_rlow)
627 tmp &= ~lrp_rlow;
628 else
629 tmp |= lrp_rlow;
630 break;
631 default:
632 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
633 return -EINVAL;
634 }
635
636 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
637 case SND_SOC_DAIFMT_CBM_CFM:
638 tmp |= mod_slave;
639 break;
640 case SND_SOC_DAIFMT_CBS_CFS:
641 /* Set default source clock in Master mode */
642 if (i2s->rclk_srcrate == 0)
643 i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
644 0, SND_SOC_CLOCK_IN);
645 break;
646 default:
647 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
648 return -EINVAL;
649 }
650
651 spin_lock(i2s->lock);
652 mod = readl(i2s->addr + I2SMOD);
653 /*
654 * Don't change the I2S mode if any controller is active on this
655 * channel.
656 */
657 if (any_active(i2s) &&
658 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
659 spin_unlock(i2s->lock);
660 dev_err(&i2s->pdev->dev,
661 "%s:%d Other DAI busy\n", __func__, __LINE__);
662 return -EAGAIN;
663 }
664
665 mod &= ~(sdf_mask | lrp_rlow | mod_slave);
666 mod |= tmp;
667 writel(mod, i2s->addr + I2SMOD);
668 spin_unlock(i2s->lock);
669
670 return 0;
671 }
672
673 static int i2s_hw_params(struct snd_pcm_substream *substream,
674 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
675 {
676 struct i2s_dai *i2s = to_info(dai);
677 u32 mod, mask = 0, val = 0;
678
679 if (!is_secondary(i2s))
680 mask |= (MOD_DC2_EN | MOD_DC1_EN);
681
682 switch (params_channels(params)) {
683 case 6:
684 val |= MOD_DC2_EN;
685 case 4:
686 val |= MOD_DC1_EN;
687 break;
688 case 2:
689 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
690 i2s->dma_playback.dma_size = 4;
691 else
692 i2s->dma_capture.dma_size = 4;
693 break;
694 case 1:
695 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
696 i2s->dma_playback.dma_size = 2;
697 else
698 i2s->dma_capture.dma_size = 2;
699
700 break;
701 default:
702 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
703 params_channels(params));
704 return -EINVAL;
705 }
706
707 if (is_secondary(i2s))
708 mask |= MOD_BLCS_MASK;
709 else
710 mask |= MOD_BLCP_MASK;
711
712 if (is_manager(i2s))
713 mask |= MOD_BLC_MASK;
714
715 switch (params_width(params)) {
716 case 8:
717 if (is_secondary(i2s))
718 val |= MOD_BLCS_8BIT;
719 else
720 val |= MOD_BLCP_8BIT;
721 if (is_manager(i2s))
722 val |= MOD_BLC_8BIT;
723 break;
724 case 16:
725 if (is_secondary(i2s))
726 val |= MOD_BLCS_16BIT;
727 else
728 val |= MOD_BLCP_16BIT;
729 if (is_manager(i2s))
730 val |= MOD_BLC_16BIT;
731 break;
732 case 24:
733 if (is_secondary(i2s))
734 val |= MOD_BLCS_24BIT;
735 else
736 val |= MOD_BLCP_24BIT;
737 if (is_manager(i2s))
738 val |= MOD_BLC_24BIT;
739 break;
740 default:
741 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
742 params_format(params));
743 return -EINVAL;
744 }
745
746 spin_lock(i2s->lock);
747 mod = readl(i2s->addr + I2SMOD);
748 mod = (mod & ~mask) | val;
749 writel(mod, i2s->addr + I2SMOD);
750 spin_unlock(i2s->lock);
751
752 samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
753
754 i2s->frmclk = params_rate(params);
755
756 return 0;
757 }
758
759 /* We set constraints on the substream acc to the version of I2S */
760 static int i2s_startup(struct snd_pcm_substream *substream,
761 struct snd_soc_dai *dai)
762 {
763 struct i2s_dai *i2s = to_info(dai);
764 struct i2s_dai *other = get_other_dai(i2s);
765 unsigned long flags;
766
767 spin_lock_irqsave(&lock, flags);
768
769 i2s->mode |= DAI_OPENED;
770
771 if (is_manager(other))
772 i2s->mode &= ~DAI_MANAGER;
773 else
774 i2s->mode |= DAI_MANAGER;
775
776 if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
777 writel(CON_RSTCLR, i2s->addr + I2SCON);
778
779 spin_unlock_irqrestore(&lock, flags);
780
781 return 0;
782 }
783
784 static void i2s_shutdown(struct snd_pcm_substream *substream,
785 struct snd_soc_dai *dai)
786 {
787 struct i2s_dai *i2s = to_info(dai);
788 struct i2s_dai *other = get_other_dai(i2s);
789 unsigned long flags;
790
791 spin_lock_irqsave(&lock, flags);
792
793 i2s->mode &= ~DAI_OPENED;
794 i2s->mode &= ~DAI_MANAGER;
795
796 if (is_opened(other))
797 other->mode |= DAI_MANAGER;
798
799 /* Reset any constraint on RFS and BFS */
800 i2s->rfs = 0;
801 i2s->bfs = 0;
802
803 spin_unlock_irqrestore(&lock, flags);
804 }
805
806 static int config_setup(struct i2s_dai *i2s)
807 {
808 struct i2s_dai *other = get_other_dai(i2s);
809 unsigned rfs, bfs, blc;
810 u32 psr;
811
812 blc = get_blc(i2s);
813
814 bfs = i2s->bfs;
815
816 if (!bfs && other)
817 bfs = other->bfs;
818
819 /* Select least possible multiple(2) if no constraint set */
820 if (!bfs)
821 bfs = blc * 2;
822
823 rfs = i2s->rfs;
824
825 if (!rfs && other)
826 rfs = other->rfs;
827
828 if ((rfs == 256 || rfs == 512) && (blc == 24)) {
829 dev_err(&i2s->pdev->dev,
830 "%d-RFS not supported for 24-blc\n", rfs);
831 return -EINVAL;
832 }
833
834 if (!rfs) {
835 if (bfs == 16 || bfs == 32)
836 rfs = 256;
837 else
838 rfs = 384;
839 }
840
841 /* If already setup and running */
842 if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
843 dev_err(&i2s->pdev->dev,
844 "%s:%d Other DAI busy\n", __func__, __LINE__);
845 return -EAGAIN;
846 }
847
848 set_bfs(i2s, bfs);
849 set_rfs(i2s, rfs);
850
851 /* Don't bother with PSR in Slave mode */
852 if (is_slave(i2s))
853 return 0;
854
855 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
856 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
857 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
858 dev_dbg(&i2s->pdev->dev,
859 "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
860 i2s->rclk_srcrate, psr, rfs, bfs);
861 }
862
863 return 0;
864 }
865
866 static int i2s_trigger(struct snd_pcm_substream *substream,
867 int cmd, struct snd_soc_dai *dai)
868 {
869 int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
870 struct snd_soc_pcm_runtime *rtd = substream->private_data;
871 struct i2s_dai *i2s = to_info(rtd->cpu_dai);
872 unsigned long flags;
873
874 switch (cmd) {
875 case SNDRV_PCM_TRIGGER_START:
876 case SNDRV_PCM_TRIGGER_RESUME:
877 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
878 spin_lock_irqsave(i2s->lock, flags);
879
880 if (config_setup(i2s)) {
881 spin_unlock_irqrestore(i2s->lock, flags);
882 return -EINVAL;
883 }
884
885 if (capture)
886 i2s_rxctrl(i2s, 1);
887 else
888 i2s_txctrl(i2s, 1);
889
890 spin_unlock_irqrestore(i2s->lock, flags);
891 break;
892 case SNDRV_PCM_TRIGGER_STOP:
893 case SNDRV_PCM_TRIGGER_SUSPEND:
894 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
895 spin_lock_irqsave(i2s->lock, flags);
896
897 if (capture) {
898 i2s_rxctrl(i2s, 0);
899 i2s_fifo(i2s, FIC_RXFLUSH);
900 } else {
901 i2s_txctrl(i2s, 0);
902 i2s_fifo(i2s, FIC_TXFLUSH);
903 }
904
905 spin_unlock_irqrestore(i2s->lock, flags);
906 break;
907 }
908
909 return 0;
910 }
911
912 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
913 int div_id, int div)
914 {
915 struct i2s_dai *i2s = to_info(dai);
916 struct i2s_dai *other = get_other_dai(i2s);
917
918 switch (div_id) {
919 case SAMSUNG_I2S_DIV_BCLK:
920 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
921 || (other && other->bfs && (other->bfs != div))) {
922 dev_err(&i2s->pdev->dev,
923 "%s:%d Other DAI busy\n", __func__, __LINE__);
924 return -EAGAIN;
925 }
926 i2s->bfs = div;
927 break;
928 default:
929 dev_err(&i2s->pdev->dev,
930 "Invalid clock divider(%d)\n", div_id);
931 return -EINVAL;
932 }
933
934 return 0;
935 }
936
937 static snd_pcm_sframes_t
938 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
939 {
940 struct i2s_dai *i2s = to_info(dai);
941 u32 reg = readl(i2s->addr + I2SFIC);
942 snd_pcm_sframes_t delay;
943 const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
944
945 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
946 delay = FIC_RXCOUNT(reg);
947 else if (is_secondary(i2s))
948 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
949 else
950 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
951
952 return delay;
953 }
954
955 #ifdef CONFIG_PM
956 static int i2s_suspend(struct snd_soc_dai *dai)
957 {
958 struct i2s_dai *i2s = to_info(dai);
959
960 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
961 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
962 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
963
964 return 0;
965 }
966
967 static int i2s_resume(struct snd_soc_dai *dai)
968 {
969 struct i2s_dai *i2s = to_info(dai);
970
971 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
972 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
973 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
974
975 return 0;
976 }
977 #else
978 #define i2s_suspend NULL
979 #define i2s_resume NULL
980 #endif
981
982 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
983 {
984 struct i2s_dai *i2s = to_info(dai);
985 struct i2s_dai *other = get_other_dai(i2s);
986 unsigned long flags;
987
988 if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
989 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
990 NULL);
991 } else {
992 samsung_asoc_init_dma_data(dai, &i2s->dma_playback,
993 &i2s->dma_capture);
994
995 if (i2s->quirks & QUIRK_NEED_RSTCLR)
996 writel(CON_RSTCLR, i2s->addr + I2SCON);
997
998 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
999 idma_reg_addr_init(i2s->addr,
1000 i2s->sec_dai->idma_playback.dma_addr);
1001 }
1002
1003 /* Reset any constraint on RFS and BFS */
1004 i2s->rfs = 0;
1005 i2s->bfs = 0;
1006 i2s->rclk_srcrate = 0;
1007
1008 spin_lock_irqsave(i2s->lock, flags);
1009 i2s_txctrl(i2s, 0);
1010 i2s_rxctrl(i2s, 0);
1011 i2s_fifo(i2s, FIC_TXFLUSH);
1012 i2s_fifo(other, FIC_TXFLUSH);
1013 i2s_fifo(i2s, FIC_RXFLUSH);
1014 spin_unlock_irqrestore(i2s->lock, flags);
1015
1016 /* Gate CDCLK by default */
1017 if (!is_opened(other))
1018 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1019 0, SND_SOC_CLOCK_IN);
1020
1021 return 0;
1022 }
1023
1024 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1025 {
1026 struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1027
1028 if (!is_secondary(i2s)) {
1029 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1030 spin_lock(i2s->lock);
1031 writel(0, i2s->addr + I2SCON);
1032 spin_unlock(i2s->lock);
1033 }
1034 }
1035
1036 return 0;
1037 }
1038
1039 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1040 .trigger = i2s_trigger,
1041 .hw_params = i2s_hw_params,
1042 .set_fmt = i2s_set_fmt,
1043 .set_clkdiv = i2s_set_clkdiv,
1044 .set_sysclk = i2s_set_sysclk,
1045 .startup = i2s_startup,
1046 .shutdown = i2s_shutdown,
1047 .delay = i2s_delay,
1048 };
1049
1050 static const struct snd_soc_component_driver samsung_i2s_component = {
1051 .name = "samsung-i2s",
1052 };
1053
1054 #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
1055
1056 #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
1057 SNDRV_PCM_FMTBIT_S16_LE | \
1058 SNDRV_PCM_FMTBIT_S24_LE)
1059
1060 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1061 {
1062 struct i2s_dai *i2s;
1063 int ret;
1064
1065 i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1066 if (i2s == NULL)
1067 return NULL;
1068
1069 i2s->pdev = pdev;
1070 i2s->pri_dai = NULL;
1071 i2s->sec_dai = NULL;
1072 i2s->i2s_dai_drv.symmetric_rates = 1;
1073 i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1074 i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1075 i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1076 i2s->i2s_dai_drv.suspend = i2s_suspend;
1077 i2s->i2s_dai_drv.resume = i2s_resume;
1078 i2s->i2s_dai_drv.playback.channels_min = 1;
1079 i2s->i2s_dai_drv.playback.channels_max = 2;
1080 i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1081 i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1082
1083 if (!sec) {
1084 i2s->i2s_dai_drv.capture.channels_min = 1;
1085 i2s->i2s_dai_drv.capture.channels_max = 2;
1086 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1087 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1088 dev_set_drvdata(&i2s->pdev->dev, i2s);
1089 } else { /* Create a new platform_device for Secondary */
1090 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1091 if (!i2s->pdev)
1092 return NULL;
1093
1094 i2s->pdev->dev.parent = &pdev->dev;
1095
1096 platform_set_drvdata(i2s->pdev, i2s);
1097 ret = platform_device_add(i2s->pdev);
1098 if (ret < 0)
1099 return NULL;
1100 }
1101
1102 return i2s;
1103 }
1104
1105 static const struct of_device_id exynos_i2s_match[];
1106
1107 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1108 struct platform_device *pdev)
1109 {
1110 if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) {
1111 const struct of_device_id *match;
1112 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1113 return match ? match->data : NULL;
1114 } else {
1115 return (struct samsung_i2s_dai_data *)
1116 platform_get_device_id(pdev)->driver_data;
1117 }
1118 }
1119
1120 #ifdef CONFIG_PM
1121 static int i2s_runtime_suspend(struct device *dev)
1122 {
1123 struct i2s_dai *i2s = dev_get_drvdata(dev);
1124
1125 clk_disable_unprepare(i2s->clk);
1126
1127 return 0;
1128 }
1129
1130 static int i2s_runtime_resume(struct device *dev)
1131 {
1132 struct i2s_dai *i2s = dev_get_drvdata(dev);
1133
1134 clk_prepare_enable(i2s->clk);
1135
1136 return 0;
1137 }
1138 #endif /* CONFIG_PM */
1139
1140 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1141 {
1142 int i;
1143
1144 for (i = 0; i < i2s->clk_data.clk_num; i++) {
1145 if (!IS_ERR(i2s->clk_table[i]))
1146 clk_unregister(i2s->clk_table[i]);
1147 }
1148 }
1149
1150 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1151 {
1152 struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1153
1154 of_clk_del_provider(pdev->dev.of_node);
1155 i2s_unregister_clocks(i2s);
1156 }
1157
1158 static int i2s_register_clock_provider(struct platform_device *pdev)
1159 {
1160 struct device *dev = &pdev->dev;
1161 struct i2s_dai *i2s = dev_get_drvdata(dev);
1162 const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1163 const char *p_names[2] = { NULL };
1164 const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1165 struct clk *rclksrc;
1166 int ret, i;
1167
1168 /* Register the clock provider only if it's expected in the DTB */
1169 if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1170 return 0;
1171
1172 /* Get the RCLKSRC mux clock parent clock names */
1173 for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1174 rclksrc = clk_get(dev, clk_name[i]);
1175 if (IS_ERR(rclksrc))
1176 continue;
1177 p_names[i] = __clk_get_name(rclksrc);
1178 clk_put(rclksrc);
1179 }
1180
1181 if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1182 /* Activate the prescaler */
1183 u32 val = readl(i2s->addr + I2SPSR);
1184 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1185
1186 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1187 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1188 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1189 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1190 1, 0, i2s->lock);
1191
1192 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1193 "i2s_presc", "i2s_rclksrc",
1194 CLK_SET_RATE_PARENT,
1195 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1196
1197 p_names[0] = "i2s_presc";
1198 i2s->clk_data.clk_num = 2;
1199 }
1200 of_property_read_string_index(dev->of_node,
1201 "clock-output-names", 0, &clk_name[0]);
1202
1203 i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1204 p_names[0], CLK_SET_RATE_PARENT,
1205 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1206 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1207
1208 i2s->clk_data.clk_num += 1;
1209 i2s->clk_data.clks = i2s->clk_table;
1210
1211 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1212 &i2s->clk_data);
1213 if (ret < 0) {
1214 dev_err(dev, "failed to add clock provider: %d\n", ret);
1215 i2s_unregister_clocks(i2s);
1216 }
1217
1218 return ret;
1219 }
1220
1221 static int samsung_i2s_probe(struct platform_device *pdev)
1222 {
1223 struct i2s_dai *pri_dai, *sec_dai = NULL;
1224 struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1225 struct samsung_i2s *i2s_cfg = NULL;
1226 struct resource *res;
1227 u32 regs_base, quirks = 0, idma_addr = 0;
1228 struct device_node *np = pdev->dev.of_node;
1229 const struct samsung_i2s_dai_data *i2s_dai_data;
1230 int ret;
1231
1232 /* Call during Seconday interface registration */
1233 i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1234
1235 if (i2s_dai_data->dai_type == TYPE_SEC) {
1236 sec_dai = dev_get_drvdata(&pdev->dev);
1237 if (!sec_dai) {
1238 dev_err(&pdev->dev, "Unable to get drvdata\n");
1239 return -EFAULT;
1240 }
1241 ret = devm_snd_soc_register_component(&sec_dai->pdev->dev,
1242 &samsung_i2s_component,
1243 &sec_dai->i2s_dai_drv, 1);
1244 if (ret != 0)
1245 return ret;
1246
1247 return samsung_asoc_dma_platform_register(&pdev->dev);
1248 }
1249
1250 pri_dai = i2s_alloc_dai(pdev, false);
1251 if (!pri_dai) {
1252 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1253 return -ENOMEM;
1254 }
1255
1256 spin_lock_init(&pri_dai->spinlock);
1257 pri_dai->lock = &pri_dai->spinlock;
1258
1259 if (!np) {
1260 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1261 if (!res) {
1262 dev_err(&pdev->dev,
1263 "Unable to get I2S-TX dma resource\n");
1264 return -ENXIO;
1265 }
1266 pri_dai->dma_playback.channel = res->start;
1267
1268 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1269 if (!res) {
1270 dev_err(&pdev->dev,
1271 "Unable to get I2S-RX dma resource\n");
1272 return -ENXIO;
1273 }
1274 pri_dai->dma_capture.channel = res->start;
1275
1276 if (i2s_pdata == NULL) {
1277 dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1278 return -EINVAL;
1279 }
1280
1281 if (&i2s_pdata->type)
1282 i2s_cfg = &i2s_pdata->type.i2s;
1283
1284 if (i2s_cfg) {
1285 quirks = i2s_cfg->quirks;
1286 idma_addr = i2s_cfg->idma_addr;
1287 }
1288 } else {
1289 quirks = i2s_dai_data->quirks;
1290 if (of_property_read_u32(np, "samsung,idma-addr",
1291 &idma_addr)) {
1292 if (quirks & QUIRK_SUPPORTS_IDMA) {
1293 dev_info(&pdev->dev, "idma address is not"\
1294 "specified");
1295 }
1296 }
1297 }
1298
1299 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1300 pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1301 if (IS_ERR(pri_dai->addr))
1302 return PTR_ERR(pri_dai->addr);
1303
1304 regs_base = res->start;
1305
1306 pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1307 if (IS_ERR(pri_dai->clk)) {
1308 dev_err(&pdev->dev, "Failed to get iis clock\n");
1309 return PTR_ERR(pri_dai->clk);
1310 }
1311
1312 ret = clk_prepare_enable(pri_dai->clk);
1313 if (ret != 0) {
1314 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1315 return ret;
1316 }
1317 pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1318 pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1319 pri_dai->dma_playback.ch_name = "tx";
1320 pri_dai->dma_capture.ch_name = "rx";
1321 pri_dai->dma_playback.dma_size = 4;
1322 pri_dai->dma_capture.dma_size = 4;
1323 pri_dai->quirks = quirks;
1324 pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1325
1326 if (quirks & QUIRK_PRI_6CHAN)
1327 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1328
1329 if (quirks & QUIRK_SEC_DAI) {
1330 sec_dai = i2s_alloc_dai(pdev, true);
1331 if (!sec_dai) {
1332 dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1333 return -ENOMEM;
1334 }
1335
1336 sec_dai->lock = &pri_dai->spinlock;
1337 sec_dai->variant_regs = pri_dai->variant_regs;
1338 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1339 sec_dai->dma_playback.ch_name = "tx-sec";
1340
1341 if (!np) {
1342 res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1343 if (res)
1344 sec_dai->dma_playback.channel = res->start;
1345 }
1346
1347 sec_dai->dma_playback.dma_size = 4;
1348 sec_dai->addr = pri_dai->addr;
1349 sec_dai->clk = pri_dai->clk;
1350 sec_dai->quirks = quirks;
1351 sec_dai->idma_playback.dma_addr = idma_addr;
1352 sec_dai->pri_dai = pri_dai;
1353 pri_dai->sec_dai = sec_dai;
1354 }
1355
1356 if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1357 dev_err(&pdev->dev, "Unable to configure gpio\n");
1358 return -EINVAL;
1359 }
1360
1361 devm_snd_soc_register_component(&pri_dai->pdev->dev,
1362 &samsung_i2s_component,
1363 &pri_dai->i2s_dai_drv, 1);
1364
1365 pm_runtime_enable(&pdev->dev);
1366
1367 ret = samsung_asoc_dma_platform_register(&pdev->dev);
1368 if (ret != 0)
1369 return ret;
1370
1371 return i2s_register_clock_provider(pdev);
1372 }
1373
1374 static int samsung_i2s_remove(struct platform_device *pdev)
1375 {
1376 struct i2s_dai *i2s, *other;
1377
1378 i2s = dev_get_drvdata(&pdev->dev);
1379 other = get_other_dai(i2s);
1380
1381 if (other) {
1382 other->pri_dai = NULL;
1383 other->sec_dai = NULL;
1384 } else {
1385 pm_runtime_disable(&pdev->dev);
1386 }
1387
1388 if (!is_secondary(i2s)) {
1389 i2s_unregister_clock_provider(pdev);
1390 clk_disable_unprepare(i2s->clk);
1391 }
1392
1393 i2s->pri_dai = NULL;
1394 i2s->sec_dai = NULL;
1395
1396 return 0;
1397 }
1398
1399 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1400 .bfs_off = 1,
1401 .rfs_off = 3,
1402 .sdf_off = 5,
1403 .txr_off = 8,
1404 .rclksrc_off = 10,
1405 .mss_off = 11,
1406 .cdclkcon_off = 12,
1407 .lrp_off = 7,
1408 .bfs_mask = 0x3,
1409 .rfs_mask = 0x3,
1410 .ftx0cnt_off = 8,
1411 };
1412
1413 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1414 .bfs_off = 0,
1415 .rfs_off = 4,
1416 .sdf_off = 6,
1417 .txr_off = 8,
1418 .rclksrc_off = 10,
1419 .mss_off = 11,
1420 .cdclkcon_off = 12,
1421 .lrp_off = 15,
1422 .bfs_mask = 0xf,
1423 .rfs_mask = 0x3,
1424 .ftx0cnt_off = 8,
1425 };
1426
1427 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1428 .bfs_off = 0,
1429 .rfs_off = 4,
1430 .sdf_off = 7,
1431 .txr_off = 9,
1432 .rclksrc_off = 11,
1433 .mss_off = 12,
1434 .cdclkcon_off = 22,
1435 .lrp_off = 15,
1436 .bfs_mask = 0xf,
1437 .rfs_mask = 0x7,
1438 .ftx0cnt_off = 0,
1439 };
1440
1441 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1442 .bfs_off = 0,
1443 .rfs_off = 3,
1444 .sdf_off = 6,
1445 .txr_off = 8,
1446 .rclksrc_off = 10,
1447 .mss_off = 11,
1448 .cdclkcon_off = 12,
1449 .lrp_off = 15,
1450 .bfs_mask = 0x7,
1451 .rfs_mask = 0x7,
1452 .ftx0cnt_off = 8,
1453 };
1454
1455 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1456 .dai_type = TYPE_PRI,
1457 .quirks = QUIRK_NO_MUXPSR,
1458 .i2s_variant_regs = &i2sv3_regs,
1459 };
1460
1461 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1462 .dai_type = TYPE_PRI,
1463 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1464 QUIRK_SUPPORTS_IDMA,
1465 .i2s_variant_regs = &i2sv3_regs,
1466 };
1467
1468 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1469 .dai_type = TYPE_PRI,
1470 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1471 QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1472 .i2s_variant_regs = &i2sv6_regs,
1473 };
1474
1475 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1476 .dai_type = TYPE_PRI,
1477 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1478 QUIRK_SUPPORTS_TDM,
1479 .i2s_variant_regs = &i2sv7_regs,
1480 };
1481
1482 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1483 .dai_type = TYPE_PRI,
1484 .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1485 .i2s_variant_regs = &i2sv5_i2s1_regs,
1486 };
1487
1488 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1489 .dai_type = TYPE_PRI,
1490 };
1491
1492 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1493 .dai_type = TYPE_SEC,
1494 };
1495
1496 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1497 {
1498 .name = "samsung-i2s",
1499 .driver_data = (kernel_ulong_t)&i2sv3_dai_type,
1500 }, {
1501 .name = "samsung-i2s-sec",
1502 .driver_data = (kernel_ulong_t)&samsung_dai_type_sec,
1503 }, {
1504 .name = "samsung-i2sv4",
1505 .driver_data = (kernel_ulong_t)&i2sv5_dai_type,
1506 },
1507 {},
1508 };
1509 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1510
1511 #ifdef CONFIG_OF
1512 static const struct of_device_id exynos_i2s_match[] = {
1513 {
1514 .compatible = "samsung,s3c6410-i2s",
1515 .data = &i2sv3_dai_type,
1516 }, {
1517 .compatible = "samsung,s5pv210-i2s",
1518 .data = &i2sv5_dai_type,
1519 }, {
1520 .compatible = "samsung,exynos5420-i2s",
1521 .data = &i2sv6_dai_type,
1522 }, {
1523 .compatible = "samsung,exynos7-i2s",
1524 .data = &i2sv7_dai_type,
1525 }, {
1526 .compatible = "samsung,exynos7-i2s1",
1527 .data = &i2sv5_dai_type_i2s1,
1528 },
1529 {},
1530 };
1531 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1532 #endif
1533
1534 static const struct dev_pm_ops samsung_i2s_pm = {
1535 SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1536 i2s_runtime_resume, NULL)
1537 };
1538
1539 static struct platform_driver samsung_i2s_driver = {
1540 .probe = samsung_i2s_probe,
1541 .remove = samsung_i2s_remove,
1542 .id_table = samsung_i2s_driver_ids,
1543 .driver = {
1544 .name = "samsung-i2s",
1545 .of_match_table = of_match_ptr(exynos_i2s_match),
1546 .pm = &samsung_i2s_pm,
1547 },
1548 };
1549
1550 module_platform_driver(samsung_i2s_driver);
1551
1552 /* Module information */
1553 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1554 MODULE_DESCRIPTION("Samsung I2S Interface");
1555 MODULE_ALIAS("platform:samsung-i2s");
1556 MODULE_LICENSE("GPL");
Linux with added FPC-III support