2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
16 #include <linux/proc_fs.h>
17 #include <linux/seq_file.h>
18 #include <linux/rwsem.h>
19 #include <linux/kprobes.h>
20 #include <linux/sched.h>
21 #include <linux/hardirq.h>
22 #include <linux/uaccess.h>
23 #include <linux/smp.h>
24 #include <linux/cdev.h>
25 #include <linux/compat.h>
26 #include <asm/hardwall.h>
27 #include <asm/traps.h>
28 #include <asm/siginfo.h>
29 #include <asm/irq_regs.h>
31 #include <arch/interrupts.h>
32 #include <arch/spr_def.h>
36 * Implement a per-cpu "hardwall" resource class such as UDN or IPI.
37 * We use "hardwall" nomenclature throughout for historical reasons.
38 * The lock here controls access to the list data structure as well as
39 * to the items on the list.
41 struct hardwall_type
{
47 struct list_head list
;
49 struct proc_dir_entry
*proc_dir
;
61 static struct hardwall_type hardwall_types
[] = {
62 { /* user-space access to UDN */
68 LIST_HEAD_INIT(hardwall_types
[HARDWALL_UDN
].list
),
69 __SPIN_LOCK_UNLOCKED(hardwall_types
[HARDWALL_UDN
].lock
),
73 { /* user-space access to IDN */
77 1, /* disabled pending hypervisor support */
79 LIST_HEAD_INIT(hardwall_types
[HARDWALL_IDN
].list
),
80 __SPIN_LOCK_UNLOCKED(hardwall_types
[HARDWALL_IDN
].lock
),
83 { /* access to user-space IPI */
89 LIST_HEAD_INIT(hardwall_types
[HARDWALL_IPI
].list
),
90 __SPIN_LOCK_UNLOCKED(hardwall_types
[HARDWALL_IPI
].lock
),
97 * This data structure tracks the cpu data, etc., associated
98 * one-to-one with a "struct file *" from opening a hardwall device file.
99 * Note that the file's private data points back to this structure.
101 struct hardwall_info
{
102 struct list_head list
; /* for hardwall_types.list */
103 struct list_head task_head
; /* head of tasks in this hardwall */
104 struct hardwall_type
*type
; /* type of this resource */
105 struct cpumask cpumask
; /* cpus reserved */
106 int id
; /* integer id for this hardwall */
107 int teardown_in_progress
; /* are we tearing this one down? */
109 /* Remaining fields only valid for user-network resources. */
110 int ulhc_x
; /* upper left hand corner x coord */
111 int ulhc_y
; /* upper left hand corner y coord */
112 int width
; /* rectangle width */
113 int height
; /* rectangle height */
114 #if CHIP_HAS_REV1_XDN()
115 atomic_t xdn_pending_count
; /* cores in phase 1 of drain */
120 /* /proc/tile/hardwall */
121 static struct proc_dir_entry
*hardwall_proc_dir
;
123 /* Functions to manage files in /proc/tile/hardwall. */
124 static void hardwall_add_proc(struct hardwall_info
*);
125 static void hardwall_remove_proc(struct hardwall_info
*);
127 /* Allow disabling UDN access. */
128 static int __init
noudn(char *str
)
130 pr_info("User-space UDN access is disabled\n");
131 hardwall_types
[HARDWALL_UDN
].disabled
= 1;
134 early_param("noudn", noudn
);
137 /* Allow disabling IDN access. */
138 static int __init
noidn(char *str
)
140 pr_info("User-space IDN access is disabled\n");
141 hardwall_types
[HARDWALL_IDN
].disabled
= 1;
144 early_param("noidn", noidn
);
146 /* Allow disabling IPI access. */
147 static int __init
noipi(char *str
)
149 pr_info("User-space IPI access is disabled\n");
150 hardwall_types
[HARDWALL_IPI
].disabled
= 1;
153 early_param("noipi", noipi
);
158 * Low-level primitives for UDN/IDN
162 #define mtspr_XDN(hwt, name, val) \
163 do { (void)(hwt); __insn_mtspr(SPR_UDN_##name, (val)); } while (0)
164 #define mtspr_MPL_XDN(hwt, name, val) \
165 do { (void)(hwt); __insn_mtspr(SPR_MPL_UDN_##name, (val)); } while (0)
166 #define mfspr_XDN(hwt, name) \
167 ((void)(hwt), __insn_mfspr(SPR_UDN_##name))
169 #define mtspr_XDN(hwt, name, val) \
172 __insn_mtspr(SPR_IDN_##name, (val)); \
174 __insn_mtspr(SPR_UDN_##name, (val)); \
176 #define mtspr_MPL_XDN(hwt, name, val) \
179 __insn_mtspr(SPR_MPL_IDN_##name, (val)); \
181 __insn_mtspr(SPR_MPL_UDN_##name, (val)); \
183 #define mfspr_XDN(hwt, name) \
184 ((hwt)->is_idn ? __insn_mfspr(SPR_IDN_##name) : __insn_mfspr(SPR_UDN_##name))
187 /* Set a CPU bit if the CPU is online. */
188 #define cpu_online_set(cpu, dst) do { \
189 if (cpu_online(cpu)) \
190 cpumask_set_cpu(cpu, dst); \
194 /* Does the given rectangle contain the given x,y coordinate? */
195 static int contains(struct hardwall_info
*r
, int x
, int y
)
197 return (x
>= r
->ulhc_x
&& x
< r
->ulhc_x
+ r
->width
) &&
198 (y
>= r
->ulhc_y
&& y
< r
->ulhc_y
+ r
->height
);
201 /* Compute the rectangle parameters and validate the cpumask. */
202 static int check_rectangle(struct hardwall_info
*r
, struct cpumask
*mask
)
204 int x
, y
, cpu
, ulhc
, lrhc
;
206 /* The first cpu is the ULHC, the last the LRHC. */
207 ulhc
= find_first_bit(cpumask_bits(mask
), nr_cpumask_bits
);
208 lrhc
= find_last_bit(cpumask_bits(mask
), nr_cpumask_bits
);
210 /* Compute the rectangle attributes from the cpus. */
211 r
->ulhc_x
= cpu_x(ulhc
);
212 r
->ulhc_y
= cpu_y(ulhc
);
213 r
->width
= cpu_x(lrhc
) - r
->ulhc_x
+ 1;
214 r
->height
= cpu_y(lrhc
) - r
->ulhc_y
+ 1;
216 /* Width and height must be positive */
217 if (r
->width
<= 0 || r
->height
<= 0)
220 /* Confirm that the cpumask is exactly the rectangle. */
221 for (y
= 0, cpu
= 0; y
< smp_height
; ++y
)
222 for (x
= 0; x
< smp_width
; ++x
, ++cpu
)
223 if (cpumask_test_cpu(cpu
, mask
) != contains(r
, x
, y
))
227 * Note that offline cpus can't be drained when this user network
228 * rectangle eventually closes. We used to detect this
229 * situation and print a warning, but it annoyed users and
230 * they ignored it anyway, so now we just return without a
237 * Hardware management of hardwall setup, teardown, trapping,
238 * and enabling/disabling PL0 access to the networks.
241 /* Bit field values to mask together for writes to SPR_XDN_DIRECTION_PROTECT */
242 enum direction_protect
{
243 N_PROTECT
= (1 << 0),
244 E_PROTECT
= (1 << 1),
245 S_PROTECT
= (1 << 2),
246 W_PROTECT
= (1 << 3),
247 C_PROTECT
= (1 << 4),
250 static inline int xdn_which_interrupt(struct hardwall_type
*hwt
)
254 return INT_IDN_FIREWALL
;
256 return INT_UDN_FIREWALL
;
259 static void enable_firewall_interrupts(struct hardwall_type
*hwt
)
261 arch_local_irq_unmask_now(xdn_which_interrupt(hwt
));
264 static void disable_firewall_interrupts(struct hardwall_type
*hwt
)
266 arch_local_irq_mask_now(xdn_which_interrupt(hwt
));
269 /* Set up hardwall on this cpu based on the passed hardwall_info. */
270 static void hardwall_setup_func(void *info
)
272 struct hardwall_info
*r
= info
;
273 struct hardwall_type
*hwt
= r
->type
;
275 int cpu
= smp_processor_id(); /* on_each_cpu disables preemption */
281 if (x
== r
->ulhc_x
+ r
->width
- 1)
285 if (y
== r
->ulhc_y
+ r
->height
- 1)
288 mtspr_XDN(hwt
, DIRECTION_PROTECT
, bits
);
289 enable_firewall_interrupts(hwt
);
292 /* Set up all cpus on edge of rectangle to enable/disable hardwall SPRs. */
293 static void hardwall_protect_rectangle(struct hardwall_info
*r
)
295 int x
, y
, cpu
, delta
;
296 struct cpumask rect_cpus
;
298 cpumask_clear(&rect_cpus
);
300 /* First include the top and bottom edges */
301 cpu
= r
->ulhc_y
* smp_width
+ r
->ulhc_x
;
302 delta
= (r
->height
- 1) * smp_width
;
303 for (x
= 0; x
< r
->width
; ++x
, ++cpu
) {
304 cpu_online_set(cpu
, &rect_cpus
);
305 cpu_online_set(cpu
+ delta
, &rect_cpus
);
308 /* Then the left and right edges */
310 delta
= r
->width
- 1;
311 for (y
= 0; y
< r
->height
; ++y
, cpu
+= smp_width
) {
312 cpu_online_set(cpu
, &rect_cpus
);
313 cpu_online_set(cpu
+ delta
, &rect_cpus
);
316 /* Then tell all the cpus to set up their protection SPR */
317 on_each_cpu_mask(&rect_cpus
, hardwall_setup_func
, r
, 1);
320 /* Entered from INT_xDN_FIREWALL interrupt vector with irqs disabled. */
321 void __kprobes
do_hardwall_trap(struct pt_regs
* regs
, int fault_num
)
323 struct hardwall_info
*rect
;
324 struct hardwall_type
*hwt
;
325 struct task_struct
*p
;
327 int cpu
= smp_processor_id();
329 struct pt_regs
*old_regs
= set_irq_regs(regs
);
333 /* Figure out which network trapped. */
336 case INT_IDN_FIREWALL
:
337 hwt
= &hardwall_types
[HARDWALL_IDN
];
340 case INT_UDN_FIREWALL
:
341 hwt
= &hardwall_types
[HARDWALL_UDN
];
346 BUG_ON(hwt
->disabled
);
348 /* This tile trapped a network access; find the rectangle. */
349 spin_lock(&hwt
->lock
);
350 list_for_each_entry(rect
, &hwt
->list
, list
) {
351 if (cpumask_test_cpu(cpu
, &rect
->cpumask
))
356 * It shouldn't be possible not to find this cpu on the
357 * rectangle list, since only cpus in rectangles get hardwalled.
358 * The hardwall is only removed after the user network is drained.
360 BUG_ON(&rect
->list
== &hwt
->list
);
363 * If we already started teardown on this hardwall, don't worry;
364 * the abort signal has been sent and we are just waiting for things
367 if (rect
->teardown_in_progress
) {
368 pr_notice("cpu %d: detected %s hardwall violation %#lx while teardown already in progress\n",
370 (long)mfspr_XDN(hwt
, DIRECTION_PROTECT
));
375 * Kill off any process that is activated in this rectangle.
376 * We bypass security to deliver the signal, since it must be
377 * one of the activated processes that generated the user network
378 * message that caused this trap, and all the activated
379 * processes shared a single open file so are pretty tightly
380 * bound together from a security point of view to begin with.
382 rect
->teardown_in_progress
= 1;
383 wmb(); /* Ensure visibility of rectangle before notifying processes. */
384 pr_notice("cpu %d: detected %s hardwall violation %#lx...\n",
385 cpu
, hwt
->name
, (long)mfspr_XDN(hwt
, DIRECTION_PROTECT
));
386 info
.si_signo
= SIGILL
;
388 info
.si_code
= ILL_HARDWALL
;
390 list_for_each_entry(p
, &rect
->task_head
,
391 thread
.hardwall
[hwt
->index
].list
) {
392 BUG_ON(p
->thread
.hardwall
[hwt
->index
].info
!= rect
);
393 if (!(p
->flags
& PF_EXITING
)) {
395 pr_notice("hardwall: killing %d\n", p
->pid
);
396 do_send_sig_info(info
.si_signo
, &info
, p
, false);
399 if (!found_processes
)
400 pr_notice("hardwall: no associated processes!\n");
403 spin_unlock(&hwt
->lock
);
406 * We have to disable firewall interrupts now, or else when we
407 * return from this handler, we will simply re-interrupt back to
408 * it. However, we can't clear the protection bits, since we
409 * haven't yet drained the network, and that would allow packets
410 * to cross out of the hardwall region.
412 disable_firewall_interrupts(hwt
);
415 set_irq_regs(old_regs
);
418 /* Allow access from user space to the user network. */
419 void grant_hardwall_mpls(struct hardwall_type
*hwt
)
423 __insn_mtspr(SPR_MPL_IPI_0_SET_0
, 1);
427 mtspr_MPL_XDN(hwt
, ACCESS_SET_0
, 1);
428 mtspr_MPL_XDN(hwt
, AVAIL_SET_0
, 1);
429 mtspr_MPL_XDN(hwt
, COMPLETE_SET_0
, 1);
430 mtspr_MPL_XDN(hwt
, TIMER_SET_0
, 1);
431 #if !CHIP_HAS_REV1_XDN()
432 mtspr_MPL_XDN(hwt
, REFILL_SET_0
, 1);
433 mtspr_MPL_XDN(hwt
, CA_SET_0
, 1);
437 /* Deny access from user space to the user network. */
438 void restrict_hardwall_mpls(struct hardwall_type
*hwt
)
442 __insn_mtspr(SPR_MPL_IPI_0_SET_1
, 1);
446 mtspr_MPL_XDN(hwt
, ACCESS_SET_1
, 1);
447 mtspr_MPL_XDN(hwt
, AVAIL_SET_1
, 1);
448 mtspr_MPL_XDN(hwt
, COMPLETE_SET_1
, 1);
449 mtspr_MPL_XDN(hwt
, TIMER_SET_1
, 1);
450 #if !CHIP_HAS_REV1_XDN()
451 mtspr_MPL_XDN(hwt
, REFILL_SET_1
, 1);
452 mtspr_MPL_XDN(hwt
, CA_SET_1
, 1);
456 /* Restrict or deny as necessary for the task we're switching to. */
457 void hardwall_switch_tasks(struct task_struct
*prev
,
458 struct task_struct
*next
)
461 for (i
= 0; i
< HARDWALL_TYPES
; ++i
) {
462 if (prev
->thread
.hardwall
[i
].info
!= NULL
) {
463 if (next
->thread
.hardwall
[i
].info
== NULL
)
464 restrict_hardwall_mpls(&hardwall_types
[i
]);
465 } else if (next
->thread
.hardwall
[i
].info
!= NULL
) {
466 grant_hardwall_mpls(&hardwall_types
[i
]);
471 /* Does this task have the right to IPI the given cpu? */
472 int hardwall_ipi_valid(int cpu
)
475 struct hardwall_info
*info
=
476 current
->thread
.hardwall
[HARDWALL_IPI
].info
;
477 return info
&& cpumask_test_cpu(cpu
, &info
->cpumask
);
484 * Code to create, activate, deactivate, and destroy hardwall resources.
487 /* Create a hardwall for the given resource */
488 static struct hardwall_info
*hardwall_create(struct hardwall_type
*hwt
,
490 const unsigned char __user
*bits
)
492 struct hardwall_info
*iter
, *info
;
497 /* Reject crazy sizes out of hand, a la sys_mbind(). */
498 if (size
> PAGE_SIZE
)
499 return ERR_PTR(-EINVAL
);
501 /* Copy whatever fits into a cpumask. */
502 if (copy_from_user(&mask
, bits
, min(sizeof(struct cpumask
), size
)))
503 return ERR_PTR(-EFAULT
);
506 * If the size was short, clear the rest of the mask;
507 * otherwise validate that the rest of the user mask was zero
508 * (we don't try hard to be efficient when validating huge masks).
510 if (size
< sizeof(struct cpumask
)) {
511 memset((char *)&mask
+ size
, 0, sizeof(struct cpumask
) - size
);
512 } else if (size
> sizeof(struct cpumask
)) {
514 for (i
= sizeof(struct cpumask
); i
< size
; ++i
) {
516 if (get_user(c
, &bits
[i
]))
517 return ERR_PTR(-EFAULT
);
519 return ERR_PTR(-EINVAL
);
523 /* Allocate a new hardwall_info optimistically. */
524 info
= kmalloc(sizeof(struct hardwall_info
),
525 GFP_KERNEL
| __GFP_ZERO
);
527 return ERR_PTR(-ENOMEM
);
528 INIT_LIST_HEAD(&info
->task_head
);
531 /* Compute the rectangle size and validate that it's plausible. */
532 cpumask_copy(&info
->cpumask
, &mask
);
533 info
->id
= find_first_bit(cpumask_bits(&mask
), nr_cpumask_bits
);
535 rc
= check_rectangle(info
, &mask
);
543 * Eliminate cpus that are not part of this Linux client.
544 * Note that this allows for configurations that we might not want to
545 * support, such as one client on every even cpu, another client on
548 cpumask_and(&info
->cpumask
, &info
->cpumask
, cpu_online_mask
);
550 /* Confirm it doesn't overlap and add it to the list. */
551 spin_lock_irqsave(&hwt
->lock
, flags
);
552 list_for_each_entry(iter
, &hwt
->list
, list
) {
553 if (cpumask_intersects(&iter
->cpumask
, &info
->cpumask
)) {
554 spin_unlock_irqrestore(&hwt
->lock
, flags
);
556 return ERR_PTR(-EBUSY
);
559 list_add_tail(&info
->list
, &hwt
->list
);
560 spin_unlock_irqrestore(&hwt
->lock
, flags
);
562 /* Set up appropriate hardwalling on all affected cpus. */
564 hardwall_protect_rectangle(info
);
566 /* Create a /proc/tile/hardwall entry. */
567 hardwall_add_proc(info
);
572 /* Activate a given hardwall on this cpu for this process. */
573 static int hardwall_activate(struct hardwall_info
*info
)
577 struct task_struct
*p
= current
;
578 struct thread_struct
*ts
= &p
->thread
;
579 struct hardwall_type
*hwt
;
581 /* Require a hardwall. */
585 /* Not allowed to activate a hardwall that is being torn down. */
586 if (info
->teardown_in_progress
)
590 * Get our affinity; if we're not bound to this tile uniquely,
591 * we can't access the network registers.
593 if (cpumask_weight(&p
->cpus_allowed
) != 1)
596 /* Make sure we are bound to a cpu assigned to this resource. */
597 cpu
= smp_processor_id();
598 BUG_ON(cpumask_first(&p
->cpus_allowed
) != cpu
);
599 if (!cpumask_test_cpu(cpu
, &info
->cpumask
))
602 /* If we are already bound to this hardwall, it's a no-op. */
604 if (ts
->hardwall
[hwt
->index
].info
) {
605 BUG_ON(ts
->hardwall
[hwt
->index
].info
!= info
);
609 /* Success! This process gets to use the resource on this cpu. */
610 ts
->hardwall
[hwt
->index
].info
= info
;
611 spin_lock_irqsave(&hwt
->lock
, flags
);
612 list_add(&ts
->hardwall
[hwt
->index
].list
, &info
->task_head
);
613 spin_unlock_irqrestore(&hwt
->lock
, flags
);
614 grant_hardwall_mpls(hwt
);
615 printk(KERN_DEBUG
"Pid %d (%s) activated for %s hardwall: cpu %d\n",
616 p
->pid
, p
->comm
, hwt
->name
, cpu
);
621 * Deactivate a task's hardwall. Must hold lock for hardwall_type.
622 * This method may be called from exit_thread(), so we don't want to
623 * rely on too many fields of struct task_struct still being valid.
624 * We assume the cpus_allowed, pid, and comm fields are still valid.
626 static void _hardwall_deactivate(struct hardwall_type
*hwt
,
627 struct task_struct
*task
)
629 struct thread_struct
*ts
= &task
->thread
;
631 if (cpumask_weight(&task
->cpus_allowed
) != 1) {
632 pr_err("pid %d (%s) releasing %s hardwall with an affinity mask containing %d cpus!\n",
633 task
->pid
, task
->comm
, hwt
->name
,
634 cpumask_weight(&task
->cpus_allowed
));
638 BUG_ON(ts
->hardwall
[hwt
->index
].info
== NULL
);
639 ts
->hardwall
[hwt
->index
].info
= NULL
;
640 list_del(&ts
->hardwall
[hwt
->index
].list
);
642 restrict_hardwall_mpls(hwt
);
645 /* Deactivate a task's hardwall. */
646 static int hardwall_deactivate(struct hardwall_type
*hwt
,
647 struct task_struct
*task
)
652 spin_lock_irqsave(&hwt
->lock
, flags
);
653 activated
= (task
->thread
.hardwall
[hwt
->index
].info
!= NULL
);
655 _hardwall_deactivate(hwt
, task
);
656 spin_unlock_irqrestore(&hwt
->lock
, flags
);
661 printk(KERN_DEBUG
"Pid %d (%s) deactivated for %s hardwall: cpu %d\n",
662 task
->pid
, task
->comm
, hwt
->name
, raw_smp_processor_id());
666 void hardwall_deactivate_all(struct task_struct
*task
)
669 for (i
= 0; i
< HARDWALL_TYPES
; ++i
)
670 if (task
->thread
.hardwall
[i
].info
)
671 hardwall_deactivate(&hardwall_types
[i
], task
);
674 /* Stop the switch before draining the network. */
675 static void stop_xdn_switch(void *arg
)
677 #if !CHIP_HAS_REV1_XDN()
678 /* Freeze the switch and the demux. */
679 __insn_mtspr(SPR_UDN_SP_FREEZE
,
680 SPR_UDN_SP_FREEZE__SP_FRZ_MASK
|
681 SPR_UDN_SP_FREEZE__DEMUX_FRZ_MASK
|
682 SPR_UDN_SP_FREEZE__NON_DEST_EXT_MASK
);
685 * Drop all packets bound for the core or off the edge.
686 * We rely on the normal hardwall protection setup code
687 * to have set the low four bits to trigger firewall interrupts,
688 * and shift those bits up to trigger "drop on send" semantics,
689 * plus adding "drop on send to core" for all switches.
690 * In practice it seems the switches latch the DIRECTION_PROTECT
691 * SPR so they won't start dropping if they're already
692 * delivering the last message to the core, but it doesn't
693 * hurt to enable it here.
695 struct hardwall_type
*hwt
= arg
;
696 unsigned long protect
= mfspr_XDN(hwt
, DIRECTION_PROTECT
);
697 mtspr_XDN(hwt
, DIRECTION_PROTECT
, (protect
| C_PROTECT
) << 5);
701 static void empty_xdn_demuxes(struct hardwall_type
*hwt
)
705 while (__insn_mfspr(SPR_IDN_DATA_AVAIL
) & (1 << 0))
706 (void) __tile_idn0_receive();
707 while (__insn_mfspr(SPR_IDN_DATA_AVAIL
) & (1 << 1))
708 (void) __tile_idn1_receive();
712 while (__insn_mfspr(SPR_UDN_DATA_AVAIL
) & (1 << 0))
713 (void) __tile_udn0_receive();
714 while (__insn_mfspr(SPR_UDN_DATA_AVAIL
) & (1 << 1))
715 (void) __tile_udn1_receive();
716 while (__insn_mfspr(SPR_UDN_DATA_AVAIL
) & (1 << 2))
717 (void) __tile_udn2_receive();
718 while (__insn_mfspr(SPR_UDN_DATA_AVAIL
) & (1 << 3))
719 (void) __tile_udn3_receive();
722 /* Drain all the state from a stopped switch. */
723 static void drain_xdn_switch(void *arg
)
725 struct hardwall_info
*info
= arg
;
726 struct hardwall_type
*hwt
= info
->type
;
728 #if CHIP_HAS_REV1_XDN()
730 * The switches have been configured to drop any messages
731 * destined for cores (or off the edge of the rectangle).
732 * But the current message may continue to be delivered,
733 * so we wait until all the cores have finished any pending
734 * messages before we stop draining.
736 int pending
= mfspr_XDN(hwt
, PENDING
);
738 empty_xdn_demuxes(hwt
);
744 atomic_dec(&info
->xdn_pending_count
);
745 while (atomic_read(&info
->xdn_pending_count
))
746 empty_xdn_demuxes(hwt
);
749 int from_tile_words
, ca_count
;
751 /* Empty out the 5 switch point fifos. */
752 for (i
= 0; i
< 5; i
++) {
754 __insn_mtspr(SPR_UDN_SP_FIFO_SEL
, i
);
755 words
= __insn_mfspr(SPR_UDN_SP_STATE
) & 0xF;
756 for (j
= 0; j
< words
; j
++)
757 (void) __insn_mfspr(SPR_UDN_SP_FIFO_DATA
);
758 BUG_ON((__insn_mfspr(SPR_UDN_SP_STATE
) & 0xF) != 0);
761 /* Dump out the 3 word fifo at top. */
762 from_tile_words
= (__insn_mfspr(SPR_UDN_DEMUX_STATUS
) >> 10) & 0x3;
763 for (i
= 0; i
< from_tile_words
; i
++)
764 (void) __insn_mfspr(SPR_UDN_DEMUX_WRITE_FIFO
);
766 /* Empty out demuxes. */
767 empty_xdn_demuxes(hwt
);
769 /* Empty out catch all. */
770 ca_count
= __insn_mfspr(SPR_UDN_DEMUX_CA_COUNT
);
771 for (i
= 0; i
< ca_count
; i
++)
772 (void) __insn_mfspr(SPR_UDN_CA_DATA
);
773 BUG_ON(__insn_mfspr(SPR_UDN_DEMUX_CA_COUNT
) != 0);
775 /* Clear demux logic. */
776 __insn_mtspr(SPR_UDN_DEMUX_CTL
, 1);
779 * Write switch state; experimentation indicates that 0xc3000
780 * is an idle switch point.
782 for (i
= 0; i
< 5; i
++) {
783 __insn_mtspr(SPR_UDN_SP_FIFO_SEL
, i
);
784 __insn_mtspr(SPR_UDN_SP_STATE
, 0xc3000);
789 /* Reset random XDN state registers at boot up and during hardwall teardown. */
790 static void reset_xdn_network_state(struct hardwall_type
*hwt
)
795 /* Clear out other random registers so we have a clean slate. */
796 mtspr_XDN(hwt
, DIRECTION_PROTECT
, 0);
797 mtspr_XDN(hwt
, AVAIL_EN
, 0);
798 mtspr_XDN(hwt
, DEADLOCK_TIMEOUT
, 0);
800 #if !CHIP_HAS_REV1_XDN()
801 /* Reset UDN coordinates to their standard value */
803 unsigned int cpu
= smp_processor_id();
804 unsigned int x
= cpu_x(cpu
);
805 unsigned int y
= cpu_y(cpu
);
806 __insn_mtspr(SPR_UDN_TILE_COORD
, (x
<< 18) | (y
<< 7));
809 /* Set demux tags to predefined values and enable them. */
810 __insn_mtspr(SPR_UDN_TAG_VALID
, 0xf);
811 __insn_mtspr(SPR_UDN_TAG_0
, (1 << 0));
812 __insn_mtspr(SPR_UDN_TAG_1
, (1 << 1));
813 __insn_mtspr(SPR_UDN_TAG_2
, (1 << 2));
814 __insn_mtspr(SPR_UDN_TAG_3
, (1 << 3));
816 /* Set other rev0 random registers to a clean state. */
817 __insn_mtspr(SPR_UDN_REFILL_EN
, 0);
818 __insn_mtspr(SPR_UDN_DEMUX_QUEUE_SEL
, 0);
819 __insn_mtspr(SPR_UDN_SP_FIFO_SEL
, 0);
821 /* Start the switch and demux. */
822 __insn_mtspr(SPR_UDN_SP_FREEZE
, 0);
826 void reset_network_state(void)
828 reset_xdn_network_state(&hardwall_types
[HARDWALL_UDN
]);
830 reset_xdn_network_state(&hardwall_types
[HARDWALL_IDN
]);
834 /* Restart an XDN switch after draining. */
835 static void restart_xdn_switch(void *arg
)
837 struct hardwall_type
*hwt
= arg
;
839 #if CHIP_HAS_REV1_XDN()
840 /* One last drain step to avoid races with injection and draining. */
841 empty_xdn_demuxes(hwt
);
844 reset_xdn_network_state(hwt
);
846 /* Disable firewall interrupts. */
847 disable_firewall_interrupts(hwt
);
850 /* Last reference to a hardwall is gone, so clear the network. */
851 static void hardwall_destroy(struct hardwall_info
*info
)
853 struct task_struct
*task
;
854 struct hardwall_type
*hwt
;
857 /* Make sure this file actually represents a hardwall. */
862 * Deactivate any remaining tasks. It's possible to race with
863 * some other thread that is exiting and hasn't yet called
864 * deactivate (when freeing its thread_info), so we carefully
865 * deactivate any remaining tasks before freeing the
866 * hardwall_info object itself.
869 info
->teardown_in_progress
= 1;
870 spin_lock_irqsave(&hwt
->lock
, flags
);
871 list_for_each_entry(task
, &info
->task_head
,
872 thread
.hardwall
[hwt
->index
].list
)
873 _hardwall_deactivate(hwt
, task
);
874 spin_unlock_irqrestore(&hwt
->lock
, flags
);
877 /* Configure the switches for draining the user network. */
879 "Clearing %s hardwall rectangle %dx%d %d,%d\n",
880 hwt
->name
, info
->width
, info
->height
,
881 info
->ulhc_x
, info
->ulhc_y
);
882 on_each_cpu_mask(&info
->cpumask
, stop_xdn_switch
, hwt
, 1);
884 /* Drain the network. */
885 #if CHIP_HAS_REV1_XDN()
886 atomic_set(&info
->xdn_pending_count
,
887 cpumask_weight(&info
->cpumask
));
888 on_each_cpu_mask(&info
->cpumask
, drain_xdn_switch
, info
, 0);
890 on_each_cpu_mask(&info
->cpumask
, drain_xdn_switch
, info
, 1);
893 /* Restart switch and disable firewall. */
894 on_each_cpu_mask(&info
->cpumask
, restart_xdn_switch
, hwt
, 1);
897 /* Remove the /proc/tile/hardwall entry. */
898 hardwall_remove_proc(info
);
900 /* Now free the hardwall from the list. */
901 spin_lock_irqsave(&hwt
->lock
, flags
);
902 BUG_ON(!list_empty(&info
->task_head
));
903 list_del(&info
->list
);
904 spin_unlock_irqrestore(&hwt
->lock
, flags
);
909 static int hardwall_proc_show(struct seq_file
*sf
, void *v
)
911 struct hardwall_info
*info
= sf
->private;
913 seq_printf(sf
, "%*pbl\n", cpumask_pr_args(&info
->cpumask
));
917 static int hardwall_proc_open(struct inode
*inode
,
920 return single_open(file
, hardwall_proc_show
, PDE_DATA(inode
));
923 static const struct file_operations hardwall_proc_fops
= {
924 .open
= hardwall_proc_open
,
927 .release
= single_release
,
930 static void hardwall_add_proc(struct hardwall_info
*info
)
933 snprintf(buf
, sizeof(buf
), "%d", info
->id
);
934 proc_create_data(buf
, 0444, info
->type
->proc_dir
,
935 &hardwall_proc_fops
, info
);
938 static void hardwall_remove_proc(struct hardwall_info
*info
)
941 snprintf(buf
, sizeof(buf
), "%d", info
->id
);
942 remove_proc_entry(buf
, info
->type
->proc_dir
);
945 int proc_pid_hardwall(struct seq_file
*m
, struct pid_namespace
*ns
,
946 struct pid
*pid
, struct task_struct
*task
)
950 for (i
= 0; i
< HARDWALL_TYPES
; ++i
) {
951 struct hardwall_info
*info
= task
->thread
.hardwall
[i
].info
;
953 seq_printf(m
, "%s: %d\n", info
->type
->name
, info
->id
);
958 void proc_tile_hardwall_init(struct proc_dir_entry
*root
)
961 for (i
= 0; i
< HARDWALL_TYPES
; ++i
) {
962 struct hardwall_type
*hwt
= &hardwall_types
[i
];
965 if (hardwall_proc_dir
== NULL
)
966 hardwall_proc_dir
= proc_mkdir("hardwall", root
);
967 hwt
->proc_dir
= proc_mkdir(hwt
->name
, hardwall_proc_dir
);
973 * Character device support via ioctl/close.
976 static long hardwall_ioctl(struct file
*file
, unsigned int a
, unsigned long b
)
978 struct hardwall_info
*info
= file
->private_data
;
979 int minor
= iminor(file
->f_mapping
->host
);
980 struct hardwall_type
* hwt
;
982 if (_IOC_TYPE(a
) != HARDWALL_IOCTL_BASE
)
985 BUILD_BUG_ON(HARDWALL_TYPES
!= _HARDWALL_TYPES
);
986 BUILD_BUG_ON(HARDWALL_TYPES
!=
987 sizeof(hardwall_types
)/sizeof(hardwall_types
[0]));
989 if (minor
< 0 || minor
>= HARDWALL_TYPES
)
991 hwt
= &hardwall_types
[minor
];
992 WARN_ON(info
&& hwt
!= info
->type
);
994 switch (_IOC_NR(a
)) {
995 case _HARDWALL_CREATE
:
1000 info
= hardwall_create(hwt
, _IOC_SIZE(a
),
1001 (const unsigned char __user
*)b
);
1003 return PTR_ERR(info
);
1004 file
->private_data
= info
;
1007 case _HARDWALL_ACTIVATE
:
1008 return hardwall_activate(info
);
1010 case _HARDWALL_DEACTIVATE
:
1011 if (current
->thread
.hardwall
[hwt
->index
].info
!= info
)
1013 return hardwall_deactivate(hwt
, current
);
1015 case _HARDWALL_GET_ID
:
1016 return info
? info
->id
: -EINVAL
;
1023 #ifdef CONFIG_COMPAT
1024 static long hardwall_compat_ioctl(struct file
*file
,
1025 unsigned int a
, unsigned long b
)
1027 /* Sign-extend the argument so it can be used as a pointer. */
1028 return hardwall_ioctl(file
, a
, (unsigned long)compat_ptr(b
));
1032 /* The user process closed the file; revoke access to user networks. */
1033 static int hardwall_flush(struct file
*file
, fl_owner_t owner
)
1035 struct hardwall_info
*info
= file
->private_data
;
1036 struct task_struct
*task
, *tmp
;
1037 unsigned long flags
;
1041 * NOTE: if multiple threads are activated on this hardwall
1042 * file, the other threads will continue having access to the
1043 * user network until they are context-switched out and back
1046 * NOTE: A NULL files pointer means the task is being torn
1047 * down, so in that case we also deactivate it.
1049 struct hardwall_type
*hwt
= info
->type
;
1050 spin_lock_irqsave(&hwt
->lock
, flags
);
1051 list_for_each_entry_safe(task
, tmp
, &info
->task_head
,
1052 thread
.hardwall
[hwt
->index
].list
) {
1053 if (task
->files
== owner
|| task
->files
== NULL
)
1054 _hardwall_deactivate(hwt
, task
);
1056 spin_unlock_irqrestore(&hwt
->lock
, flags
);
1062 /* This hardwall is gone, so destroy it. */
1063 static int hardwall_release(struct inode
*inode
, struct file
*file
)
1065 hardwall_destroy(file
->private_data
);
1069 static const struct file_operations dev_hardwall_fops
= {
1070 .open
= nonseekable_open
,
1071 .unlocked_ioctl
= hardwall_ioctl
,
1072 #ifdef CONFIG_COMPAT
1073 .compat_ioctl
= hardwall_compat_ioctl
,
1075 .flush
= hardwall_flush
,
1076 .release
= hardwall_release
,
1079 static struct cdev hardwall_dev
;
1081 static int __init
dev_hardwall_init(void)
1086 rc
= alloc_chrdev_region(&dev
, 0, HARDWALL_TYPES
, "hardwall");
1089 cdev_init(&hardwall_dev
, &dev_hardwall_fops
);
1090 rc
= cdev_add(&hardwall_dev
, dev
, HARDWALL_TYPES
);
1096 late_initcall(dev_hardwall_init
);