drivers/infiniband/hw/hfi1/eprom.c

   1 /*
   2  * Copyright(c) 2015, 2016 Intel Corporation.
   3  *
   4  * This file is provided under a dual BSD/GPLv2 license.  When using or
   5  * redistributing this file, you may do so under either license.
   6  *
   7  * GPL LICENSE SUMMARY
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of version 2 of the GNU General Public License as
  11  * published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * BSD LICENSE
  19  *
  20  * Redistribution and use in source and binary forms, with or without
  21  * modification, are permitted provided that the following conditions
  22  * are met:
  23  *
  24  *  - Redistributions of source code must retain the above copyright
  25  *    notice, this list of conditions and the following disclaimer.
  26  *  - Redistributions in binary form must reproduce the above copyright
  27  *    notice, this list of conditions and the following disclaimer in
  28  *    the documentation and/or other materials provided with the
  29  *    distribution.
  30  *  - Neither the name of Intel Corporation nor the names of its
  31  *    contributors may be used to endorse or promote products derived
  32  *    from this software without specific prior written permission.
  33  *
  34  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  35  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  36  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  37  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  38  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  39  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  40  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  41  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  42  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  43  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  44  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  45  *
  46  */
  47 #include <linux/delay.h>
  48 #include "hfi.h"
  49 #include "common.h"
  50 #include "eprom.h"
  51
  52 #define CMD_SHIFT 24
  53 #define CMD_RELEASE_POWERDOWN_NOID  ((0xab << CMD_SHIFT))
  54
  55 /* controller interface speeds */
  56 #define EP_SPEED_FULL 0x2       /* full speed */
  57
  58 /*
  59  * How long to wait for the EPROM to become available, in ms.
  60  * The spec 32 Mb EPROM takes around 40s to erase then write.
  61  * Double it for safety.
  62  */
  63 #define EPROM_TIMEOUT 80000 /* ms */
  64 /*
  65  * Initialize the EPROM handler.
  66  */
  67 int eprom_init(struct hfi1_devdata *dd)
  68 {
  69         int ret = 0;
  70
  71         /* only the discrete chip has an EPROM */
  72         if (dd->pcidev->device != PCI_DEVICE_ID_INTEL0)
  73                 return 0;
  74
  75         /*
  76          * It is OK if both HFIs reset the EPROM as long as they don't
  77          * do it at the same time.
  78          */
  79         ret = acquire_chip_resource(dd, CR_EPROM, EPROM_TIMEOUT);
  80         if (ret) {
  81                 dd_dev_err(dd,
  82                            "%s: unable to acquire EPROM resource, no EPROM support\n",
  83                            __func__);
  84                 goto done_asic;
  85         }
  86
  87         /* reset EPROM to be sure it is in a good state */
  88
  89         /* set reset */
  90         write_csr(dd, ASIC_EEP_CTL_STAT, ASIC_EEP_CTL_STAT_EP_RESET_SMASK);
  91         /* clear reset, set speed */
  92         write_csr(dd, ASIC_EEP_CTL_STAT,
  93                   EP_SPEED_FULL << ASIC_EEP_CTL_STAT_RATE_SPI_SHIFT);
  94
  95         /* wake the device with command "release powerdown NoID" */
  96         write_csr(dd, ASIC_EEP_ADDR_CMD, CMD_RELEASE_POWERDOWN_NOID);
  97
  98         dd->eprom_available = true;
  99         release_chip_resource(dd, CR_EPROM);
 100 done_asic:
 101         return ret;
 102 }