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ALSA: hda - Add the top speaker pin config for HP Spectre x360
[linux/fpc-iii.git] / drivers / infiniband / hw / i40iw / i40iw_main.c
blob6e9081380a276cbb78da8687820b9c7092f684af
1 /*******************************************************************************
2 *
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 *
33 *******************************************************************************/
34
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/netdevice.h>
38 #include <linux/etherdevice.h>
39 #include <linux/ip.h>
40 #include <linux/tcp.h>
41 #include <linux/if_vlan.h>
42 #include <net/addrconf.h>
43
44 #include "i40iw.h"
45 #include "i40iw_register.h"
46 #include <net/netevent.h>
47 #define CLIENT_IW_INTERFACE_VERSION_MAJOR 0
48 #define CLIENT_IW_INTERFACE_VERSION_MINOR 01
49 #define CLIENT_IW_INTERFACE_VERSION_BUILD 00
50
51 #define DRV_VERSION_MAJOR 0
52 #define DRV_VERSION_MINOR 5
53 #define DRV_VERSION_BUILD 123
54 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
55 __stringify(DRV_VERSION_MINOR) "." __stringify(DRV_VERSION_BUILD)
56
57 static int push_mode;
58 module_param(push_mode, int, 0644);
59 MODULE_PARM_DESC(push_mode, "Low latency mode: 0=disabled (default), 1=enabled)");
60
61 static int debug;
62 module_param(debug, int, 0644);
63 MODULE_PARM_DESC(debug, "debug flags: 0=disabled (default), 0x7fffffff=all");
64
65 static int resource_profile;
66 module_param(resource_profile, int, 0644);
67 MODULE_PARM_DESC(resource_profile,
68 "Resource Profile: 0=no VF RDMA support (default), 1=Weighted VF, 2=Even Distribution");
69
70 static int max_rdma_vfs = 32;
71 module_param(max_rdma_vfs, int, 0644);
72 MODULE_PARM_DESC(max_rdma_vfs, "Maximum VF count: 0-32 32=default");
73 static int mpa_version = 2;
74 module_param(mpa_version, int, 0644);
75 MODULE_PARM_DESC(mpa_version, "MPA version to be used in MPA Req/Resp 1 or 2");
76
77 MODULE_AUTHOR("Intel Corporation, <e1000-rdma@lists.sourceforge.net>");
78 MODULE_DESCRIPTION("Intel(R) Ethernet Connection X722 iWARP RDMA Driver");
79 MODULE_LICENSE("Dual BSD/GPL");
80 MODULE_VERSION(DRV_VERSION);
81
82 static struct i40e_client i40iw_client;
83 static char i40iw_client_name[I40E_CLIENT_STR_LENGTH] = "i40iw";
84
85 static LIST_HEAD(i40iw_handlers);
86 static spinlock_t i40iw_handler_lock;
87
88 static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
89 u32 vf_id, u8 *msg, u16 len);
90
91 static struct notifier_block i40iw_inetaddr_notifier = {
92 .notifier_call = i40iw_inetaddr_event
93 };
94
95 static struct notifier_block i40iw_inetaddr6_notifier = {
96 .notifier_call = i40iw_inet6addr_event
97 };
98
99 static struct notifier_block i40iw_net_notifier = {
100 .notifier_call = i40iw_net_event
101 };
102
103 static int i40iw_notifiers_registered;
104
105 /**
106 * i40iw_find_i40e_handler - find a handler given a client info
107 * @ldev: pointer to a client info
108 */
109 static struct i40iw_handler *i40iw_find_i40e_handler(struct i40e_info *ldev)
110 {
111 struct i40iw_handler *hdl;
112 unsigned long flags;
113
114 spin_lock_irqsave(&i40iw_handler_lock, flags);
115 list_for_each_entry(hdl, &i40iw_handlers, list) {
116 if (hdl->ldev.netdev == ldev->netdev) {
117 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
118 return hdl;
119 }
120 }
121 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
122 return NULL;
123 }
124
125 /**
126 * i40iw_find_netdev - find a handler given a netdev
127 * @netdev: pointer to net_device
128 */
129 struct i40iw_handler *i40iw_find_netdev(struct net_device *netdev)
130 {
131 struct i40iw_handler *hdl;
132 unsigned long flags;
133
134 spin_lock_irqsave(&i40iw_handler_lock, flags);
135 list_for_each_entry(hdl, &i40iw_handlers, list) {
136 if (hdl->ldev.netdev == netdev) {
137 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
138 return hdl;
139 }
140 }
141 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
142 return NULL;
143 }
144
145 /**
146 * i40iw_add_handler - add a handler to the list
147 * @hdl: handler to be added to the handler list
148 */
149 static void i40iw_add_handler(struct i40iw_handler *hdl)
150 {
151 unsigned long flags;
152
153 spin_lock_irqsave(&i40iw_handler_lock, flags);
154 list_add(&hdl->list, &i40iw_handlers);
155 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
156 }
157
158 /**
159 * i40iw_del_handler - delete a handler from the list
160 * @hdl: handler to be deleted from the handler list
161 */
162 static int i40iw_del_handler(struct i40iw_handler *hdl)
163 {
164 unsigned long flags;
165
166 spin_lock_irqsave(&i40iw_handler_lock, flags);
167 list_del(&hdl->list);
168 spin_unlock_irqrestore(&i40iw_handler_lock, flags);
169 return 0;
170 }
171
172 /**
173 * i40iw_enable_intr - set up device interrupts
174 * @dev: hardware control device structure
175 * @msix_id: id of the interrupt to be enabled
176 */
177 static void i40iw_enable_intr(struct i40iw_sc_dev *dev, u32 msix_id)
178 {
179 u32 val;
180
181 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
182 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
183 (3 << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
184 if (dev->is_pf)
185 i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_id - 1), val);
186 else
187 i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_id - 1), val);
188 }
189
190 /**
191 * i40iw_dpc - tasklet for aeq and ceq 0
192 * @data: iwarp device
193 */
194 static void i40iw_dpc(unsigned long data)
195 {
196 struct i40iw_device *iwdev = (struct i40iw_device *)data;
197
198 if (iwdev->msix_shared)
199 i40iw_process_ceq(iwdev, iwdev->ceqlist);
200 i40iw_process_aeq(iwdev);
201 i40iw_enable_intr(&iwdev->sc_dev, iwdev->iw_msixtbl[0].idx);
202 }
203
204 /**
205 * i40iw_ceq_dpc - dpc handler for CEQ
206 * @data: data points to CEQ
207 */
208 static void i40iw_ceq_dpc(unsigned long data)
209 {
210 struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
211 struct i40iw_device *iwdev = iwceq->iwdev;
212
213 i40iw_process_ceq(iwdev, iwceq);
214 i40iw_enable_intr(&iwdev->sc_dev, iwceq->msix_idx);
215 }
216
217 /**
218 * i40iw_irq_handler - interrupt handler for aeq and ceq0
219 * @irq: Interrupt request number
220 * @data: iwarp device
221 */
222 static irqreturn_t i40iw_irq_handler(int irq, void *data)
223 {
224 struct i40iw_device *iwdev = (struct i40iw_device *)data;
225
226 tasklet_schedule(&iwdev->dpc_tasklet);
227 return IRQ_HANDLED;
228 }
229
230 /**
231 * i40iw_destroy_cqp - destroy control qp
232 * @iwdev: iwarp device
233 * @create_done: 1 if cqp create poll was success
234 *
235 * Issue destroy cqp request and
236 * free the resources associated with the cqp
237 */
238 static void i40iw_destroy_cqp(struct i40iw_device *iwdev, bool free_hwcqp)
239 {
240 enum i40iw_status_code status = 0;
241 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
242 struct i40iw_cqp *cqp = &iwdev->cqp;
243
244 if (free_hwcqp && dev->cqp_ops->cqp_destroy)
245 status = dev->cqp_ops->cqp_destroy(dev->cqp);
246 if (status)
247 i40iw_pr_err("destroy cqp failed");
248
249 i40iw_free_dma_mem(dev->hw, &cqp->sq);
250 kfree(cqp->scratch_array);
251 iwdev->cqp.scratch_array = NULL;
252
253 kfree(cqp->cqp_requests);
254 cqp->cqp_requests = NULL;
255 }
256
257 /**
258 * i40iw_disable_irqs - disable device interrupts
259 * @dev: hardware control device structure
260 * @msic_vec: msix vector to disable irq
261 * @dev_id: parameter to pass to free_irq (used during irq setup)
262 *
263 * The function is called when destroying aeq/ceq
264 */
265 static void i40iw_disable_irq(struct i40iw_sc_dev *dev,
266 struct i40iw_msix_vector *msix_vec,
267 void *dev_id)
268 {
269 if (dev->is_pf)
270 i40iw_wr32(dev->hw, I40E_PFINT_DYN_CTLN(msix_vec->idx - 1), 0);
271 else
272 i40iw_wr32(dev->hw, I40E_VFINT_DYN_CTLN1(msix_vec->idx - 1), 0);
273 free_irq(msix_vec->irq, dev_id);
274 }
275
276 /**
277 * i40iw_destroy_aeq - destroy aeq
278 * @iwdev: iwarp device
279 * @reset: true if called before reset
280 *
281 * Issue a destroy aeq request and
282 * free the resources associated with the aeq
283 * The function is called during driver unload
284 */
285 static void i40iw_destroy_aeq(struct i40iw_device *iwdev, bool reset)
286 {
287 enum i40iw_status_code status = I40IW_ERR_NOT_READY;
288 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
289 struct i40iw_aeq *aeq = &iwdev->aeq;
290
291 if (!iwdev->msix_shared)
292 i40iw_disable_irq(dev, iwdev->iw_msixtbl, (void *)iwdev);
293 if (reset)
294 goto exit;
295
296 if (!dev->aeq_ops->aeq_destroy(&aeq->sc_aeq, 0, 1))
297 status = dev->aeq_ops->aeq_destroy_done(&aeq->sc_aeq);
298 if (status)
299 i40iw_pr_err("destroy aeq failed %d\n", status);
300
301 exit:
302 i40iw_free_dma_mem(dev->hw, &aeq->mem);
303 }
304
305 /**
306 * i40iw_destroy_ceq - destroy ceq
307 * @iwdev: iwarp device
308 * @iwceq: ceq to be destroyed
309 * @reset: true if called before reset
310 *
311 * Issue a destroy ceq request and
312 * free the resources associated with the ceq
313 */
314 static void i40iw_destroy_ceq(struct i40iw_device *iwdev,
315 struct i40iw_ceq *iwceq,
316 bool reset)
317 {
318 enum i40iw_status_code status;
319 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
320
321 if (reset)
322 goto exit;
323
324 status = dev->ceq_ops->ceq_destroy(&iwceq->sc_ceq, 0, 1);
325 if (status) {
326 i40iw_pr_err("ceq destroy command failed %d\n", status);
327 goto exit;
328 }
329
330 status = dev->ceq_ops->cceq_destroy_done(&iwceq->sc_ceq);
331 if (status)
332 i40iw_pr_err("ceq destroy completion failed %d\n", status);
333 exit:
334 i40iw_free_dma_mem(dev->hw, &iwceq->mem);
335 }
336
337 /**
338 * i40iw_dele_ceqs - destroy all ceq's
339 * @iwdev: iwarp device
340 * @reset: true if called before reset
341 *
342 * Go through all of the device ceq's and for each ceq
343 * disable the ceq interrupt and destroy the ceq
344 */
345 static void i40iw_dele_ceqs(struct i40iw_device *iwdev, bool reset)
346 {
347 u32 i = 0;
348 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
349 struct i40iw_ceq *iwceq = iwdev->ceqlist;
350 struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
351
352 if (iwdev->msix_shared) {
353 i40iw_disable_irq(dev, msix_vec, (void *)iwdev);
354 i40iw_destroy_ceq(iwdev, iwceq, reset);
355 iwceq++;
356 i++;
357 }
358
359 for (msix_vec++; i < iwdev->ceqs_count; i++, msix_vec++, iwceq++) {
360 i40iw_disable_irq(dev, msix_vec, (void *)iwceq);
361 i40iw_destroy_ceq(iwdev, iwceq, reset);
362 }
363 }
364
365 /**
366 * i40iw_destroy_ccq - destroy control cq
367 * @iwdev: iwarp device
368 * @reset: true if called before reset
369 *
370 * Issue destroy ccq request and
371 * free the resources associated with the ccq
372 */
373 static void i40iw_destroy_ccq(struct i40iw_device *iwdev, bool reset)
374 {
375 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
376 struct i40iw_ccq *ccq = &iwdev->ccq;
377 enum i40iw_status_code status = 0;
378
379 if (!reset)
380 status = dev->ccq_ops->ccq_destroy(dev->ccq, 0, true);
381 if (status)
382 i40iw_pr_err("ccq destroy failed %d\n", status);
383 i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
384 }
385
386 /* types of hmc objects */
387 static enum i40iw_hmc_rsrc_type iw_hmc_obj_types[] = {
388 I40IW_HMC_IW_QP,
389 I40IW_HMC_IW_CQ,
390 I40IW_HMC_IW_HTE,
391 I40IW_HMC_IW_ARP,
392 I40IW_HMC_IW_APBVT_ENTRY,
393 I40IW_HMC_IW_MR,
394 I40IW_HMC_IW_XF,
395 I40IW_HMC_IW_XFFL,
396 I40IW_HMC_IW_Q1,
397 I40IW_HMC_IW_Q1FL,
398 I40IW_HMC_IW_TIMER,
399 };
400
401 /**
402 * i40iw_close_hmc_objects_type - delete hmc objects of a given type
403 * @iwdev: iwarp device
404 * @obj_type: the hmc object type to be deleted
405 * @is_pf: true if the function is PF otherwise false
406 * @reset: true if called before reset
407 */
408 static void i40iw_close_hmc_objects_type(struct i40iw_sc_dev *dev,
409 enum i40iw_hmc_rsrc_type obj_type,
410 struct i40iw_hmc_info *hmc_info,
411 bool is_pf,
412 bool reset)
413 {
414 struct i40iw_hmc_del_obj_info info;
415
416 memset(&info, 0, sizeof(info));
417 info.hmc_info = hmc_info;
418 info.rsrc_type = obj_type;
419 info.count = hmc_info->hmc_obj[obj_type].cnt;
420 info.is_pf = is_pf;
421 if (dev->hmc_ops->del_hmc_object(dev, &info, reset))
422 i40iw_pr_err("del obj of type %d failed\n", obj_type);
423 }
424
425 /**
426 * i40iw_del_hmc_objects - remove all device hmc objects
427 * @dev: iwarp device
428 * @hmc_info: hmc_info to free
429 * @is_pf: true if hmc_info belongs to PF, not vf nor allocated
430 * by PF on behalf of VF
431 * @reset: true if called before reset
432 */
433 static void i40iw_del_hmc_objects(struct i40iw_sc_dev *dev,
434 struct i40iw_hmc_info *hmc_info,
435 bool is_pf,
436 bool reset)
437 {
438 unsigned int i;
439
440 for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++)
441 i40iw_close_hmc_objects_type(dev, iw_hmc_obj_types[i], hmc_info, is_pf, reset);
442 }
443
444 /**
445 * i40iw_ceq_handler - interrupt handler for ceq
446 * @data: ceq pointer
447 */
448 static irqreturn_t i40iw_ceq_handler(int irq, void *data)
449 {
450 struct i40iw_ceq *iwceq = (struct i40iw_ceq *)data;
451
452 if (iwceq->irq != irq)
453 i40iw_pr_err("expected irq = %d received irq = %d\n", iwceq->irq, irq);
454 tasklet_schedule(&iwceq->dpc_tasklet);
455 return IRQ_HANDLED;
456 }
457
458 /**
459 * i40iw_create_hmc_obj_type - create hmc object of a given type
460 * @dev: hardware control device structure
461 * @info: information for the hmc object to create
462 */
463 static enum i40iw_status_code i40iw_create_hmc_obj_type(struct i40iw_sc_dev *dev,
464 struct i40iw_hmc_create_obj_info *info)
465 {
466 return dev->hmc_ops->create_hmc_object(dev, info);
467 }
468
469 /**
470 * i40iw_create_hmc_objs - create all hmc objects for the device
471 * @iwdev: iwarp device
472 * @is_pf: true if the function is PF otherwise false
473 *
474 * Create the device hmc objects and allocate hmc pages
475 * Return 0 if successful, otherwise clean up and return error
476 */
477 static enum i40iw_status_code i40iw_create_hmc_objs(struct i40iw_device *iwdev,
478 bool is_pf)
479 {
480 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
481 struct i40iw_hmc_create_obj_info info;
482 enum i40iw_status_code status;
483 int i;
484
485 memset(&info, 0, sizeof(info));
486 info.hmc_info = dev->hmc_info;
487 info.is_pf = is_pf;
488 info.entry_type = iwdev->sd_type;
489 for (i = 0; i < IW_HMC_OBJ_TYPE_NUM; i++) {
490 info.rsrc_type = iw_hmc_obj_types[i];
491 info.count = dev->hmc_info->hmc_obj[info.rsrc_type].cnt;
492 status = i40iw_create_hmc_obj_type(dev, &info);
493 if (status) {
494 i40iw_pr_err("create obj type %d status = %d\n",
495 iw_hmc_obj_types[i], status);
496 break;
497 }
498 }
499 if (!status)
500 return (dev->cqp_misc_ops->static_hmc_pages_allocated(dev->cqp, 0,
501 dev->hmc_fn_id,
502 true, true));
503
504 while (i) {
505 i--;
506 /* destroy the hmc objects of a given type */
507 i40iw_close_hmc_objects_type(dev,
508 iw_hmc_obj_types[i],
509 dev->hmc_info,
510 is_pf,
511 false);
512 }
513 return status;
514 }
515
516 /**
517 * i40iw_obj_aligned_mem - get aligned memory from device allocated memory
518 * @iwdev: iwarp device
519 * @memptr: points to the memory addresses
520 * @size: size of memory needed
521 * @mask: mask for the aligned memory
522 *
523 * Get aligned memory of the requested size and
524 * update the memptr to point to the new aligned memory
525 * Return 0 if successful, otherwise return no memory error
526 */
527 enum i40iw_status_code i40iw_obj_aligned_mem(struct i40iw_device *iwdev,
528 struct i40iw_dma_mem *memptr,
529 u32 size,
530 u32 mask)
531 {
532 unsigned long va, newva;
533 unsigned long extra;
534
535 va = (unsigned long)iwdev->obj_next.va;
536 newva = va;
537 if (mask)
538 newva = ALIGN(va, (mask + 1));
539 extra = newva - va;
540 memptr->va = (u8 *)va + extra;
541 memptr->pa = iwdev->obj_next.pa + extra;
542 memptr->size = size;
543 if ((memptr->va + size) > (iwdev->obj_mem.va + iwdev->obj_mem.size))
544 return I40IW_ERR_NO_MEMORY;
545
546 iwdev->obj_next.va = memptr->va + size;
547 iwdev->obj_next.pa = memptr->pa + size;
548 return 0;
549 }
550
551 /**
552 * i40iw_create_cqp - create control qp
553 * @iwdev: iwarp device
554 *
555 * Return 0, if the cqp and all the resources associated with it
556 * are successfully created, otherwise return error
557 */
558 static enum i40iw_status_code i40iw_create_cqp(struct i40iw_device *iwdev)
559 {
560 enum i40iw_status_code status;
561 u32 sqsize = I40IW_CQP_SW_SQSIZE_2048;
562 struct i40iw_dma_mem mem;
563 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
564 struct i40iw_cqp_init_info cqp_init_info;
565 struct i40iw_cqp *cqp = &iwdev->cqp;
566 u16 maj_err, min_err;
567 int i;
568
569 cqp->cqp_requests = kcalloc(sqsize, sizeof(*cqp->cqp_requests), GFP_KERNEL);
570 if (!cqp->cqp_requests)
571 return I40IW_ERR_NO_MEMORY;
572 cqp->scratch_array = kcalloc(sqsize, sizeof(*cqp->scratch_array), GFP_KERNEL);
573 if (!cqp->scratch_array) {
574 kfree(cqp->cqp_requests);
575 return I40IW_ERR_NO_MEMORY;
576 }
577 dev->cqp = &cqp->sc_cqp;
578 dev->cqp->dev = dev;
579 memset(&cqp_init_info, 0, sizeof(cqp_init_info));
580 status = i40iw_allocate_dma_mem(dev->hw, &cqp->sq,
581 (sizeof(struct i40iw_cqp_sq_wqe) * sqsize),
582 I40IW_CQP_ALIGNMENT);
583 if (status)
584 goto exit;
585 status = i40iw_obj_aligned_mem(iwdev, &mem, sizeof(struct i40iw_cqp_ctx),
586 I40IW_HOST_CTX_ALIGNMENT_MASK);
587 if (status)
588 goto exit;
589 dev->cqp->host_ctx_pa = mem.pa;
590 dev->cqp->host_ctx = mem.va;
591 /* populate the cqp init info */
592 cqp_init_info.dev = dev;
593 cqp_init_info.sq_size = sqsize;
594 cqp_init_info.sq = cqp->sq.va;
595 cqp_init_info.sq_pa = cqp->sq.pa;
596 cqp_init_info.host_ctx_pa = mem.pa;
597 cqp_init_info.host_ctx = mem.va;
598 cqp_init_info.hmc_profile = iwdev->resource_profile;
599 cqp_init_info.enabled_vf_count = iwdev->max_rdma_vfs;
600 cqp_init_info.scratch_array = cqp->scratch_array;
601 status = dev->cqp_ops->cqp_init(dev->cqp, &cqp_init_info);
602 if (status) {
603 i40iw_pr_err("cqp init status %d\n", status);
604 goto exit;
605 }
606 status = dev->cqp_ops->cqp_create(dev->cqp, true, &maj_err, &min_err);
607 if (status) {
608 i40iw_pr_err("cqp create status %d maj_err %d min_err %d\n",
609 status, maj_err, min_err);
610 goto exit;
611 }
612 spin_lock_init(&cqp->req_lock);
613 INIT_LIST_HEAD(&cqp->cqp_avail_reqs);
614 INIT_LIST_HEAD(&cqp->cqp_pending_reqs);
615 /* init the waitq of the cqp_requests and add them to the list */
616 for (i = 0; i < I40IW_CQP_SW_SQSIZE_2048; i++) {
617 init_waitqueue_head(&cqp->cqp_requests[i].waitq);
618 list_add_tail(&cqp->cqp_requests[i].list, &cqp->cqp_avail_reqs);
619 }
620 return 0;
621 exit:
622 /* clean up the created resources */
623 i40iw_destroy_cqp(iwdev, false);
624 return status;
625 }
626
627 /**
628 * i40iw_create_ccq - create control cq
629 * @iwdev: iwarp device
630 *
631 * Return 0, if the ccq and the resources associated with it
632 * are successfully created, otherwise return error
633 */
634 static enum i40iw_status_code i40iw_create_ccq(struct i40iw_device *iwdev)
635 {
636 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
637 struct i40iw_dma_mem mem;
638 enum i40iw_status_code status;
639 struct i40iw_ccq_init_info info;
640 struct i40iw_ccq *ccq = &iwdev->ccq;
641
642 memset(&info, 0, sizeof(info));
643 dev->ccq = &ccq->sc_cq;
644 dev->ccq->dev = dev;
645 info.dev = dev;
646 ccq->shadow_area.size = sizeof(struct i40iw_cq_shadow_area);
647 ccq->mem_cq.size = sizeof(struct i40iw_cqe) * IW_CCQ_SIZE;
648 status = i40iw_allocate_dma_mem(dev->hw, &ccq->mem_cq,
649 ccq->mem_cq.size, I40IW_CQ0_ALIGNMENT);
650 if (status)
651 goto exit;
652 status = i40iw_obj_aligned_mem(iwdev, &mem, ccq->shadow_area.size,
653 I40IW_SHADOWAREA_MASK);
654 if (status)
655 goto exit;
656 ccq->sc_cq.back_cq = (void *)ccq;
657 /* populate the ccq init info */
658 info.cq_base = ccq->mem_cq.va;
659 info.cq_pa = ccq->mem_cq.pa;
660 info.num_elem = IW_CCQ_SIZE;
661 info.shadow_area = mem.va;
662 info.shadow_area_pa = mem.pa;
663 info.ceqe_mask = false;
664 info.ceq_id_valid = true;
665 info.shadow_read_threshold = 16;
666 status = dev->ccq_ops->ccq_init(dev->ccq, &info);
667 if (!status)
668 status = dev->ccq_ops->ccq_create(dev->ccq, 0, true, true);
669 exit:
670 if (status)
671 i40iw_free_dma_mem(dev->hw, &ccq->mem_cq);
672 return status;
673 }
674
675 /**
676 * i40iw_configure_ceq_vector - set up the msix interrupt vector for ceq
677 * @iwdev: iwarp device
678 * @msix_vec: interrupt vector information
679 * @iwceq: ceq associated with the vector
680 * @ceq_id: the id number of the iwceq
681 *
682 * Allocate interrupt resources and enable irq handling
683 * Return 0 if successful, otherwise return error
684 */
685 static enum i40iw_status_code i40iw_configure_ceq_vector(struct i40iw_device *iwdev,
686 struct i40iw_ceq *iwceq,
687 u32 ceq_id,
688 struct i40iw_msix_vector *msix_vec)
689 {
690 enum i40iw_status_code status;
691
692 if (iwdev->msix_shared && !ceq_id) {
693 tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
694 status = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "AEQCEQ", iwdev);
695 } else {
696 tasklet_init(&iwceq->dpc_tasklet, i40iw_ceq_dpc, (unsigned long)iwceq);
697 status = request_irq(msix_vec->irq, i40iw_ceq_handler, 0, "CEQ", iwceq);
698 }
699
700 if (status) {
701 i40iw_pr_err("ceq irq config fail\n");
702 return I40IW_ERR_CONFIG;
703 }
704 msix_vec->ceq_id = ceq_id;
705 msix_vec->cpu_affinity = 0;
706
707 return 0;
708 }
709
710 /**
711 * i40iw_create_ceq - create completion event queue
712 * @iwdev: iwarp device
713 * @iwceq: pointer to the ceq resources to be created
714 * @ceq_id: the id number of the iwceq
715 *
716 * Return 0, if the ceq and the resources associated with it
717 * are successfully created, otherwise return error
718 */
719 static enum i40iw_status_code i40iw_create_ceq(struct i40iw_device *iwdev,
720 struct i40iw_ceq *iwceq,
721 u32 ceq_id)
722 {
723 enum i40iw_status_code status;
724 struct i40iw_ceq_init_info info;
725 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
726 u64 scratch;
727
728 memset(&info, 0, sizeof(info));
729 info.ceq_id = ceq_id;
730 iwceq->iwdev = iwdev;
731 iwceq->mem.size = sizeof(struct i40iw_ceqe) *
732 iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
733 status = i40iw_allocate_dma_mem(dev->hw, &iwceq->mem, iwceq->mem.size,
734 I40IW_CEQ_ALIGNMENT);
735 if (status)
736 goto exit;
737 info.ceq_id = ceq_id;
738 info.ceqe_base = iwceq->mem.va;
739 info.ceqe_pa = iwceq->mem.pa;
740
741 info.elem_cnt = iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
742 iwceq->sc_ceq.ceq_id = ceq_id;
743 info.dev = dev;
744 scratch = (uintptr_t)&iwdev->cqp.sc_cqp;
745 status = dev->ceq_ops->ceq_init(&iwceq->sc_ceq, &info);
746 if (!status)
747 status = dev->ceq_ops->cceq_create(&iwceq->sc_ceq, scratch);
748
749 exit:
750 if (status)
751 i40iw_free_dma_mem(dev->hw, &iwceq->mem);
752 return status;
753 }
754
755 void i40iw_request_reset(struct i40iw_device *iwdev)
756 {
757 struct i40e_info *ldev = iwdev->ldev;
758
759 ldev->ops->request_reset(ldev, iwdev->client, 1);
760 }
761
762 /**
763 * i40iw_setup_ceqs - manage the device ceq's and their interrupt resources
764 * @iwdev: iwarp device
765 * @ldev: i40e lan device
766 *
767 * Allocate a list for all device completion event queues
768 * Create the ceq's and configure their msix interrupt vectors
769 * Return 0, if at least one ceq is successfully set up, otherwise return error
770 */
771 static enum i40iw_status_code i40iw_setup_ceqs(struct i40iw_device *iwdev,
772 struct i40e_info *ldev)
773 {
774 u32 i;
775 u32 ceq_id;
776 struct i40iw_ceq *iwceq;
777 struct i40iw_msix_vector *msix_vec;
778 enum i40iw_status_code status = 0;
779 u32 num_ceqs;
780
781 if (ldev && ldev->ops && ldev->ops->setup_qvlist) {
782 status = ldev->ops->setup_qvlist(ldev, &i40iw_client,
783 iwdev->iw_qvlist);
784 if (status)
785 goto exit;
786 } else {
787 status = I40IW_ERR_BAD_PTR;
788 goto exit;
789 }
790
791 num_ceqs = min(iwdev->msix_count, iwdev->sc_dev.hmc_fpm_misc.max_ceqs);
792 iwdev->ceqlist = kcalloc(num_ceqs, sizeof(*iwdev->ceqlist), GFP_KERNEL);
793 if (!iwdev->ceqlist) {
794 status = I40IW_ERR_NO_MEMORY;
795 goto exit;
796 }
797 i = (iwdev->msix_shared) ? 0 : 1;
798 for (ceq_id = 0; i < num_ceqs; i++, ceq_id++) {
799 iwceq = &iwdev->ceqlist[ceq_id];
800 status = i40iw_create_ceq(iwdev, iwceq, ceq_id);
801 if (status) {
802 i40iw_pr_err("create ceq status = %d\n", status);
803 break;
804 }
805
806 msix_vec = &iwdev->iw_msixtbl[i];
807 iwceq->irq = msix_vec->irq;
808 iwceq->msix_idx = msix_vec->idx;
809 status = i40iw_configure_ceq_vector(iwdev, iwceq, ceq_id, msix_vec);
810 if (status) {
811 i40iw_destroy_ceq(iwdev, iwceq, false);
812 break;
813 }
814 i40iw_enable_intr(&iwdev->sc_dev, msix_vec->idx);
815 iwdev->ceqs_count++;
816 }
817
818 exit:
819 if (status) {
820 if (!iwdev->ceqs_count) {
821 kfree(iwdev->ceqlist);
822 iwdev->ceqlist = NULL;
823 } else {
824 status = 0;
825 }
826 }
827 return status;
828 }
829
830 /**
831 * i40iw_configure_aeq_vector - set up the msix vector for aeq
832 * @iwdev: iwarp device
833 *
834 * Allocate interrupt resources and enable irq handling
835 * Return 0 if successful, otherwise return error
836 */
837 static enum i40iw_status_code i40iw_configure_aeq_vector(struct i40iw_device *iwdev)
838 {
839 struct i40iw_msix_vector *msix_vec = iwdev->iw_msixtbl;
840 u32 ret = 0;
841
842 if (!iwdev->msix_shared) {
843 tasklet_init(&iwdev->dpc_tasklet, i40iw_dpc, (unsigned long)iwdev);
844 ret = request_irq(msix_vec->irq, i40iw_irq_handler, 0, "i40iw", iwdev);
845 }
846 if (ret) {
847 i40iw_pr_err("aeq irq config fail\n");
848 return I40IW_ERR_CONFIG;
849 }
850
851 return 0;
852 }
853
854 /**
855 * i40iw_create_aeq - create async event queue
856 * @iwdev: iwarp device
857 *
858 * Return 0, if the aeq and the resources associated with it
859 * are successfully created, otherwise return error
860 */
861 static enum i40iw_status_code i40iw_create_aeq(struct i40iw_device *iwdev)
862 {
863 enum i40iw_status_code status;
864 struct i40iw_aeq_init_info info;
865 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
866 struct i40iw_aeq *aeq = &iwdev->aeq;
867 u64 scratch = 0;
868 u32 aeq_size;
869
870 aeq_size = 2 * iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_QP].cnt +
871 iwdev->sc_dev.hmc_info->hmc_obj[I40IW_HMC_IW_CQ].cnt;
872 memset(&info, 0, sizeof(info));
873 aeq->mem.size = sizeof(struct i40iw_sc_aeqe) * aeq_size;
874 status = i40iw_allocate_dma_mem(dev->hw, &aeq->mem, aeq->mem.size,
875 I40IW_AEQ_ALIGNMENT);
876 if (status)
877 goto exit;
878
879 info.aeqe_base = aeq->mem.va;
880 info.aeq_elem_pa = aeq->mem.pa;
881 info.elem_cnt = aeq_size;
882 info.dev = dev;
883 status = dev->aeq_ops->aeq_init(&aeq->sc_aeq, &info);
884 if (status)
885 goto exit;
886 status = dev->aeq_ops->aeq_create(&aeq->sc_aeq, scratch, 1);
887 if (!status)
888 status = dev->aeq_ops->aeq_create_done(&aeq->sc_aeq);
889 exit:
890 if (status)
891 i40iw_free_dma_mem(dev->hw, &aeq->mem);
892 return status;
893 }
894
895 /**
896 * i40iw_setup_aeq - set up the device aeq
897 * @iwdev: iwarp device
898 *
899 * Create the aeq and configure its msix interrupt vector
900 * Return 0 if successful, otherwise return error
901 */
902 static enum i40iw_status_code i40iw_setup_aeq(struct i40iw_device *iwdev)
903 {
904 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
905 enum i40iw_status_code status;
906
907 status = i40iw_create_aeq(iwdev);
908 if (status)
909 return status;
910
911 status = i40iw_configure_aeq_vector(iwdev);
912 if (status) {
913 i40iw_destroy_aeq(iwdev, false);
914 return status;
915 }
916
917 if (!iwdev->msix_shared)
918 i40iw_enable_intr(dev, iwdev->iw_msixtbl[0].idx);
919 return 0;
920 }
921
922 /**
923 * i40iw_initialize_ilq - create iwarp local queue for cm
924 * @iwdev: iwarp device
925 *
926 * Return 0 if successful, otherwise return error
927 */
928 static enum i40iw_status_code i40iw_initialize_ilq(struct i40iw_device *iwdev)
929 {
930 struct i40iw_puda_rsrc_info info;
931 enum i40iw_status_code status;
932
933 info.type = I40IW_PUDA_RSRC_TYPE_ILQ;
934 info.cq_id = 1;
935 info.qp_id = 0;
936 info.count = 1;
937 info.pd_id = 1;
938 info.sq_size = 8192;
939 info.rq_size = 8192;
940 info.buf_size = 1024;
941 info.tx_buf_cnt = 16384;
942 info.mss = iwdev->mss;
943 info.receive = i40iw_receive_ilq;
944 info.xmit_complete = i40iw_free_sqbuf;
945 status = i40iw_puda_create_rsrc(&iwdev->sc_dev, &info);
946 if (status)
947 i40iw_pr_err("ilq create fail\n");
948 return status;
949 }
950
951 /**
952 * i40iw_initialize_ieq - create iwarp exception queue
953 * @iwdev: iwarp device
954 *
955 * Return 0 if successful, otherwise return error
956 */
957 static enum i40iw_status_code i40iw_initialize_ieq(struct i40iw_device *iwdev)
958 {
959 struct i40iw_puda_rsrc_info info;
960 enum i40iw_status_code status;
961
962 info.type = I40IW_PUDA_RSRC_TYPE_IEQ;
963 info.cq_id = 2;
964 info.qp_id = iwdev->sc_dev.exception_lan_queue;
965 info.count = 1;
966 info.pd_id = 2;
967 info.sq_size = 8192;
968 info.rq_size = 8192;
969 info.buf_size = 2048;
970 info.mss = iwdev->mss;
971 info.tx_buf_cnt = 16384;
972 status = i40iw_puda_create_rsrc(&iwdev->sc_dev, &info);
973 if (status)
974 i40iw_pr_err("ieq create fail\n");
975 return status;
976 }
977
978 /**
979 * i40iw_hmc_setup - create hmc objects for the device
980 * @iwdev: iwarp device
981 *
982 * Set up the device private memory space for the number and size of
983 * the hmc objects and create the objects
984 * Return 0 if successful, otherwise return error
985 */
986 static enum i40iw_status_code i40iw_hmc_setup(struct i40iw_device *iwdev)
987 {
988 enum i40iw_status_code status;
989
990 iwdev->sd_type = I40IW_SD_TYPE_DIRECT;
991 status = i40iw_config_fpm_values(&iwdev->sc_dev, IW_CFG_FPM_QP_COUNT);
992 if (status)
993 goto exit;
994 status = i40iw_create_hmc_objs(iwdev, true);
995 if (status)
996 goto exit;
997 iwdev->init_state = HMC_OBJS_CREATED;
998 exit:
999 return status;
1000 }
1001
1002 /**
1003 * i40iw_del_init_mem - deallocate memory resources
1004 * @iwdev: iwarp device
1005 */
1006 static void i40iw_del_init_mem(struct i40iw_device *iwdev)
1007 {
1008 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1009
1010 i40iw_free_dma_mem(&iwdev->hw, &iwdev->obj_mem);
1011 kfree(dev->hmc_info->sd_table.sd_entry);
1012 dev->hmc_info->sd_table.sd_entry = NULL;
1013 kfree(iwdev->mem_resources);
1014 iwdev->mem_resources = NULL;
1015 kfree(iwdev->ceqlist);
1016 iwdev->ceqlist = NULL;
1017 kfree(iwdev->iw_msixtbl);
1018 iwdev->iw_msixtbl = NULL;
1019 kfree(iwdev->hmc_info_mem);
1020 iwdev->hmc_info_mem = NULL;
1021 }
1022
1023 /**
1024 * i40iw_del_macip_entry - remove a mac ip address entry from the hw table
1025 * @iwdev: iwarp device
1026 * @idx: the index of the mac ip address to delete
1027 */
1028 static void i40iw_del_macip_entry(struct i40iw_device *iwdev, u8 idx)
1029 {
1030 struct i40iw_cqp *iwcqp = &iwdev->cqp;
1031 struct i40iw_cqp_request *cqp_request;
1032 struct cqp_commands_info *cqp_info;
1033 enum i40iw_status_code status = 0;
1034
1035 cqp_request = i40iw_get_cqp_request(iwcqp, true);
1036 if (!cqp_request) {
1037 i40iw_pr_err("cqp_request memory failed\n");
1038 return;
1039 }
1040 cqp_info = &cqp_request->info;
1041 cqp_info->cqp_cmd = OP_DELETE_LOCAL_MAC_IPADDR_ENTRY;
1042 cqp_info->post_sq = 1;
1043 cqp_info->in.u.del_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
1044 cqp_info->in.u.del_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1045 cqp_info->in.u.del_local_mac_ipaddr_entry.entry_idx = idx;
1046 cqp_info->in.u.del_local_mac_ipaddr_entry.ignore_ref_count = 0;
1047 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1048 if (status)
1049 i40iw_pr_err("CQP-OP Del MAC Ip entry fail");
1050 }
1051
1052 /**
1053 * i40iw_add_mac_ipaddr_entry - add a mac ip address entry to the hw table
1054 * @iwdev: iwarp device
1055 * @mac_addr: pointer to mac address
1056 * @idx: the index of the mac ip address to add
1057 */
1058 static enum i40iw_status_code i40iw_add_mac_ipaddr_entry(struct i40iw_device *iwdev,
1059 u8 *mac_addr,
1060 u8 idx)
1061 {
1062 struct i40iw_local_mac_ipaddr_entry_info *info;
1063 struct i40iw_cqp *iwcqp = &iwdev->cqp;
1064 struct i40iw_cqp_request *cqp_request;
1065 struct cqp_commands_info *cqp_info;
1066 enum i40iw_status_code status = 0;
1067
1068 cqp_request = i40iw_get_cqp_request(iwcqp, true);
1069 if (!cqp_request) {
1070 i40iw_pr_err("cqp_request memory failed\n");
1071 return I40IW_ERR_NO_MEMORY;
1072 }
1073
1074 cqp_info = &cqp_request->info;
1075
1076 cqp_info->post_sq = 1;
1077 info = &cqp_info->in.u.add_local_mac_ipaddr_entry.info;
1078 ether_addr_copy(info->mac_addr, mac_addr);
1079 info->entry_idx = idx;
1080 cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1081 cqp_info->cqp_cmd = OP_ADD_LOCAL_MAC_IPADDR_ENTRY;
1082 cqp_info->in.u.add_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
1083 cqp_info->in.u.add_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1084 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1085 if (status)
1086 i40iw_pr_err("CQP-OP Add MAC Ip entry fail");
1087 return status;
1088 }
1089
1090 /**
1091 * i40iw_alloc_local_mac_ipaddr_entry - allocate a mac ip address entry
1092 * @iwdev: iwarp device
1093 * @mac_ip_tbl_idx: the index of the new mac ip address
1094 *
1095 * Allocate a mac ip address entry and update the mac_ip_tbl_idx
1096 * to hold the index of the newly created mac ip address
1097 * Return 0 if successful, otherwise return error
1098 */
1099 static enum i40iw_status_code i40iw_alloc_local_mac_ipaddr_entry(struct i40iw_device *iwdev,
1100 u16 *mac_ip_tbl_idx)
1101 {
1102 struct i40iw_cqp *iwcqp = &iwdev->cqp;
1103 struct i40iw_cqp_request *cqp_request;
1104 struct cqp_commands_info *cqp_info;
1105 enum i40iw_status_code status = 0;
1106
1107 cqp_request = i40iw_get_cqp_request(iwcqp, true);
1108 if (!cqp_request) {
1109 i40iw_pr_err("cqp_request memory failed\n");
1110 return I40IW_ERR_NO_MEMORY;
1111 }
1112
1113 /* increment refcount, because we need the cqp request ret value */
1114 atomic_inc(&cqp_request->refcount);
1115
1116 cqp_info = &cqp_request->info;
1117 cqp_info->cqp_cmd = OP_ALLOC_LOCAL_MAC_IPADDR_ENTRY;
1118 cqp_info->post_sq = 1;
1119 cqp_info->in.u.alloc_local_mac_ipaddr_entry.cqp = &iwcqp->sc_cqp;
1120 cqp_info->in.u.alloc_local_mac_ipaddr_entry.scratch = (uintptr_t)cqp_request;
1121 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1122 if (!status)
1123 *mac_ip_tbl_idx = cqp_request->compl_info.op_ret_val;
1124 else
1125 i40iw_pr_err("CQP-OP Alloc MAC Ip entry fail");
1126 /* decrement refcount and free the cqp request, if no longer used */
1127 i40iw_put_cqp_request(iwcqp, cqp_request);
1128 return status;
1129 }
1130
1131 /**
1132 * i40iw_alloc_set_mac_ipaddr - set up a mac ip address table entry
1133 * @iwdev: iwarp device
1134 * @macaddr: pointer to mac address
1135 *
1136 * Allocate a mac ip address entry and add it to the hw table
1137 * Return 0 if successful, otherwise return error
1138 */
1139 static enum i40iw_status_code i40iw_alloc_set_mac_ipaddr(struct i40iw_device *iwdev,
1140 u8 *macaddr)
1141 {
1142 enum i40iw_status_code status;
1143
1144 status = i40iw_alloc_local_mac_ipaddr_entry(iwdev, &iwdev->mac_ip_table_idx);
1145 if (!status) {
1146 status = i40iw_add_mac_ipaddr_entry(iwdev, macaddr,
1147 (u8)iwdev->mac_ip_table_idx);
1148 if (status)
1149 i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
1150 }
1151 return status;
1152 }
1153
1154 /**
1155 * i40iw_add_ipv6_addr - add ipv6 address to the hw arp table
1156 * @iwdev: iwarp device
1157 */
1158 static void i40iw_add_ipv6_addr(struct i40iw_device *iwdev)
1159 {
1160 struct net_device *ip_dev;
1161 struct inet6_dev *idev;
1162 struct inet6_ifaddr *ifp;
1163 u32 local_ipaddr6[4];
1164
1165 rcu_read_lock();
1166 for_each_netdev_rcu(&init_net, ip_dev) {
1167 if ((((rdma_vlan_dev_vlan_id(ip_dev) < 0xFFFF) &&
1168 (rdma_vlan_dev_real_dev(ip_dev) == iwdev->netdev)) ||
1169 (ip_dev == iwdev->netdev)) && (ip_dev->flags & IFF_UP)) {
1170 idev = __in6_dev_get(ip_dev);
1171 if (!idev) {
1172 i40iw_pr_err("ipv6 inet device not found\n");
1173 break;
1174 }
1175 list_for_each_entry(ifp, &idev->addr_list, if_list) {
1176 i40iw_pr_info("IP=%pI6, vlan_id=%d, MAC=%pM\n", &ifp->addr,
1177 rdma_vlan_dev_vlan_id(ip_dev), ip_dev->dev_addr);
1178 i40iw_copy_ip_ntohl(local_ipaddr6,
1179 ifp->addr.in6_u.u6_addr32);
1180 i40iw_manage_arp_cache(iwdev,
1181 ip_dev->dev_addr,
1182 local_ipaddr6,
1183 false,
1184 I40IW_ARP_ADD);
1185 }
1186 }
1187 }
1188 rcu_read_unlock();
1189 }
1190
1191 /**
1192 * i40iw_add_ipv4_addr - add ipv4 address to the hw arp table
1193 * @iwdev: iwarp device
1194 */
1195 static void i40iw_add_ipv4_addr(struct i40iw_device *iwdev)
1196 {
1197 struct net_device *dev;
1198 struct in_device *idev;
1199 bool got_lock = true;
1200 u32 ip_addr;
1201
1202 if (!rtnl_trylock())
1203 got_lock = false;
1204
1205 for_each_netdev(&init_net, dev) {
1206 if ((((rdma_vlan_dev_vlan_id(dev) < 0xFFFF) &&
1207 (rdma_vlan_dev_real_dev(dev) == iwdev->netdev)) ||
1208 (dev == iwdev->netdev)) && (dev->flags & IFF_UP)) {
1209 idev = in_dev_get(dev);
1210 for_ifa(idev) {
1211 i40iw_debug(&iwdev->sc_dev, I40IW_DEBUG_CM,
1212 "IP=%pI4, vlan_id=%d, MAC=%pM\n", &ifa->ifa_address,
1213 rdma_vlan_dev_vlan_id(dev), dev->dev_addr);
1214
1215 ip_addr = ntohl(ifa->ifa_address);
1216 i40iw_manage_arp_cache(iwdev,
1217 dev->dev_addr,
1218 &ip_addr,
1219 true,
1220 I40IW_ARP_ADD);
1221 }
1222 endfor_ifa(idev);
1223 in_dev_put(idev);
1224 }
1225 }
1226 if (got_lock)
1227 rtnl_unlock();
1228 }
1229
1230 /**
1231 * i40iw_add_mac_ip - add mac and ip addresses
1232 * @iwdev: iwarp device
1233 *
1234 * Create and add a mac ip address entry to the hw table and
1235 * ipv4/ipv6 addresses to the arp cache
1236 * Return 0 if successful, otherwise return error
1237 */
1238 static enum i40iw_status_code i40iw_add_mac_ip(struct i40iw_device *iwdev)
1239 {
1240 struct net_device *netdev = iwdev->netdev;
1241 enum i40iw_status_code status;
1242
1243 status = i40iw_alloc_set_mac_ipaddr(iwdev, (u8 *)netdev->dev_addr);
1244 if (status)
1245 return status;
1246 i40iw_add_ipv4_addr(iwdev);
1247 i40iw_add_ipv6_addr(iwdev);
1248 return 0;
1249 }
1250
1251 /**
1252 * i40iw_wait_pe_ready - Check if firmware is ready
1253 * @hw: provides access to registers
1254 */
1255 static void i40iw_wait_pe_ready(struct i40iw_hw *hw)
1256 {
1257 u32 statusfw;
1258 u32 statuscpu0;
1259 u32 statuscpu1;
1260 u32 statuscpu2;
1261 u32 retrycount = 0;
1262
1263 do {
1264 statusfw = i40iw_rd32(hw, I40E_GLPE_FWLDSTATUS);
1265 i40iw_pr_info("[%04d] fm load status[x%04X]\n", __LINE__, statusfw);
1266 statuscpu0 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS0);
1267 i40iw_pr_info("[%04d] CSR_CQP status[x%04X]\n", __LINE__, statuscpu0);
1268 statuscpu1 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS1);
1269 i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS1 status[x%04X]\n",
1270 __LINE__, statuscpu1);
1271 statuscpu2 = i40iw_rd32(hw, I40E_GLPE_CPUSTATUS2);
1272 i40iw_pr_info("[%04d] I40E_GLPE_CPUSTATUS2 status[x%04X]\n",
1273 __LINE__, statuscpu2);
1274 if ((statuscpu0 == 0x80) && (statuscpu1 == 0x80) && (statuscpu2 == 0x80))
1275 break; /* SUCCESS */
1276 mdelay(1000);
1277 retrycount++;
1278 } while (retrycount < 14);
1279 i40iw_wr32(hw, 0xb4040, 0x4C104C5);
1280 }
1281
1282 /**
1283 * i40iw_initialize_dev - initialize device
1284 * @iwdev: iwarp device
1285 * @ldev: lan device information
1286 *
1287 * Allocate memory for the hmc objects and initialize iwdev
1288 * Return 0 if successful, otherwise clean up the resources
1289 * and return error
1290 */
1291 static enum i40iw_status_code i40iw_initialize_dev(struct i40iw_device *iwdev,
1292 struct i40e_info *ldev)
1293 {
1294 enum i40iw_status_code status;
1295 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1296 struct i40iw_device_init_info info;
1297 struct i40iw_dma_mem mem;
1298 u32 size;
1299
1300 memset(&info, 0, sizeof(info));
1301 size = sizeof(struct i40iw_hmc_pble_rsrc) + sizeof(struct i40iw_hmc_info) +
1302 (sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX);
1303 iwdev->hmc_info_mem = kzalloc(size, GFP_KERNEL);
1304 if (!iwdev->hmc_info_mem) {
1305 i40iw_pr_err("memory alloc fail\n");
1306 return I40IW_ERR_NO_MEMORY;
1307 }
1308 iwdev->pble_rsrc = (struct i40iw_hmc_pble_rsrc *)iwdev->hmc_info_mem;
1309 dev->hmc_info = &iwdev->hw.hmc;
1310 dev->hmc_info->hmc_obj = (struct i40iw_hmc_obj_info *)(iwdev->pble_rsrc + 1);
1311 status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_QUERY_FPM_BUF_SIZE,
1312 I40IW_FPM_QUERY_BUF_ALIGNMENT_MASK);
1313 if (status)
1314 goto exit;
1315 info.fpm_query_buf_pa = mem.pa;
1316 info.fpm_query_buf = mem.va;
1317 status = i40iw_obj_aligned_mem(iwdev, &mem, I40IW_COMMIT_FPM_BUF_SIZE,
1318 I40IW_FPM_COMMIT_BUF_ALIGNMENT_MASK);
1319 if (status)
1320 goto exit;
1321 info.fpm_commit_buf_pa = mem.pa;
1322 info.fpm_commit_buf = mem.va;
1323 info.hmc_fn_id = ldev->fid;
1324 info.is_pf = (ldev->ftype) ? false : true;
1325 info.bar0 = ldev->hw_addr;
1326 info.hw = &iwdev->hw;
1327 info.debug_mask = debug;
1328 info.qs_handle = ldev->params.qos.prio_qos[0].qs_handle;
1329 info.exception_lan_queue = 1;
1330 info.vchnl_send = i40iw_virtchnl_send;
1331 status = i40iw_device_init(&iwdev->sc_dev, &info);
1332 exit:
1333 if (status) {
1334 kfree(iwdev->hmc_info_mem);
1335 iwdev->hmc_info_mem = NULL;
1336 }
1337 return status;
1338 }
1339
1340 /**
1341 * i40iw_register_notifiers - register tcp ip notifiers
1342 */
1343 static void i40iw_register_notifiers(void)
1344 {
1345 if (!i40iw_notifiers_registered) {
1346 register_inetaddr_notifier(&i40iw_inetaddr_notifier);
1347 register_inet6addr_notifier(&i40iw_inetaddr6_notifier);
1348 register_netevent_notifier(&i40iw_net_notifier);
1349 }
1350 i40iw_notifiers_registered++;
1351 }
1352
1353 /**
1354 * i40iw_save_msix_info - copy msix vector information to iwarp device
1355 * @iwdev: iwarp device
1356 * @ldev: lan device information
1357 *
1358 * Allocate iwdev msix table and copy the ldev msix info to the table
1359 * Return 0 if successful, otherwise return error
1360 */
1361 static enum i40iw_status_code i40iw_save_msix_info(struct i40iw_device *iwdev,
1362 struct i40e_info *ldev)
1363 {
1364 struct i40e_qvlist_info *iw_qvlist;
1365 struct i40e_qv_info *iw_qvinfo;
1366 u32 ceq_idx;
1367 u32 i;
1368 u32 size;
1369
1370 iwdev->msix_count = ldev->msix_count;
1371
1372 size = sizeof(struct i40iw_msix_vector) * iwdev->msix_count;
1373 size += sizeof(struct i40e_qvlist_info);
1374 size += sizeof(struct i40e_qv_info) * iwdev->msix_count - 1;
1375 iwdev->iw_msixtbl = kzalloc(size, GFP_KERNEL);
1376
1377 if (!iwdev->iw_msixtbl)
1378 return I40IW_ERR_NO_MEMORY;
1379 iwdev->iw_qvlist = (struct i40e_qvlist_info *)(&iwdev->iw_msixtbl[iwdev->msix_count]);
1380 iw_qvlist = iwdev->iw_qvlist;
1381 iw_qvinfo = iw_qvlist->qv_info;
1382 iw_qvlist->num_vectors = iwdev->msix_count;
1383 if (iwdev->msix_count <= num_online_cpus())
1384 iwdev->msix_shared = true;
1385 for (i = 0, ceq_idx = 0; i < iwdev->msix_count; i++, iw_qvinfo++) {
1386 iwdev->iw_msixtbl[i].idx = ldev->msix_entries[i].entry;
1387 iwdev->iw_msixtbl[i].irq = ldev->msix_entries[i].vector;
1388 if (i == 0) {
1389 iw_qvinfo->aeq_idx = 0;
1390 if (iwdev->msix_shared)
1391 iw_qvinfo->ceq_idx = ceq_idx++;
1392 else
1393 iw_qvinfo->ceq_idx = I40E_QUEUE_INVALID_IDX;
1394 } else {
1395 iw_qvinfo->aeq_idx = I40E_QUEUE_INVALID_IDX;
1396 iw_qvinfo->ceq_idx = ceq_idx++;
1397 }
1398 iw_qvinfo->itr_idx = 3;
1399 iw_qvinfo->v_idx = iwdev->iw_msixtbl[i].idx;
1400 }
1401 return 0;
1402 }
1403
1404 /**
1405 * i40iw_deinit_device - clean up the device resources
1406 * @iwdev: iwarp device
1407 * @reset: true if called before reset
1408 * @del_hdl: true if delete hdl entry
1409 *
1410 * Destroy the ib device interface, remove the mac ip entry and ipv4/ipv6 addresses,
1411 * destroy the device queues and free the pble and the hmc objects
1412 */
1413 static void i40iw_deinit_device(struct i40iw_device *iwdev, bool reset, bool del_hdl)
1414 {
1415 struct i40e_info *ldev = iwdev->ldev;
1416
1417 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1418
1419 i40iw_pr_info("state = %d\n", iwdev->init_state);
1420
1421 switch (iwdev->init_state) {
1422 case RDMA_DEV_REGISTERED:
1423 iwdev->iw_status = 0;
1424 i40iw_port_ibevent(iwdev);
1425 i40iw_destroy_rdma_device(iwdev->iwibdev);
1426 /* fallthrough */
1427 case IP_ADDR_REGISTERED:
1428 if (!reset)
1429 i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
1430 /* fallthrough */
1431 case INET_NOTIFIER:
1432 if (i40iw_notifiers_registered > 0) {
1433 i40iw_notifiers_registered--;
1434 unregister_netevent_notifier(&i40iw_net_notifier);
1435 unregister_inetaddr_notifier(&i40iw_inetaddr_notifier);
1436 unregister_inet6addr_notifier(&i40iw_inetaddr6_notifier);
1437 }
1438 /* fallthrough */
1439 case CEQ_CREATED:
1440 i40iw_dele_ceqs(iwdev, reset);
1441 /* fallthrough */
1442 case AEQ_CREATED:
1443 i40iw_destroy_aeq(iwdev, reset);
1444 /* fallthrough */
1445 case IEQ_CREATED:
1446 i40iw_puda_dele_resources(dev, I40IW_PUDA_RSRC_TYPE_IEQ, reset);
1447 /* fallthrough */
1448 case ILQ_CREATED:
1449 i40iw_puda_dele_resources(dev, I40IW_PUDA_RSRC_TYPE_ILQ, reset);
1450 /* fallthrough */
1451 case CCQ_CREATED:
1452 i40iw_destroy_ccq(iwdev, reset);
1453 /* fallthrough */
1454 case PBLE_CHUNK_MEM:
1455 i40iw_destroy_pble_pool(dev, iwdev->pble_rsrc);
1456 /* fallthrough */
1457 case HMC_OBJS_CREATED:
1458 i40iw_del_hmc_objects(dev, dev->hmc_info, true, reset);
1459 /* fallthrough */
1460 case CQP_CREATED:
1461 i40iw_destroy_cqp(iwdev, !reset);
1462 /* fallthrough */
1463 case INITIAL_STATE:
1464 i40iw_cleanup_cm_core(&iwdev->cm_core);
1465 if (dev->is_pf)
1466 i40iw_hw_stats_del_timer(dev);
1467
1468 i40iw_del_init_mem(iwdev);
1469 break;
1470 case INVALID_STATE:
1471 /* fallthrough */
1472 default:
1473 i40iw_pr_err("bad init_state = %d\n", iwdev->init_state);
1474 break;
1475 }
1476
1477 if (del_hdl)
1478 i40iw_del_handler(i40iw_find_i40e_handler(ldev));
1479 kfree(iwdev->hdl);
1480 }
1481
1482 /**
1483 * i40iw_setup_init_state - set up the initial device struct
1484 * @hdl: handler for iwarp device - one per instance
1485 * @ldev: lan device information
1486 * @client: iwarp client information, provided during registration
1487 *
1488 * Initialize the iwarp device and its hdl information
1489 * using the ldev and client information
1490 * Return 0 if successful, otherwise return error
1491 */
1492 static enum i40iw_status_code i40iw_setup_init_state(struct i40iw_handler *hdl,
1493 struct i40e_info *ldev,
1494 struct i40e_client *client)
1495 {
1496 struct i40iw_device *iwdev = &hdl->device;
1497 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1498 enum i40iw_status_code status;
1499
1500 memcpy(&hdl->ldev, ldev, sizeof(*ldev));
1501 if (resource_profile == 1)
1502 resource_profile = 2;
1503
1504 iwdev->mpa_version = mpa_version;
1505 iwdev->resource_profile = (resource_profile < I40IW_HMC_PROFILE_EQUAL) ?
1506 (u8)resource_profile + I40IW_HMC_PROFILE_DEFAULT :
1507 I40IW_HMC_PROFILE_DEFAULT;
1508 iwdev->max_rdma_vfs =
1509 (iwdev->resource_profile != I40IW_HMC_PROFILE_DEFAULT) ? max_rdma_vfs : 0;
1510 iwdev->max_enabled_vfs = iwdev->max_rdma_vfs;
1511 iwdev->netdev = ldev->netdev;
1512 hdl->client = client;
1513 iwdev->mss = (!ldev->params.mtu) ? I40IW_DEFAULT_MSS : ldev->params.mtu - I40IW_MTU_TO_MSS;
1514 if (!ldev->ftype)
1515 iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_DB_ADDR_OFFSET;
1516 else
1517 iwdev->db_start = pci_resource_start(ldev->pcidev, 0) + I40IW_VF_DB_ADDR_OFFSET;
1518
1519 status = i40iw_save_msix_info(iwdev, ldev);
1520 if (status)
1521 goto exit;
1522 iwdev->hw.dev_context = (void *)ldev->pcidev;
1523 iwdev->hw.hw_addr = ldev->hw_addr;
1524 status = i40iw_allocate_dma_mem(&iwdev->hw,
1525 &iwdev->obj_mem, 8192, 4096);
1526 if (status)
1527 goto exit;
1528 iwdev->obj_next = iwdev->obj_mem;
1529 iwdev->push_mode = push_mode;
1530
1531 init_waitqueue_head(&iwdev->vchnl_waitq);
1532 init_waitqueue_head(&dev->vf_reqs);
1533
1534 status = i40iw_initialize_dev(iwdev, ldev);
1535 exit:
1536 if (status) {
1537 kfree(iwdev->iw_msixtbl);
1538 i40iw_free_dma_mem(dev->hw, &iwdev->obj_mem);
1539 iwdev->iw_msixtbl = NULL;
1540 }
1541 return status;
1542 }
1543
1544 /**
1545 * i40iw_open - client interface operation open for iwarp/uda device
1546 * @ldev: lan device information
1547 * @client: iwarp client information, provided during registration
1548 *
1549 * Called by the lan driver during the processing of client register
1550 * Create device resources, set up queues, pble and hmc objects and
1551 * register the device with the ib verbs interface
1552 * Return 0 if successful, otherwise return error
1553 */
1554 static int i40iw_open(struct i40e_info *ldev, struct i40e_client *client)
1555 {
1556 struct i40iw_device *iwdev;
1557 struct i40iw_sc_dev *dev;
1558 enum i40iw_status_code status;
1559 struct i40iw_handler *hdl;
1560
1561 hdl = kzalloc(sizeof(*hdl), GFP_KERNEL);
1562 if (!hdl)
1563 return -ENOMEM;
1564 iwdev = &hdl->device;
1565 iwdev->hdl = hdl;
1566 dev = &iwdev->sc_dev;
1567 i40iw_setup_cm_core(iwdev);
1568
1569 dev->back_dev = (void *)iwdev;
1570 iwdev->ldev = &hdl->ldev;
1571 iwdev->client = client;
1572 mutex_init(&iwdev->pbl_mutex);
1573 i40iw_add_handler(hdl);
1574
1575 do {
1576 status = i40iw_setup_init_state(hdl, ldev, client);
1577 if (status)
1578 break;
1579 iwdev->init_state = INITIAL_STATE;
1580 if (dev->is_pf)
1581 i40iw_wait_pe_ready(dev->hw);
1582 status = i40iw_create_cqp(iwdev);
1583 if (status)
1584 break;
1585 iwdev->init_state = CQP_CREATED;
1586 status = i40iw_hmc_setup(iwdev);
1587 if (status)
1588 break;
1589 status = i40iw_create_ccq(iwdev);
1590 if (status)
1591 break;
1592 iwdev->init_state = CCQ_CREATED;
1593 status = i40iw_initialize_ilq(iwdev);
1594 if (status)
1595 break;
1596 iwdev->init_state = ILQ_CREATED;
1597 status = i40iw_initialize_ieq(iwdev);
1598 if (status)
1599 break;
1600 iwdev->init_state = IEQ_CREATED;
1601 status = i40iw_setup_aeq(iwdev);
1602 if (status)
1603 break;
1604 iwdev->init_state = AEQ_CREATED;
1605 status = i40iw_setup_ceqs(iwdev, ldev);
1606 if (status)
1607 break;
1608 iwdev->init_state = CEQ_CREATED;
1609 status = i40iw_initialize_hw_resources(iwdev);
1610 if (status)
1611 break;
1612 dev->ccq_ops->ccq_arm(dev->ccq);
1613 status = i40iw_hmc_init_pble(&iwdev->sc_dev, iwdev->pble_rsrc);
1614 if (status)
1615 break;
1616 iwdev->virtchnl_wq = create_singlethread_workqueue("iwvch");
1617 i40iw_register_notifiers();
1618 iwdev->init_state = INET_NOTIFIER;
1619 status = i40iw_add_mac_ip(iwdev);
1620 if (status)
1621 break;
1622 iwdev->init_state = IP_ADDR_REGISTERED;
1623 if (i40iw_register_rdma_device(iwdev)) {
1624 i40iw_pr_err("register rdma device fail\n");
1625 break;
1626 };
1627
1628 iwdev->init_state = RDMA_DEV_REGISTERED;
1629 iwdev->iw_status = 1;
1630 i40iw_port_ibevent(iwdev);
1631 i40iw_pr_info("i40iw_open completed\n");
1632 return 0;
1633 } while (0);
1634
1635 i40iw_pr_err("status = %d last completion = %d\n", status, iwdev->init_state);
1636 i40iw_deinit_device(iwdev, false, false);
1637 return -ERESTART;
1638 }
1639
1640 /**
1641 * i40iw_l2param_change : handle qs handles for qos and mss change
1642 * @ldev: lan device information
1643 * @client: client for paramater change
1644 * @params: new parameters from L2
1645 */
1646 static void i40iw_l2param_change(struct i40e_info *ldev,
1647 struct i40e_client *client,
1648 struct i40e_params *params)
1649 {
1650 struct i40iw_handler *hdl;
1651 struct i40iw_device *iwdev;
1652
1653 hdl = i40iw_find_i40e_handler(ldev);
1654 if (!hdl)
1655 return;
1656
1657 iwdev = &hdl->device;
1658 if (params->mtu)
1659 iwdev->mss = params->mtu - I40IW_MTU_TO_MSS;
1660 }
1661
1662 /**
1663 * i40iw_close - client interface operation close for iwarp/uda device
1664 * @ldev: lan device information
1665 * @client: client to close
1666 *
1667 * Called by the lan driver during the processing of client unregister
1668 * Destroy and clean up the driver resources
1669 */
1670 static void i40iw_close(struct i40e_info *ldev, struct i40e_client *client, bool reset)
1671 {
1672 struct i40iw_device *iwdev;
1673 struct i40iw_handler *hdl;
1674
1675 hdl = i40iw_find_i40e_handler(ldev);
1676 if (!hdl)
1677 return;
1678
1679 iwdev = &hdl->device;
1680 destroy_workqueue(iwdev->virtchnl_wq);
1681 i40iw_deinit_device(iwdev, reset, true);
1682 }
1683
1684 /**
1685 * i40iw_vf_reset - process VF reset
1686 * @ldev: lan device information
1687 * @client: client interface instance
1688 * @vf_id: virtual function id
1689 *
1690 * Called when a VF is reset by the PF
1691 * Destroy and clean up the VF resources
1692 */
1693 static void i40iw_vf_reset(struct i40e_info *ldev, struct i40e_client *client, u32 vf_id)
1694 {
1695 struct i40iw_handler *hdl;
1696 struct i40iw_sc_dev *dev;
1697 struct i40iw_hmc_fcn_info hmc_fcn_info;
1698 struct i40iw_virt_mem vf_dev_mem;
1699 struct i40iw_vfdev *tmp_vfdev;
1700 unsigned int i;
1701 unsigned long flags;
1702
1703 hdl = i40iw_find_i40e_handler(ldev);
1704 if (!hdl)
1705 return;
1706
1707 dev = &hdl->device.sc_dev;
1708
1709 for (i = 0; i < I40IW_MAX_PE_ENABLED_VF_COUNT; i++) {
1710 if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id != vf_id))
1711 continue;
1712 /* free all resources allocated on behalf of vf */
1713 tmp_vfdev = dev->vf_dev[i];
1714 spin_lock_irqsave(&dev->dev_pestat.stats_lock, flags);
1715 dev->vf_dev[i] = NULL;
1716 spin_unlock_irqrestore(&dev->dev_pestat.stats_lock, flags);
1717 i40iw_del_hmc_objects(dev, &tmp_vfdev->hmc_info, false, false);
1718 /* remove vf hmc function */
1719 memset(&hmc_fcn_info, 0, sizeof(hmc_fcn_info));
1720 hmc_fcn_info.vf_id = vf_id;
1721 hmc_fcn_info.iw_vf_idx = tmp_vfdev->iw_vf_idx;
1722 hmc_fcn_info.free_fcn = true;
1723 i40iw_cqp_manage_hmc_fcn_cmd(dev, &hmc_fcn_info);
1724 /* free vf_dev */
1725 vf_dev_mem.va = tmp_vfdev;
1726 vf_dev_mem.size = sizeof(struct i40iw_vfdev) +
1727 sizeof(struct i40iw_hmc_obj_info) * I40IW_HMC_IW_MAX;
1728 i40iw_free_virt_mem(dev->hw, &vf_dev_mem);
1729 break;
1730 }
1731 }
1732
1733 /**
1734 * i40iw_vf_enable - enable a number of VFs
1735 * @ldev: lan device information
1736 * @client: client interface instance
1737 * @num_vfs: number of VFs for the PF
1738 *
1739 * Called when the number of VFs changes
1740 */
1741 static void i40iw_vf_enable(struct i40e_info *ldev,
1742 struct i40e_client *client,
1743 u32 num_vfs)
1744 {
1745 struct i40iw_handler *hdl;
1746
1747 hdl = i40iw_find_i40e_handler(ldev);
1748 if (!hdl)
1749 return;
1750
1751 if (num_vfs > I40IW_MAX_PE_ENABLED_VF_COUNT)
1752 hdl->device.max_enabled_vfs = I40IW_MAX_PE_ENABLED_VF_COUNT;
1753 else
1754 hdl->device.max_enabled_vfs = num_vfs;
1755 }
1756
1757 /**
1758 * i40iw_vf_capable - check if VF capable
1759 * @ldev: lan device information
1760 * @client: client interface instance
1761 * @vf_id: virtual function id
1762 *
1763 * Return 1 if a VF slot is available or if VF is already RDMA enabled
1764 * Return 0 otherwise
1765 */
1766 static int i40iw_vf_capable(struct i40e_info *ldev,
1767 struct i40e_client *client,
1768 u32 vf_id)
1769 {
1770 struct i40iw_handler *hdl;
1771 struct i40iw_sc_dev *dev;
1772 unsigned int i;
1773
1774 hdl = i40iw_find_i40e_handler(ldev);
1775 if (!hdl)
1776 return 0;
1777
1778 dev = &hdl->device.sc_dev;
1779
1780 for (i = 0; i < hdl->device.max_enabled_vfs; i++) {
1781 if (!dev->vf_dev[i] || (dev->vf_dev[i]->vf_id == vf_id))
1782 return 1;
1783 }
1784
1785 return 0;
1786 }
1787
1788 /**
1789 * i40iw_virtchnl_receive - receive a message through the virtual channel
1790 * @ldev: lan device information
1791 * @client: client interface instance
1792 * @vf_id: virtual function id associated with the message
1793 * @msg: message buffer pointer
1794 * @len: length of the message
1795 *
1796 * Invoke virtual channel receive operation for the given msg
1797 * Return 0 if successful, otherwise return error
1798 */
1799 static int i40iw_virtchnl_receive(struct i40e_info *ldev,
1800 struct i40e_client *client,
1801 u32 vf_id,
1802 u8 *msg,
1803 u16 len)
1804 {
1805 struct i40iw_handler *hdl;
1806 struct i40iw_sc_dev *dev;
1807 struct i40iw_device *iwdev;
1808 int ret_code = I40IW_NOT_SUPPORTED;
1809
1810 if (!len || !msg)
1811 return I40IW_ERR_PARAM;
1812
1813 hdl = i40iw_find_i40e_handler(ldev);
1814 if (!hdl)
1815 return I40IW_ERR_PARAM;
1816
1817 dev = &hdl->device.sc_dev;
1818 iwdev = dev->back_dev;
1819
1820 if (dev->vchnl_if.vchnl_recv) {
1821 ret_code = dev->vchnl_if.vchnl_recv(dev, vf_id, msg, len);
1822 if (!dev->is_pf) {
1823 atomic_dec(&iwdev->vchnl_msgs);
1824 wake_up(&iwdev->vchnl_waitq);
1825 }
1826 }
1827 return ret_code;
1828 }
1829
1830 /**
1831 * i40iw_vf_clear_to_send - wait to send virtual channel message
1832 * @dev: iwarp device *
1833 * Wait for until virtual channel is clear
1834 * before sending the next message
1835 *
1836 * Returns false if error
1837 * Returns true if clear to send
1838 */
1839 bool i40iw_vf_clear_to_send(struct i40iw_sc_dev *dev)
1840 {
1841 struct i40iw_device *iwdev;
1842 wait_queue_t wait;
1843
1844 iwdev = dev->back_dev;
1845
1846 if (!wq_has_sleeper(&dev->vf_reqs) &&
1847 (atomic_read(&iwdev->vchnl_msgs) == 0))
1848 return true; /* virtual channel is clear */
1849
1850 init_wait(&wait);
1851 add_wait_queue_exclusive(&dev->vf_reqs, &wait);
1852
1853 if (!wait_event_timeout(dev->vf_reqs,
1854 (atomic_read(&iwdev->vchnl_msgs) == 0),
1855 I40IW_VCHNL_EVENT_TIMEOUT))
1856 dev->vchnl_up = false;
1857
1858 remove_wait_queue(&dev->vf_reqs, &wait);
1859
1860 return dev->vchnl_up;
1861 }
1862
1863 /**
1864 * i40iw_virtchnl_send - send a message through the virtual channel
1865 * @dev: iwarp device
1866 * @vf_id: virtual function id associated with the message
1867 * @msg: virtual channel message buffer pointer
1868 * @len: length of the message
1869 *
1870 * Invoke virtual channel send operation for the given msg
1871 * Return 0 if successful, otherwise return error
1872 */
1873 static enum i40iw_status_code i40iw_virtchnl_send(struct i40iw_sc_dev *dev,
1874 u32 vf_id,
1875 u8 *msg,
1876 u16 len)
1877 {
1878 struct i40iw_device *iwdev;
1879 struct i40e_info *ldev;
1880
1881 if (!dev || !dev->back_dev)
1882 return I40IW_ERR_BAD_PTR;
1883
1884 iwdev = dev->back_dev;
1885 ldev = iwdev->ldev;
1886
1887 if (ldev && ldev->ops && ldev->ops->virtchnl_send)
1888 return ldev->ops->virtchnl_send(ldev, &i40iw_client, vf_id, msg, len);
1889 return I40IW_ERR_BAD_PTR;
1890 }
1891
1892 /* client interface functions */
1893 static const struct i40e_client_ops i40e_ops = {
1894 .open = i40iw_open,
1895 .close = i40iw_close,
1896 .l2_param_change = i40iw_l2param_change,
1897 .virtchnl_receive = i40iw_virtchnl_receive,
1898 .vf_reset = i40iw_vf_reset,
1899 .vf_enable = i40iw_vf_enable,
1900 .vf_capable = i40iw_vf_capable
1901 };
1902
1903 /**
1904 * i40iw_init_module - driver initialization function
1905 *
1906 * First function to call when the driver is loaded
1907 * Register the driver as i40e client and port mapper client
1908 */
1909 static int __init i40iw_init_module(void)
1910 {
1911 int ret;
1912
1913 memset(&i40iw_client, 0, sizeof(i40iw_client));
1914 i40iw_client.version.major = CLIENT_IW_INTERFACE_VERSION_MAJOR;
1915 i40iw_client.version.minor = CLIENT_IW_INTERFACE_VERSION_MINOR;
1916 i40iw_client.version.build = CLIENT_IW_INTERFACE_VERSION_BUILD;
1917 i40iw_client.ops = &i40e_ops;
1918 memcpy(i40iw_client.name, i40iw_client_name, I40E_CLIENT_STR_LENGTH);
1919 i40iw_client.type = I40E_CLIENT_IWARP;
1920 spin_lock_init(&i40iw_handler_lock);
1921 ret = i40e_register_client(&i40iw_client);
1922 return ret;
1923 }
1924
1925 /**
1926 * i40iw_exit_module - driver exit clean up function
1927 *
1928 * The function is called just before the driver is unloaded
1929 * Unregister the driver as i40e client and port mapper client
1930 */
1931 static void __exit i40iw_exit_module(void)
1932 {
1933 i40e_unregister_client(&i40iw_client);
1934 }
1935
1936 module_init(i40iw_init_module);
1937 module_exit(i40iw_exit_module);
Linux with added FPC-III support