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ALSA: hda - Add the top speaker pin config for HP Spectre x360
[linux/fpc-iii.git] / drivers / infiniband / hw / i40iw / i40iw_verbs.c
blob2360338877bf68ca4a809d153f83a64326fa467c
1 /*******************************************************************************
2 *
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 *
33 *******************************************************************************/
34
35 #include <linux/module.h>
36 #include <linux/moduleparam.h>
37 #include <linux/random.h>
38 #include <linux/highmem.h>
39 #include <linux/time.h>
40 #include <asm/byteorder.h>
41 #include <net/ip.h>
42 #include <rdma/ib_verbs.h>
43 #include <rdma/iw_cm.h>
44 #include <rdma/ib_user_verbs.h>
45 #include <rdma/ib_umem.h>
46 #include "i40iw.h"
47
48 /**
49 * i40iw_query_device - get device attributes
50 * @ibdev: device pointer from stack
51 * @props: returning device attributes
52 * @udata: user data
53 */
54 static int i40iw_query_device(struct ib_device *ibdev,
55 struct ib_device_attr *props,
56 struct ib_udata *udata)
57 {
58 struct i40iw_device *iwdev = to_iwdev(ibdev);
59
60 if (udata->inlen || udata->outlen)
61 return -EINVAL;
62 memset(props, 0, sizeof(*props));
63 ether_addr_copy((u8 *)&props->sys_image_guid, iwdev->netdev->dev_addr);
64 props->fw_ver = I40IW_FW_VERSION;
65 props->device_cap_flags = iwdev->device_cap_flags;
66 props->vendor_id = iwdev->ldev->pcidev->vendor;
67 props->vendor_part_id = iwdev->ldev->pcidev->device;
68 props->hw_ver = (u32)iwdev->sc_dev.hw_rev;
69 props->max_mr_size = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
70 props->max_qp = iwdev->max_qp;
71 props->max_qp_wr = (I40IW_MAX_WQ_ENTRIES >> 2) - 1;
72 props->max_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
73 props->max_cq = iwdev->max_cq;
74 props->max_cqe = iwdev->max_cqe;
75 props->max_mr = iwdev->max_mr;
76 props->max_pd = iwdev->max_pd;
77 props->max_sge_rd = I40IW_MAX_SGE_RD;
78 props->max_qp_rd_atom = I40IW_MAX_IRD_SIZE;
79 props->max_qp_init_rd_atom = props->max_qp_rd_atom;
80 props->atomic_cap = IB_ATOMIC_NONE;
81 props->max_map_per_fmr = 1;
82 props->max_fast_reg_page_list_len = I40IW_MAX_PAGES_PER_FMR;
83 return 0;
84 }
85
86 /**
87 * i40iw_query_port - get port attrubutes
88 * @ibdev: device pointer from stack
89 * @port: port number for query
90 * @props: returning device attributes
91 */
92 static int i40iw_query_port(struct ib_device *ibdev,
93 u8 port,
94 struct ib_port_attr *props)
95 {
96 struct i40iw_device *iwdev = to_iwdev(ibdev);
97 struct net_device *netdev = iwdev->netdev;
98
99 memset(props, 0, sizeof(*props));
100
101 props->max_mtu = IB_MTU_4096;
102 if (netdev->mtu >= 4096)
103 props->active_mtu = IB_MTU_4096;
104 else if (netdev->mtu >= 2048)
105 props->active_mtu = IB_MTU_2048;
106 else if (netdev->mtu >= 1024)
107 props->active_mtu = IB_MTU_1024;
108 else if (netdev->mtu >= 512)
109 props->active_mtu = IB_MTU_512;
110 else
111 props->active_mtu = IB_MTU_256;
112
113 props->lid = 1;
114 if (netif_carrier_ok(iwdev->netdev))
115 props->state = IB_PORT_ACTIVE;
116 else
117 props->state = IB_PORT_DOWN;
118 props->port_cap_flags = IB_PORT_CM_SUP | IB_PORT_REINIT_SUP |
119 IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP;
120 props->gid_tbl_len = 1;
121 props->pkey_tbl_len = 1;
122 props->active_width = IB_WIDTH_4X;
123 props->active_speed = 1;
124 props->max_msg_sz = I40IW_MAX_OUTBOUND_MESSAGE_SIZE;
125 return 0;
126 }
127
128 /**
129 * i40iw_alloc_ucontext - Allocate the user context data structure
130 * @ibdev: device pointer from stack
131 * @udata: user data
132 *
133 * This keeps track of all objects associated with a particular
134 * user-mode client.
135 */
136 static struct ib_ucontext *i40iw_alloc_ucontext(struct ib_device *ibdev,
137 struct ib_udata *udata)
138 {
139 struct i40iw_device *iwdev = to_iwdev(ibdev);
140 struct i40iw_alloc_ucontext_req req;
141 struct i40iw_alloc_ucontext_resp uresp;
142 struct i40iw_ucontext *ucontext;
143
144 if (ib_copy_from_udata(&req, udata, sizeof(req)))
145 return ERR_PTR(-EINVAL);
146
147 if (req.userspace_ver != I40IW_ABI_USERSPACE_VER) {
148 i40iw_pr_err("Invalid userspace driver version detected. Detected version %d, should be %d\n",
149 req.userspace_ver, I40IW_ABI_USERSPACE_VER);
150 return ERR_PTR(-EINVAL);
151 }
152
153 memset(&uresp, 0, sizeof(uresp));
154 uresp.max_qps = iwdev->max_qp;
155 uresp.max_pds = iwdev->max_pd;
156 uresp.wq_size = iwdev->max_qp_wr * 2;
157 uresp.kernel_ver = I40IW_ABI_KERNEL_VER;
158
159 ucontext = kzalloc(sizeof(*ucontext), GFP_KERNEL);
160 if (!ucontext)
161 return ERR_PTR(-ENOMEM);
162
163 ucontext->iwdev = iwdev;
164
165 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
166 kfree(ucontext);
167 return ERR_PTR(-EFAULT);
168 }
169
170 INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
171 spin_lock_init(&ucontext->cq_reg_mem_list_lock);
172 INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
173 spin_lock_init(&ucontext->qp_reg_mem_list_lock);
174
175 return &ucontext->ibucontext;
176 }
177
178 /**
179 * i40iw_dealloc_ucontext - deallocate the user context data structure
180 * @context: user context created during alloc
181 */
182 static int i40iw_dealloc_ucontext(struct ib_ucontext *context)
183 {
184 struct i40iw_ucontext *ucontext = to_ucontext(context);
185 unsigned long flags;
186
187 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
188 if (!list_empty(&ucontext->cq_reg_mem_list)) {
189 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
190 return -EBUSY;
191 }
192 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
193 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
194 if (!list_empty(&ucontext->qp_reg_mem_list)) {
195 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
196 return -EBUSY;
197 }
198 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
199
200 kfree(ucontext);
201 return 0;
202 }
203
204 /**
205 * i40iw_mmap - user memory map
206 * @context: context created during alloc
207 * @vma: kernel info for user memory map
208 */
209 static int i40iw_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
210 {
211 struct i40iw_ucontext *ucontext;
212 u64 db_addr_offset;
213 u64 push_offset;
214
215 ucontext = to_ucontext(context);
216 if (ucontext->iwdev->sc_dev.is_pf) {
217 db_addr_offset = I40IW_DB_ADDR_OFFSET;
218 push_offset = I40IW_PUSH_OFFSET;
219 if (vma->vm_pgoff)
220 vma->vm_pgoff += I40IW_PF_FIRST_PUSH_PAGE_INDEX - 1;
221 } else {
222 db_addr_offset = I40IW_VF_DB_ADDR_OFFSET;
223 push_offset = I40IW_VF_PUSH_OFFSET;
224 if (vma->vm_pgoff)
225 vma->vm_pgoff += I40IW_VF_FIRST_PUSH_PAGE_INDEX - 1;
226 }
227
228 vma->vm_pgoff += db_addr_offset >> PAGE_SHIFT;
229
230 if (vma->vm_pgoff == (db_addr_offset >> PAGE_SHIFT)) {
231 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
232 vma->vm_private_data = ucontext;
233 } else {
234 if ((vma->vm_pgoff - (push_offset >> PAGE_SHIFT)) % 2)
235 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
236 else
237 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
238 }
239
240 if (io_remap_pfn_range(vma, vma->vm_start,
241 vma->vm_pgoff + (pci_resource_start(ucontext->iwdev->ldev->pcidev, 0) >> PAGE_SHIFT),
242 PAGE_SIZE, vma->vm_page_prot))
243 return -EAGAIN;
244
245 return 0;
246 }
247
248 /**
249 * i40iw_alloc_push_page - allocate a push page for qp
250 * @iwdev: iwarp device
251 * @qp: hardware control qp
252 */
253 static void i40iw_alloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
254 {
255 struct i40iw_cqp_request *cqp_request;
256 struct cqp_commands_info *cqp_info;
257 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
258 enum i40iw_status_code status;
259
260 if (qp->push_idx != I40IW_INVALID_PUSH_PAGE_INDEX)
261 return;
262
263 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
264 if (!cqp_request)
265 return;
266
267 atomic_inc(&cqp_request->refcount);
268
269 cqp_info = &cqp_request->info;
270 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
271 cqp_info->post_sq = 1;
272
273 cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
274 cqp_info->in.u.manage_push_page.info.free_page = 0;
275 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
276 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
277
278 status = i40iw_handle_cqp_op(iwdev, cqp_request);
279 if (!status)
280 qp->push_idx = cqp_request->compl_info.op_ret_val;
281 else
282 i40iw_pr_err("CQP-OP Push page fail");
283 i40iw_put_cqp_request(&iwdev->cqp, cqp_request);
284 }
285
286 /**
287 * i40iw_dealloc_push_page - free a push page for qp
288 * @iwdev: iwarp device
289 * @qp: hardware control qp
290 */
291 static void i40iw_dealloc_push_page(struct i40iw_device *iwdev, struct i40iw_sc_qp *qp)
292 {
293 struct i40iw_cqp_request *cqp_request;
294 struct cqp_commands_info *cqp_info;
295 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
296 enum i40iw_status_code status;
297
298 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX)
299 return;
300
301 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, false);
302 if (!cqp_request)
303 return;
304
305 cqp_info = &cqp_request->info;
306 cqp_info->cqp_cmd = OP_MANAGE_PUSH_PAGE;
307 cqp_info->post_sq = 1;
308
309 cqp_info->in.u.manage_push_page.info.push_idx = qp->push_idx;
310 cqp_info->in.u.manage_push_page.info.qs_handle = dev->qs_handle;
311 cqp_info->in.u.manage_push_page.info.free_page = 1;
312 cqp_info->in.u.manage_push_page.cqp = &iwdev->cqp.sc_cqp;
313 cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
314
315 status = i40iw_handle_cqp_op(iwdev, cqp_request);
316 if (!status)
317 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
318 else
319 i40iw_pr_err("CQP-OP Push page fail");
320 }
321
322 /**
323 * i40iw_alloc_pd - allocate protection domain
324 * @ibdev: device pointer from stack
325 * @context: user context created during alloc
326 * @udata: user data
327 */
328 static struct ib_pd *i40iw_alloc_pd(struct ib_device *ibdev,
329 struct ib_ucontext *context,
330 struct ib_udata *udata)
331 {
332 struct i40iw_pd *iwpd;
333 struct i40iw_device *iwdev = to_iwdev(ibdev);
334 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
335 struct i40iw_alloc_pd_resp uresp;
336 struct i40iw_sc_pd *sc_pd;
337 u32 pd_id = 0;
338 int err;
339
340 err = i40iw_alloc_resource(iwdev, iwdev->allocated_pds,
341 iwdev->max_pd, &pd_id, &iwdev->next_pd);
342 if (err) {
343 i40iw_pr_err("alloc resource failed\n");
344 return ERR_PTR(err);
345 }
346
347 iwpd = kzalloc(sizeof(*iwpd), GFP_KERNEL);
348 if (!iwpd) {
349 err = -ENOMEM;
350 goto free_res;
351 }
352
353 sc_pd = &iwpd->sc_pd;
354 dev->iw_pd_ops->pd_init(dev, sc_pd, pd_id);
355
356 if (context) {
357 memset(&uresp, 0, sizeof(uresp));
358 uresp.pd_id = pd_id;
359 if (ib_copy_to_udata(udata, &uresp, sizeof(uresp))) {
360 err = -EFAULT;
361 goto error;
362 }
363 }
364
365 i40iw_add_pdusecount(iwpd);
366 return &iwpd->ibpd;
367 error:
368 kfree(iwpd);
369 free_res:
370 i40iw_free_resource(iwdev, iwdev->allocated_pds, pd_id);
371 return ERR_PTR(err);
372 }
373
374 /**
375 * i40iw_dealloc_pd - deallocate pd
376 * @ibpd: ptr of pd to be deallocated
377 */
378 static int i40iw_dealloc_pd(struct ib_pd *ibpd)
379 {
380 struct i40iw_pd *iwpd = to_iwpd(ibpd);
381 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
382
383 i40iw_rem_pdusecount(iwpd, iwdev);
384 return 0;
385 }
386
387 /**
388 * i40iw_qp_roundup - return round up qp ring size
389 * @wr_ring_size: ring size to round up
390 */
391 static int i40iw_qp_roundup(u32 wr_ring_size)
392 {
393 int scount = 1;
394
395 if (wr_ring_size < I40IWQP_SW_MIN_WQSIZE)
396 wr_ring_size = I40IWQP_SW_MIN_WQSIZE;
397
398 for (wr_ring_size--; scount <= 16; scount *= 2)
399 wr_ring_size |= wr_ring_size >> scount;
400 return ++wr_ring_size;
401 }
402
403 /**
404 * i40iw_get_pbl - Retrieve pbl from a list given a virtual
405 * address
406 * @va: user virtual address
407 * @pbl_list: pbl list to search in (QP's or CQ's)
408 */
409 static struct i40iw_pbl *i40iw_get_pbl(unsigned long va,
410 struct list_head *pbl_list)
411 {
412 struct i40iw_pbl *iwpbl;
413
414 list_for_each_entry(iwpbl, pbl_list, list) {
415 if (iwpbl->user_base == va) {
416 list_del(&iwpbl->list);
417 return iwpbl;
418 }
419 }
420 return NULL;
421 }
422
423 /**
424 * i40iw_free_qp_resources - free up memory resources for qp
425 * @iwdev: iwarp device
426 * @iwqp: qp ptr (user or kernel)
427 * @qp_num: qp number assigned
428 */
429 void i40iw_free_qp_resources(struct i40iw_device *iwdev,
430 struct i40iw_qp *iwqp,
431 u32 qp_num)
432 {
433 i40iw_dealloc_push_page(iwdev, &iwqp->sc_qp);
434 if (qp_num)
435 i40iw_free_resource(iwdev, iwdev->allocated_qps, qp_num);
436 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->q2_ctx_mem);
437 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwqp->kqp.dma_mem);
438 kfree(iwqp->kqp.wrid_mem);
439 iwqp->kqp.wrid_mem = NULL;
440 kfree(iwqp->allocated_buffer);
441 }
442
443 /**
444 * i40iw_clean_cqes - clean cq entries for qp
445 * @iwqp: qp ptr (user or kernel)
446 * @iwcq: cq ptr
447 */
448 static void i40iw_clean_cqes(struct i40iw_qp *iwqp, struct i40iw_cq *iwcq)
449 {
450 struct i40iw_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
451
452 ukcq->ops.iw_cq_clean(&iwqp->sc_qp.qp_uk, ukcq);
453 }
454
455 /**
456 * i40iw_destroy_qp - destroy qp
457 * @ibqp: qp's ib pointer also to get to device's qp address
458 */
459 static int i40iw_destroy_qp(struct ib_qp *ibqp)
460 {
461 struct i40iw_qp *iwqp = to_iwqp(ibqp);
462
463 iwqp->destroyed = 1;
464
465 if (iwqp->ibqp_state >= IB_QPS_INIT && iwqp->ibqp_state < IB_QPS_RTS)
466 i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 0, 0, 0);
467
468 if (!iwqp->user_mode) {
469 if (iwqp->iwscq) {
470 i40iw_clean_cqes(iwqp, iwqp->iwscq);
471 if (iwqp->iwrcq != iwqp->iwscq)
472 i40iw_clean_cqes(iwqp, iwqp->iwrcq);
473 }
474 }
475
476 i40iw_rem_ref(&iwqp->ibqp);
477 return 0;
478 }
479
480 /**
481 * i40iw_setup_virt_qp - setup for allocation of virtual qp
482 * @dev: iwarp device
483 * @qp: qp ptr
484 * @init_info: initialize info to return
485 */
486 static int i40iw_setup_virt_qp(struct i40iw_device *iwdev,
487 struct i40iw_qp *iwqp,
488 struct i40iw_qp_init_info *init_info)
489 {
490 struct i40iw_pbl *iwpbl = iwqp->iwpbl;
491 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
492
493 iwqp->page = qpmr->sq_page;
494 init_info->shadow_area_pa = cpu_to_le64(qpmr->shadow);
495 if (iwpbl->pbl_allocated) {
496 init_info->virtual_map = true;
497 init_info->sq_pa = qpmr->sq_pbl.idx;
498 init_info->rq_pa = qpmr->rq_pbl.idx;
499 } else {
500 init_info->sq_pa = qpmr->sq_pbl.addr;
501 init_info->rq_pa = qpmr->rq_pbl.addr;
502 }
503 return 0;
504 }
505
506 /**
507 * i40iw_setup_kmode_qp - setup initialization for kernel mode qp
508 * @iwdev: iwarp device
509 * @iwqp: qp ptr (user or kernel)
510 * @info: initialize info to return
511 */
512 static int i40iw_setup_kmode_qp(struct i40iw_device *iwdev,
513 struct i40iw_qp *iwqp,
514 struct i40iw_qp_init_info *info)
515 {
516 struct i40iw_dma_mem *mem = &iwqp->kqp.dma_mem;
517 u32 sqdepth, rqdepth;
518 u32 sq_size, rq_size;
519 u8 sqshift, rqshift;
520 u32 size;
521 enum i40iw_status_code status;
522 struct i40iw_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
523
524 sq_size = i40iw_qp_roundup(ukinfo->sq_size + 1);
525 rq_size = i40iw_qp_roundup(ukinfo->rq_size + 1);
526
527 status = i40iw_get_wqe_shift(sq_size, ukinfo->max_sq_frag_cnt, ukinfo->max_inline_data, &sqshift);
528 if (!status)
529 status = i40iw_get_wqe_shift(rq_size, ukinfo->max_rq_frag_cnt, 0, &rqshift);
530
531 if (status)
532 return -ENOMEM;
533
534 sqdepth = sq_size << sqshift;
535 rqdepth = rq_size << rqshift;
536
537 size = sqdepth * sizeof(struct i40iw_sq_uk_wr_trk_info) + (rqdepth << 3);
538 iwqp->kqp.wrid_mem = kzalloc(size, GFP_KERNEL);
539
540 ukinfo->sq_wrtrk_array = (struct i40iw_sq_uk_wr_trk_info *)iwqp->kqp.wrid_mem;
541 if (!ukinfo->sq_wrtrk_array)
542 return -ENOMEM;
543
544 ukinfo->rq_wrid_array = (u64 *)&ukinfo->sq_wrtrk_array[sqdepth];
545
546 size = (sqdepth + rqdepth) * I40IW_QP_WQE_MIN_SIZE;
547 size += (I40IW_SHADOW_AREA_SIZE << 3);
548
549 status = i40iw_allocate_dma_mem(iwdev->sc_dev.hw, mem, size, 256);
550 if (status) {
551 kfree(ukinfo->sq_wrtrk_array);
552 ukinfo->sq_wrtrk_array = NULL;
553 return -ENOMEM;
554 }
555
556 ukinfo->sq = mem->va;
557 info->sq_pa = mem->pa;
558
559 ukinfo->rq = &ukinfo->sq[sqdepth];
560 info->rq_pa = info->sq_pa + (sqdepth * I40IW_QP_WQE_MIN_SIZE);
561
562 ukinfo->shadow_area = ukinfo->rq[rqdepth].elem;
563 info->shadow_area_pa = info->rq_pa + (rqdepth * I40IW_QP_WQE_MIN_SIZE);
564
565 ukinfo->sq_size = sq_size;
566 ukinfo->rq_size = rq_size;
567 ukinfo->qp_id = iwqp->ibqp.qp_num;
568 return 0;
569 }
570
571 /**
572 * i40iw_create_qp - create qp
573 * @ibpd: ptr of pd
574 * @init_attr: attributes for qp
575 * @udata: user data for create qp
576 */
577 static struct ib_qp *i40iw_create_qp(struct ib_pd *ibpd,
578 struct ib_qp_init_attr *init_attr,
579 struct ib_udata *udata)
580 {
581 struct i40iw_pd *iwpd = to_iwpd(ibpd);
582 struct i40iw_device *iwdev = to_iwdev(ibpd->device);
583 struct i40iw_cqp *iwcqp = &iwdev->cqp;
584 struct i40iw_qp *iwqp;
585 struct i40iw_ucontext *ucontext;
586 struct i40iw_create_qp_req req;
587 struct i40iw_create_qp_resp uresp;
588 u32 qp_num = 0;
589 void *mem;
590 enum i40iw_status_code ret;
591 int err_code;
592 int sq_size;
593 int rq_size;
594 struct i40iw_sc_qp *qp;
595 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
596 struct i40iw_qp_init_info init_info;
597 struct i40iw_create_qp_info *qp_info;
598 struct i40iw_cqp_request *cqp_request;
599 struct cqp_commands_info *cqp_info;
600
601 struct i40iw_qp_host_ctx_info *ctx_info;
602 struct i40iwarp_offload_info *iwarp_info;
603 unsigned long flags;
604
605 if (init_attr->create_flags)
606 return ERR_PTR(-EINVAL);
607 if (init_attr->cap.max_inline_data > I40IW_MAX_INLINE_DATA_SIZE)
608 init_attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
609
610 if (init_attr->cap.max_send_sge > I40IW_MAX_WQ_FRAGMENT_COUNT)
611 init_attr->cap.max_send_sge = I40IW_MAX_WQ_FRAGMENT_COUNT;
612
613 memset(&init_info, 0, sizeof(init_info));
614
615 sq_size = init_attr->cap.max_send_wr;
616 rq_size = init_attr->cap.max_recv_wr;
617
618 init_info.qp_uk_init_info.sq_size = sq_size;
619 init_info.qp_uk_init_info.rq_size = rq_size;
620 init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
621 init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
622 init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
623
624 mem = kzalloc(sizeof(*iwqp), GFP_KERNEL);
625 if (!mem)
626 return ERR_PTR(-ENOMEM);
627
628 iwqp = (struct i40iw_qp *)mem;
629 qp = &iwqp->sc_qp;
630 qp->back_qp = (void *)iwqp;
631 qp->push_idx = I40IW_INVALID_PUSH_PAGE_INDEX;
632
633 iwqp->ctx_info.iwarp_info = &iwqp->iwarp_info;
634
635 if (i40iw_allocate_dma_mem(dev->hw,
636 &iwqp->q2_ctx_mem,
637 I40IW_Q2_BUFFER_SIZE + I40IW_QP_CTX_SIZE,
638 256)) {
639 i40iw_pr_err("dma_mem failed\n");
640 err_code = -ENOMEM;
641 goto error;
642 }
643
644 init_info.q2 = iwqp->q2_ctx_mem.va;
645 init_info.q2_pa = iwqp->q2_ctx_mem.pa;
646
647 init_info.host_ctx = (void *)init_info.q2 + I40IW_Q2_BUFFER_SIZE;
648 init_info.host_ctx_pa = init_info.q2_pa + I40IW_Q2_BUFFER_SIZE;
649
650 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_qps, iwdev->max_qp,
651 &qp_num, &iwdev->next_qp);
652 if (err_code) {
653 i40iw_pr_err("qp resource\n");
654 goto error;
655 }
656
657 iwqp->allocated_buffer = mem;
658 iwqp->iwdev = iwdev;
659 iwqp->iwpd = iwpd;
660 iwqp->ibqp.qp_num = qp_num;
661 qp = &iwqp->sc_qp;
662 iwqp->iwscq = to_iwcq(init_attr->send_cq);
663 iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
664
665 iwqp->host_ctx.va = init_info.host_ctx;
666 iwqp->host_ctx.pa = init_info.host_ctx_pa;
667 iwqp->host_ctx.size = I40IW_QP_CTX_SIZE;
668
669 init_info.pd = &iwpd->sc_pd;
670 init_info.qp_uk_init_info.qp_id = iwqp->ibqp.qp_num;
671 iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
672
673 if (init_attr->qp_type != IB_QPT_RC) {
674 err_code = -EINVAL;
675 goto error;
676 }
677 if (iwdev->push_mode)
678 i40iw_alloc_push_page(iwdev, qp);
679 if (udata) {
680 err_code = ib_copy_from_udata(&req, udata, sizeof(req));
681 if (err_code) {
682 i40iw_pr_err("ib_copy_from_data\n");
683 goto error;
684 }
685 iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
686 if (ibpd->uobject && ibpd->uobject->context) {
687 iwqp->user_mode = 1;
688 ucontext = to_ucontext(ibpd->uobject->context);
689
690 if (req.user_wqe_buffers) {
691 spin_lock_irqsave(
692 &ucontext->qp_reg_mem_list_lock, flags);
693 iwqp->iwpbl = i40iw_get_pbl(
694 (unsigned long)req.user_wqe_buffers,
695 &ucontext->qp_reg_mem_list);
696 spin_unlock_irqrestore(
697 &ucontext->qp_reg_mem_list_lock, flags);
698
699 if (!iwqp->iwpbl) {
700 err_code = -ENODATA;
701 i40iw_pr_err("no pbl info\n");
702 goto error;
703 }
704 }
705 }
706 err_code = i40iw_setup_virt_qp(iwdev, iwqp, &init_info);
707 } else {
708 err_code = i40iw_setup_kmode_qp(iwdev, iwqp, &init_info);
709 }
710
711 if (err_code) {
712 i40iw_pr_err("setup qp failed\n");
713 goto error;
714 }
715
716 init_info.type = I40IW_QP_TYPE_IWARP;
717 ret = dev->iw_priv_qp_ops->qp_init(qp, &init_info);
718 if (ret) {
719 err_code = -EPROTO;
720 i40iw_pr_err("qp_init fail\n");
721 goto error;
722 }
723 ctx_info = &iwqp->ctx_info;
724 iwarp_info = &iwqp->iwarp_info;
725 iwarp_info->rd_enable = true;
726 iwarp_info->wr_rdresp_en = true;
727 if (!iwqp->user_mode) {
728 iwarp_info->fast_reg_en = true;
729 iwarp_info->priv_mode_en = true;
730 }
731 iwarp_info->ddp_ver = 1;
732 iwarp_info->rdmap_ver = 1;
733
734 ctx_info->iwarp_info_valid = true;
735 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
736 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
737 if (qp->push_idx == I40IW_INVALID_PUSH_PAGE_INDEX) {
738 ctx_info->push_mode_en = false;
739 } else {
740 ctx_info->push_mode_en = true;
741 ctx_info->push_idx = qp->push_idx;
742 }
743
744 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
745 (u64 *)iwqp->host_ctx.va,
746 ctx_info);
747 ctx_info->iwarp_info_valid = false;
748 cqp_request = i40iw_get_cqp_request(iwcqp, true);
749 if (!cqp_request) {
750 err_code = -ENOMEM;
751 goto error;
752 }
753 cqp_info = &cqp_request->info;
754 qp_info = &cqp_request->info.in.u.qp_create.info;
755
756 memset(qp_info, 0, sizeof(*qp_info));
757
758 qp_info->cq_num_valid = true;
759 qp_info->next_iwarp_state = I40IW_QP_STATE_IDLE;
760
761 cqp_info->cqp_cmd = OP_QP_CREATE;
762 cqp_info->post_sq = 1;
763 cqp_info->in.u.qp_create.qp = qp;
764 cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
765 ret = i40iw_handle_cqp_op(iwdev, cqp_request);
766 if (ret) {
767 i40iw_pr_err("CQP-OP QP create fail");
768 err_code = -EACCES;
769 goto error;
770 }
771
772 i40iw_add_ref(&iwqp->ibqp);
773 spin_lock_init(&iwqp->lock);
774 iwqp->sig_all = (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) ? 1 : 0;
775 iwdev->qp_table[qp_num] = iwqp;
776 i40iw_add_pdusecount(iwqp->iwpd);
777 if (ibpd->uobject && udata) {
778 memset(&uresp, 0, sizeof(uresp));
779 uresp.actual_sq_size = sq_size;
780 uresp.actual_rq_size = rq_size;
781 uresp.qp_id = qp_num;
782 uresp.push_idx = qp->push_idx;
783 err_code = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
784 if (err_code) {
785 i40iw_pr_err("copy_to_udata failed\n");
786 i40iw_destroy_qp(&iwqp->ibqp);
787 /* let the completion of the qp destroy free the qp */
788 return ERR_PTR(err_code);
789 }
790 }
791 init_completion(&iwqp->sq_drained);
792 init_completion(&iwqp->rq_drained);
793
794 return &iwqp->ibqp;
795 error:
796 i40iw_free_qp_resources(iwdev, iwqp, qp_num);
797 kfree(mem);
798 return ERR_PTR(err_code);
799 }
800
801 /**
802 * i40iw_query - query qp attributes
803 * @ibqp: qp pointer
804 * @attr: attributes pointer
805 * @attr_mask: Not used
806 * @init_attr: qp attributes to return
807 */
808 static int i40iw_query_qp(struct ib_qp *ibqp,
809 struct ib_qp_attr *attr,
810 int attr_mask,
811 struct ib_qp_init_attr *init_attr)
812 {
813 struct i40iw_qp *iwqp = to_iwqp(ibqp);
814 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
815
816 attr->qp_access_flags = 0;
817 attr->cap.max_send_wr = qp->qp_uk.sq_size;
818 attr->cap.max_recv_wr = qp->qp_uk.rq_size;
819 attr->cap.max_recv_sge = 1;
820 attr->cap.max_inline_data = I40IW_MAX_INLINE_DATA_SIZE;
821 init_attr->event_handler = iwqp->ibqp.event_handler;
822 init_attr->qp_context = iwqp->ibqp.qp_context;
823 init_attr->send_cq = iwqp->ibqp.send_cq;
824 init_attr->recv_cq = iwqp->ibqp.recv_cq;
825 init_attr->srq = iwqp->ibqp.srq;
826 init_attr->cap = attr->cap;
827 return 0;
828 }
829
830 /**
831 * i40iw_hw_modify_qp - setup cqp for modify qp
832 * @iwdev: iwarp device
833 * @iwqp: qp ptr (user or kernel)
834 * @info: info for modify qp
835 * @wait: flag to wait or not for modify qp completion
836 */
837 void i40iw_hw_modify_qp(struct i40iw_device *iwdev, struct i40iw_qp *iwqp,
838 struct i40iw_modify_qp_info *info, bool wait)
839 {
840 enum i40iw_status_code status;
841 struct i40iw_cqp_request *cqp_request;
842 struct cqp_commands_info *cqp_info;
843 struct i40iw_modify_qp_info *m_info;
844
845 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, wait);
846 if (!cqp_request)
847 return;
848
849 cqp_info = &cqp_request->info;
850 m_info = &cqp_info->in.u.qp_modify.info;
851 memcpy(m_info, info, sizeof(*m_info));
852 cqp_info->cqp_cmd = OP_QP_MODIFY;
853 cqp_info->post_sq = 1;
854 cqp_info->in.u.qp_modify.qp = &iwqp->sc_qp;
855 cqp_info->in.u.qp_modify.scratch = (uintptr_t)cqp_request;
856 status = i40iw_handle_cqp_op(iwdev, cqp_request);
857 if (status)
858 i40iw_pr_err("CQP-OP Modify QP fail");
859 }
860
861 /**
862 * i40iw_modify_qp - modify qp request
863 * @ibqp: qp's pointer for modify
864 * @attr: access attributes
865 * @attr_mask: state mask
866 * @udata: user data
867 */
868 int i40iw_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
869 int attr_mask, struct ib_udata *udata)
870 {
871 struct i40iw_qp *iwqp = to_iwqp(ibqp);
872 struct i40iw_device *iwdev = iwqp->iwdev;
873 struct i40iw_qp_host_ctx_info *ctx_info;
874 struct i40iwarp_offload_info *iwarp_info;
875 struct i40iw_modify_qp_info info;
876 u8 issue_modify_qp = 0;
877 u8 dont_wait = 0;
878 u32 err;
879 unsigned long flags;
880
881 memset(&info, 0, sizeof(info));
882 ctx_info = &iwqp->ctx_info;
883 iwarp_info = &iwqp->iwarp_info;
884
885 spin_lock_irqsave(&iwqp->lock, flags);
886
887 if (attr_mask & IB_QP_STATE) {
888 switch (attr->qp_state) {
889 case IB_QPS_INIT:
890 case IB_QPS_RTR:
891 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_IDLE) {
892 err = -EINVAL;
893 goto exit;
894 }
895 if (iwqp->iwarp_state == I40IW_QP_STATE_INVALID) {
896 info.next_iwarp_state = I40IW_QP_STATE_IDLE;
897 issue_modify_qp = 1;
898 }
899 break;
900 case IB_QPS_RTS:
901 if ((iwqp->iwarp_state > (u32)I40IW_QP_STATE_RTS) ||
902 (!iwqp->cm_id)) {
903 err = -EINVAL;
904 goto exit;
905 }
906
907 issue_modify_qp = 1;
908 iwqp->hw_tcp_state = I40IW_TCP_STATE_ESTABLISHED;
909 iwqp->hte_added = 1;
910 info.next_iwarp_state = I40IW_QP_STATE_RTS;
911 info.tcp_ctx_valid = true;
912 info.ord_valid = true;
913 info.arp_cache_idx_valid = true;
914 info.cq_num_valid = true;
915 break;
916 case IB_QPS_SQD:
917 if (iwqp->hw_iwarp_state > (u32)I40IW_QP_STATE_RTS) {
918 err = 0;
919 goto exit;
920 }
921 if ((iwqp->iwarp_state == (u32)I40IW_QP_STATE_CLOSING) ||
922 (iwqp->iwarp_state < (u32)I40IW_QP_STATE_RTS)) {
923 err = 0;
924 goto exit;
925 }
926 if (iwqp->iwarp_state > (u32)I40IW_QP_STATE_CLOSING) {
927 err = -EINVAL;
928 goto exit;
929 }
930 info.next_iwarp_state = I40IW_QP_STATE_CLOSING;
931 issue_modify_qp = 1;
932 break;
933 case IB_QPS_SQE:
934 if (iwqp->iwarp_state >= (u32)I40IW_QP_STATE_TERMINATE) {
935 err = -EINVAL;
936 goto exit;
937 }
938 info.next_iwarp_state = I40IW_QP_STATE_TERMINATE;
939 issue_modify_qp = 1;
940 break;
941 case IB_QPS_ERR:
942 case IB_QPS_RESET:
943 if (iwqp->iwarp_state == (u32)I40IW_QP_STATE_ERROR) {
944 err = -EINVAL;
945 goto exit;
946 }
947 if (iwqp->sc_qp.term_flags)
948 del_timer(&iwqp->terminate_timer);
949 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
950 if ((iwqp->hw_tcp_state > I40IW_TCP_STATE_CLOSED) &&
951 iwdev->iw_status &&
952 (iwqp->hw_tcp_state != I40IW_TCP_STATE_TIME_WAIT))
953 info.reset_tcp_conn = true;
954 else
955 dont_wait = 1;
956 issue_modify_qp = 1;
957 info.next_iwarp_state = I40IW_QP_STATE_ERROR;
958 break;
959 default:
960 err = -EINVAL;
961 goto exit;
962 }
963
964 iwqp->ibqp_state = attr->qp_state;
965
966 if (issue_modify_qp)
967 iwqp->iwarp_state = info.next_iwarp_state;
968 else
969 info.next_iwarp_state = iwqp->iwarp_state;
970 }
971 if (attr_mask & IB_QP_ACCESS_FLAGS) {
972 ctx_info->iwarp_info_valid = true;
973 if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
974 iwarp_info->wr_rdresp_en = true;
975 if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
976 iwarp_info->wr_rdresp_en = true;
977 if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
978 iwarp_info->rd_enable = true;
979 if (attr->qp_access_flags & IB_ACCESS_MW_BIND)
980 iwarp_info->bind_en = true;
981
982 if (iwqp->user_mode) {
983 iwarp_info->rd_enable = true;
984 iwarp_info->wr_rdresp_en = true;
985 iwarp_info->priv_mode_en = false;
986 }
987 }
988
989 if (ctx_info->iwarp_info_valid) {
990 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
991 int ret;
992
993 ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
994 ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
995 ret = dev->iw_priv_qp_ops->qp_setctx(&iwqp->sc_qp,
996 (u64 *)iwqp->host_ctx.va,
997 ctx_info);
998 if (ret) {
999 i40iw_pr_err("setting QP context\n");
1000 err = -EINVAL;
1001 goto exit;
1002 }
1003 }
1004
1005 spin_unlock_irqrestore(&iwqp->lock, flags);
1006
1007 if (issue_modify_qp)
1008 i40iw_hw_modify_qp(iwdev, iwqp, &info, true);
1009
1010 if (issue_modify_qp && (iwqp->ibqp_state > IB_QPS_RTS)) {
1011 if (dont_wait) {
1012 if (iwqp->cm_id && iwqp->hw_tcp_state) {
1013 spin_lock_irqsave(&iwqp->lock, flags);
1014 iwqp->hw_tcp_state = I40IW_TCP_STATE_CLOSED;
1015 iwqp->last_aeq = I40IW_AE_RESET_SENT;
1016 spin_unlock_irqrestore(&iwqp->lock, flags);
1017 }
1018 }
1019 }
1020 return 0;
1021 exit:
1022 spin_unlock_irqrestore(&iwqp->lock, flags);
1023 return err;
1024 }
1025
1026 /**
1027 * cq_free_resources - free up recources for cq
1028 * @iwdev: iwarp device
1029 * @iwcq: cq ptr
1030 */
1031 static void cq_free_resources(struct i40iw_device *iwdev, struct i40iw_cq *iwcq)
1032 {
1033 struct i40iw_sc_cq *cq = &iwcq->sc_cq;
1034
1035 if (!iwcq->user_mode)
1036 i40iw_free_dma_mem(iwdev->sc_dev.hw, &iwcq->kmem);
1037 i40iw_free_resource(iwdev, iwdev->allocated_cqs, cq->cq_uk.cq_id);
1038 }
1039
1040 /**
1041 * cq_wq_destroy - send cq destroy cqp
1042 * @iwdev: iwarp device
1043 * @cq: hardware control cq
1044 */
1045 static void cq_wq_destroy(struct i40iw_device *iwdev, struct i40iw_sc_cq *cq)
1046 {
1047 enum i40iw_status_code status;
1048 struct i40iw_cqp_request *cqp_request;
1049 struct cqp_commands_info *cqp_info;
1050
1051 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1052 if (!cqp_request)
1053 return;
1054
1055 cqp_info = &cqp_request->info;
1056
1057 cqp_info->cqp_cmd = OP_CQ_DESTROY;
1058 cqp_info->post_sq = 1;
1059 cqp_info->in.u.cq_destroy.cq = cq;
1060 cqp_info->in.u.cq_destroy.scratch = (uintptr_t)cqp_request;
1061 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1062 if (status)
1063 i40iw_pr_err("CQP-OP Destroy QP fail");
1064 }
1065
1066 /**
1067 * i40iw_destroy_cq - destroy cq
1068 * @ib_cq: cq pointer
1069 */
1070 static int i40iw_destroy_cq(struct ib_cq *ib_cq)
1071 {
1072 struct i40iw_cq *iwcq;
1073 struct i40iw_device *iwdev;
1074 struct i40iw_sc_cq *cq;
1075
1076 if (!ib_cq) {
1077 i40iw_pr_err("ib_cq == NULL\n");
1078 return 0;
1079 }
1080
1081 iwcq = to_iwcq(ib_cq);
1082 iwdev = to_iwdev(ib_cq->device);
1083 cq = &iwcq->sc_cq;
1084 cq_wq_destroy(iwdev, cq);
1085 cq_free_resources(iwdev, iwcq);
1086 kfree(iwcq);
1087 return 0;
1088 }
1089
1090 /**
1091 * i40iw_create_cq - create cq
1092 * @ibdev: device pointer from stack
1093 * @attr: attributes for cq
1094 * @context: user context created during alloc
1095 * @udata: user data
1096 */
1097 static struct ib_cq *i40iw_create_cq(struct ib_device *ibdev,
1098 const struct ib_cq_init_attr *attr,
1099 struct ib_ucontext *context,
1100 struct ib_udata *udata)
1101 {
1102 struct i40iw_device *iwdev = to_iwdev(ibdev);
1103 struct i40iw_cq *iwcq;
1104 struct i40iw_pbl *iwpbl;
1105 u32 cq_num = 0;
1106 struct i40iw_sc_cq *cq;
1107 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
1108 struct i40iw_cq_init_info info;
1109 enum i40iw_status_code status;
1110 struct i40iw_cqp_request *cqp_request;
1111 struct cqp_commands_info *cqp_info;
1112 struct i40iw_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
1113 unsigned long flags;
1114 int err_code;
1115 int entries = attr->cqe;
1116
1117 if (entries > iwdev->max_cqe)
1118 return ERR_PTR(-EINVAL);
1119
1120 iwcq = kzalloc(sizeof(*iwcq), GFP_KERNEL);
1121 if (!iwcq)
1122 return ERR_PTR(-ENOMEM);
1123
1124 memset(&info, 0, sizeof(info));
1125
1126 err_code = i40iw_alloc_resource(iwdev, iwdev->allocated_cqs,
1127 iwdev->max_cq, &cq_num,
1128 &iwdev->next_cq);
1129 if (err_code)
1130 goto error;
1131
1132 cq = &iwcq->sc_cq;
1133 cq->back_cq = (void *)iwcq;
1134 spin_lock_init(&iwcq->lock);
1135
1136 info.dev = dev;
1137 ukinfo->cq_size = max(entries, 4);
1138 ukinfo->cq_id = cq_num;
1139 iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
1140 info.ceqe_mask = 0;
1141 info.ceq_id = 0;
1142 info.ceq_id_valid = true;
1143 info.ceqe_mask = 1;
1144 info.type = I40IW_CQ_TYPE_IWARP;
1145 if (context) {
1146 struct i40iw_ucontext *ucontext;
1147 struct i40iw_create_cq_req req;
1148 struct i40iw_cq_mr *cqmr;
1149
1150 memset(&req, 0, sizeof(req));
1151 iwcq->user_mode = true;
1152 ucontext = to_ucontext(context);
1153 if (ib_copy_from_udata(&req, udata, sizeof(struct i40iw_create_cq_req)))
1154 goto cq_free_resources;
1155
1156 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1157 iwpbl = i40iw_get_pbl((unsigned long)req.user_cq_buffer,
1158 &ucontext->cq_reg_mem_list);
1159 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1160 if (!iwpbl) {
1161 err_code = -EPROTO;
1162 goto cq_free_resources;
1163 }
1164
1165 iwcq->iwpbl = iwpbl;
1166 iwcq->cq_mem_size = 0;
1167 cqmr = &iwpbl->cq_mr;
1168 info.shadow_area_pa = cpu_to_le64(cqmr->shadow);
1169 if (iwpbl->pbl_allocated) {
1170 info.virtual_map = true;
1171 info.pbl_chunk_size = 1;
1172 info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
1173 } else {
1174 info.cq_base_pa = cqmr->cq_pbl.addr;
1175 }
1176 } else {
1177 /* Kmode allocations */
1178 int rsize;
1179 int shadow;
1180
1181 rsize = info.cq_uk_init_info.cq_size * sizeof(struct i40iw_cqe);
1182 rsize = round_up(rsize, 256);
1183 shadow = I40IW_SHADOW_AREA_SIZE << 3;
1184 status = i40iw_allocate_dma_mem(dev->hw, &iwcq->kmem,
1185 rsize + shadow, 256);
1186 if (status) {
1187 err_code = -ENOMEM;
1188 goto cq_free_resources;
1189 }
1190 ukinfo->cq_base = iwcq->kmem.va;
1191 info.cq_base_pa = iwcq->kmem.pa;
1192 info.shadow_area_pa = info.cq_base_pa + rsize;
1193 ukinfo->shadow_area = iwcq->kmem.va + rsize;
1194 }
1195
1196 if (dev->iw_priv_cq_ops->cq_init(cq, &info)) {
1197 i40iw_pr_err("init cq fail\n");
1198 err_code = -EPROTO;
1199 goto cq_free_resources;
1200 }
1201
1202 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1203 if (!cqp_request) {
1204 err_code = -ENOMEM;
1205 goto cq_free_resources;
1206 }
1207
1208 cqp_info = &cqp_request->info;
1209 cqp_info->cqp_cmd = OP_CQ_CREATE;
1210 cqp_info->post_sq = 1;
1211 cqp_info->in.u.cq_create.cq = cq;
1212 cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
1213 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1214 if (status) {
1215 i40iw_pr_err("CQP-OP Create QP fail");
1216 err_code = -EPROTO;
1217 goto cq_free_resources;
1218 }
1219
1220 if (context) {
1221 struct i40iw_create_cq_resp resp;
1222
1223 memset(&resp, 0, sizeof(resp));
1224 resp.cq_id = info.cq_uk_init_info.cq_id;
1225 resp.cq_size = info.cq_uk_init_info.cq_size;
1226 if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
1227 i40iw_pr_err("copy to user data\n");
1228 err_code = -EPROTO;
1229 goto cq_destroy;
1230 }
1231 }
1232
1233 return (struct ib_cq *)iwcq;
1234
1235 cq_destroy:
1236 cq_wq_destroy(iwdev, cq);
1237 cq_free_resources:
1238 cq_free_resources(iwdev, iwcq);
1239 error:
1240 kfree(iwcq);
1241 return ERR_PTR(err_code);
1242 }
1243
1244 /**
1245 * i40iw_get_user_access - get hw access from IB access
1246 * @acc: IB access to return hw access
1247 */
1248 static inline u16 i40iw_get_user_access(int acc)
1249 {
1250 u16 access = 0;
1251
1252 access |= (acc & IB_ACCESS_LOCAL_WRITE) ? I40IW_ACCESS_FLAGS_LOCALWRITE : 0;
1253 access |= (acc & IB_ACCESS_REMOTE_WRITE) ? I40IW_ACCESS_FLAGS_REMOTEWRITE : 0;
1254 access |= (acc & IB_ACCESS_REMOTE_READ) ? I40IW_ACCESS_FLAGS_REMOTEREAD : 0;
1255 access |= (acc & IB_ACCESS_MW_BIND) ? I40IW_ACCESS_FLAGS_BIND_WINDOW : 0;
1256 return access;
1257 }
1258
1259 /**
1260 * i40iw_free_stag - free stag resource
1261 * @iwdev: iwarp device
1262 * @stag: stag to free
1263 */
1264 static void i40iw_free_stag(struct i40iw_device *iwdev, u32 stag)
1265 {
1266 u32 stag_idx;
1267
1268 stag_idx = (stag & iwdev->mr_stagmask) >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1269 i40iw_free_resource(iwdev, iwdev->allocated_mrs, stag_idx);
1270 }
1271
1272 /**
1273 * i40iw_create_stag - create random stag
1274 * @iwdev: iwarp device
1275 */
1276 static u32 i40iw_create_stag(struct i40iw_device *iwdev)
1277 {
1278 u32 stag = 0;
1279 u32 stag_index = 0;
1280 u32 next_stag_index;
1281 u32 driver_key;
1282 u32 random;
1283 u8 consumer_key;
1284 int ret;
1285
1286 get_random_bytes(&random, sizeof(random));
1287 consumer_key = (u8)random;
1288
1289 driver_key = random & ~iwdev->mr_stagmask;
1290 next_stag_index = (random & iwdev->mr_stagmask) >> 8;
1291 next_stag_index %= iwdev->max_mr;
1292
1293 ret = i40iw_alloc_resource(iwdev,
1294 iwdev->allocated_mrs, iwdev->max_mr,
1295 &stag_index, &next_stag_index);
1296 if (!ret) {
1297 stag = stag_index << I40IW_CQPSQ_STAG_IDX_SHIFT;
1298 stag |= driver_key;
1299 stag += (u32)consumer_key;
1300 }
1301 return stag;
1302 }
1303
1304 /**
1305 * i40iw_next_pbl_addr - Get next pbl address
1306 * @palloc: Poiner to allocated pbles
1307 * @pbl: pointer to a pble
1308 * @pinfo: info pointer
1309 * @idx: index
1310 */
1311 static inline u64 *i40iw_next_pbl_addr(struct i40iw_pble_alloc *palloc,
1312 u64 *pbl,
1313 struct i40iw_pble_info **pinfo,
1314 u32 *idx)
1315 {
1316 *idx += 1;
1317 if ((!(*pinfo)) || (*idx != (*pinfo)->cnt))
1318 return ++pbl;
1319 *idx = 0;
1320 (*pinfo)++;
1321 return (u64 *)(*pinfo)->addr;
1322 }
1323
1324 /**
1325 * i40iw_copy_user_pgaddrs - copy user page address to pble's os locally
1326 * @iwmr: iwmr for IB's user page addresses
1327 * @pbl: ple pointer to save 1 level or 0 level pble
1328 * @level: indicated level 0, 1 or 2
1329 */
1330 static void i40iw_copy_user_pgaddrs(struct i40iw_mr *iwmr,
1331 u64 *pbl,
1332 enum i40iw_pble_level level)
1333 {
1334 struct ib_umem *region = iwmr->region;
1335 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1336 int chunk_pages, entry, pg_shift, i;
1337 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1338 struct i40iw_pble_info *pinfo;
1339 struct scatterlist *sg;
1340 u32 idx = 0;
1341
1342 pinfo = (level == I40IW_LEVEL_1) ? NULL : palloc->level2.leaf;
1343 pg_shift = ffs(region->page_size) - 1;
1344 for_each_sg(region->sg_head.sgl, sg, region->nmap, entry) {
1345 chunk_pages = sg_dma_len(sg) >> pg_shift;
1346 if ((iwmr->type == IW_MEMREG_TYPE_QP) &&
1347 !iwpbl->qp_mr.sq_page)
1348 iwpbl->qp_mr.sq_page = sg_page(sg);
1349 for (i = 0; i < chunk_pages; i++) {
1350 *pbl = cpu_to_le64(sg_dma_address(sg) + region->page_size * i);
1351 pbl = i40iw_next_pbl_addr(palloc, pbl, &pinfo, &idx);
1352 }
1353 }
1354 }
1355
1356 /**
1357 * i40iw_setup_pbles - copy user pg address to pble's
1358 * @iwdev: iwarp device
1359 * @iwmr: mr pointer for this memory registration
1360 * @use_pbles: flag if to use pble's or memory (level 0)
1361 */
1362 static int i40iw_setup_pbles(struct i40iw_device *iwdev,
1363 struct i40iw_mr *iwmr,
1364 bool use_pbles)
1365 {
1366 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1367 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1368 struct i40iw_pble_info *pinfo;
1369 u64 *pbl;
1370 enum i40iw_status_code status;
1371 enum i40iw_pble_level level = I40IW_LEVEL_1;
1372
1373 if (!use_pbles && (iwmr->page_cnt > MAX_SAVE_PAGE_ADDRS))
1374 return -ENOMEM;
1375
1376 if (use_pbles) {
1377 mutex_lock(&iwdev->pbl_mutex);
1378 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1379 mutex_unlock(&iwdev->pbl_mutex);
1380 if (status)
1381 return -ENOMEM;
1382
1383 iwpbl->pbl_allocated = true;
1384 level = palloc->level;
1385 pinfo = (level == I40IW_LEVEL_1) ? &palloc->level1 : palloc->level2.leaf;
1386 pbl = (u64 *)pinfo->addr;
1387 } else {
1388 pbl = iwmr->pgaddrmem;
1389 }
1390
1391 i40iw_copy_user_pgaddrs(iwmr, pbl, level);
1392 return 0;
1393 }
1394
1395 /**
1396 * i40iw_handle_q_mem - handle memory for qp and cq
1397 * @iwdev: iwarp device
1398 * @req: information for q memory management
1399 * @iwpbl: pble struct
1400 * @use_pbles: flag to use pble
1401 */
1402 static int i40iw_handle_q_mem(struct i40iw_device *iwdev,
1403 struct i40iw_mem_reg_req *req,
1404 struct i40iw_pbl *iwpbl,
1405 bool use_pbles)
1406 {
1407 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1408 struct i40iw_mr *iwmr = iwpbl->iwmr;
1409 struct i40iw_qp_mr *qpmr = &iwpbl->qp_mr;
1410 struct i40iw_cq_mr *cqmr = &iwpbl->cq_mr;
1411 struct i40iw_hmc_pble *hmc_p;
1412 u64 *arr = iwmr->pgaddrmem;
1413 int err;
1414 int total;
1415
1416 total = req->sq_pages + req->rq_pages + req->cq_pages;
1417
1418 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1419 if (err)
1420 return err;
1421 if (use_pbles && (palloc->level != I40IW_LEVEL_1)) {
1422 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1423 iwpbl->pbl_allocated = false;
1424 return -ENOMEM;
1425 }
1426
1427 if (use_pbles)
1428 arr = (u64 *)palloc->level1.addr;
1429 if (req->reg_type == IW_MEMREG_TYPE_QP) {
1430 hmc_p = &qpmr->sq_pbl;
1431 qpmr->shadow = (dma_addr_t)arr[total];
1432 if (use_pbles) {
1433 hmc_p->idx = palloc->level1.idx;
1434 hmc_p = &qpmr->rq_pbl;
1435 hmc_p->idx = palloc->level1.idx + req->sq_pages;
1436 } else {
1437 hmc_p->addr = arr[0];
1438 hmc_p = &qpmr->rq_pbl;
1439 hmc_p->addr = arr[1];
1440 }
1441 } else { /* CQ */
1442 hmc_p = &cqmr->cq_pbl;
1443 cqmr->shadow = (dma_addr_t)arr[total];
1444 if (use_pbles)
1445 hmc_p->idx = palloc->level1.idx;
1446 else
1447 hmc_p->addr = arr[0];
1448 }
1449 return err;
1450 }
1451
1452 /**
1453 * i40iw_hw_alloc_stag - cqp command to allocate stag
1454 * @iwdev: iwarp device
1455 * @iwmr: iwarp mr pointer
1456 */
1457 static int i40iw_hw_alloc_stag(struct i40iw_device *iwdev, struct i40iw_mr *iwmr)
1458 {
1459 struct i40iw_allocate_stag_info *info;
1460 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1461 enum i40iw_status_code status;
1462 int err = 0;
1463 struct i40iw_cqp_request *cqp_request;
1464 struct cqp_commands_info *cqp_info;
1465
1466 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1467 if (!cqp_request)
1468 return -ENOMEM;
1469
1470 cqp_info = &cqp_request->info;
1471 info = &cqp_info->in.u.alloc_stag.info;
1472 memset(info, 0, sizeof(*info));
1473 info->page_size = PAGE_SIZE;
1474 info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1475 info->pd_id = iwpd->sc_pd.pd_id;
1476 info->total_len = iwmr->length;
1477 info->remote_access = true;
1478 cqp_info->cqp_cmd = OP_ALLOC_STAG;
1479 cqp_info->post_sq = 1;
1480 cqp_info->in.u.alloc_stag.dev = &iwdev->sc_dev;
1481 cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
1482
1483 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1484 if (status) {
1485 err = -ENOMEM;
1486 i40iw_pr_err("CQP-OP MR Reg fail");
1487 }
1488 return err;
1489 }
1490
1491 /**
1492 * i40iw_alloc_mr - register stag for fast memory registration
1493 * @pd: ibpd pointer
1494 * @mr_type: memory for stag registrion
1495 * @max_num_sg: man number of pages
1496 */
1497 static struct ib_mr *i40iw_alloc_mr(struct ib_pd *pd,
1498 enum ib_mr_type mr_type,
1499 u32 max_num_sg)
1500 {
1501 struct i40iw_pd *iwpd = to_iwpd(pd);
1502 struct i40iw_device *iwdev = to_iwdev(pd->device);
1503 struct i40iw_pble_alloc *palloc;
1504 struct i40iw_pbl *iwpbl;
1505 struct i40iw_mr *iwmr;
1506 enum i40iw_status_code status;
1507 u32 stag;
1508 int err_code = -ENOMEM;
1509
1510 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1511 if (!iwmr)
1512 return ERR_PTR(-ENOMEM);
1513
1514 stag = i40iw_create_stag(iwdev);
1515 if (!stag) {
1516 err_code = -EOVERFLOW;
1517 goto err;
1518 }
1519 iwmr->stag = stag;
1520 iwmr->ibmr.rkey = stag;
1521 iwmr->ibmr.lkey = stag;
1522 iwmr->ibmr.pd = pd;
1523 iwmr->ibmr.device = pd->device;
1524 iwpbl = &iwmr->iwpbl;
1525 iwpbl->iwmr = iwmr;
1526 iwmr->type = IW_MEMREG_TYPE_MEM;
1527 palloc = &iwpbl->pble_alloc;
1528 iwmr->page_cnt = max_num_sg;
1529 mutex_lock(&iwdev->pbl_mutex);
1530 status = i40iw_get_pble(&iwdev->sc_dev, iwdev->pble_rsrc, palloc, iwmr->page_cnt);
1531 mutex_unlock(&iwdev->pbl_mutex);
1532 if (status)
1533 goto err1;
1534
1535 if (palloc->level != I40IW_LEVEL_1)
1536 goto err2;
1537 err_code = i40iw_hw_alloc_stag(iwdev, iwmr);
1538 if (err_code)
1539 goto err2;
1540 iwpbl->pbl_allocated = true;
1541 i40iw_add_pdusecount(iwpd);
1542 return &iwmr->ibmr;
1543 err2:
1544 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1545 err1:
1546 i40iw_free_stag(iwdev, stag);
1547 err:
1548 kfree(iwmr);
1549 return ERR_PTR(err_code);
1550 }
1551
1552 /**
1553 * i40iw_set_page - populate pbl list for fmr
1554 * @ibmr: ib mem to access iwarp mr pointer
1555 * @addr: page dma address fro pbl list
1556 */
1557 static int i40iw_set_page(struct ib_mr *ibmr, u64 addr)
1558 {
1559 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1560 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1561 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1562 u64 *pbl;
1563
1564 if (unlikely(iwmr->npages == iwmr->page_cnt))
1565 return -ENOMEM;
1566
1567 pbl = (u64 *)palloc->level1.addr;
1568 pbl[iwmr->npages++] = cpu_to_le64(addr);
1569 return 0;
1570 }
1571
1572 /**
1573 * i40iw_map_mr_sg - map of sg list for fmr
1574 * @ibmr: ib mem to access iwarp mr pointer
1575 * @sg: scatter gather list for fmr
1576 * @sg_nents: number of sg pages
1577 */
1578 static int i40iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
1579 int sg_nents, unsigned int *sg_offset)
1580 {
1581 struct i40iw_mr *iwmr = to_iwmr(ibmr);
1582
1583 iwmr->npages = 0;
1584 return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, i40iw_set_page);
1585 }
1586
1587 /**
1588 * i40iw_drain_sq - drain the send queue
1589 * @ibqp: ib qp pointer
1590 */
1591 static void i40iw_drain_sq(struct ib_qp *ibqp)
1592 {
1593 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1594 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1595
1596 if (I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
1597 wait_for_completion(&iwqp->sq_drained);
1598 }
1599
1600 /**
1601 * i40iw_drain_rq - drain the receive queue
1602 * @ibqp: ib qp pointer
1603 */
1604 static void i40iw_drain_rq(struct ib_qp *ibqp)
1605 {
1606 struct i40iw_qp *iwqp = to_iwqp(ibqp);
1607 struct i40iw_sc_qp *qp = &iwqp->sc_qp;
1608
1609 if (I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
1610 wait_for_completion(&iwqp->rq_drained);
1611 }
1612
1613 /**
1614 * i40iw_hwreg_mr - send cqp command for memory registration
1615 * @iwdev: iwarp device
1616 * @iwmr: iwarp mr pointer
1617 * @access: access for MR
1618 */
1619 static int i40iw_hwreg_mr(struct i40iw_device *iwdev,
1620 struct i40iw_mr *iwmr,
1621 u16 access)
1622 {
1623 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1624 struct i40iw_reg_ns_stag_info *stag_info;
1625 struct i40iw_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
1626 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1627 enum i40iw_status_code status;
1628 int err = 0;
1629 struct i40iw_cqp_request *cqp_request;
1630 struct cqp_commands_info *cqp_info;
1631
1632 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1633 if (!cqp_request)
1634 return -ENOMEM;
1635
1636 cqp_info = &cqp_request->info;
1637 stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
1638 memset(stag_info, 0, sizeof(*stag_info));
1639 stag_info->va = (void *)(unsigned long)iwpbl->user_base;
1640 stag_info->stag_idx = iwmr->stag >> I40IW_CQPSQ_STAG_IDX_SHIFT;
1641 stag_info->stag_key = (u8)iwmr->stag;
1642 stag_info->total_len = iwmr->length;
1643 stag_info->access_rights = access;
1644 stag_info->pd_id = iwpd->sc_pd.pd_id;
1645 stag_info->addr_type = I40IW_ADDR_TYPE_VA_BASED;
1646
1647 if (iwmr->page_cnt > 1) {
1648 if (palloc->level == I40IW_LEVEL_1) {
1649 stag_info->first_pm_pbl_index = palloc->level1.idx;
1650 stag_info->chunk_size = 1;
1651 } else {
1652 stag_info->first_pm_pbl_index = palloc->level2.root.idx;
1653 stag_info->chunk_size = 3;
1654 }
1655 } else {
1656 stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
1657 }
1658
1659 cqp_info->cqp_cmd = OP_MR_REG_NON_SHARED;
1660 cqp_info->post_sq = 1;
1661 cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->sc_dev;
1662 cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
1663
1664 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1665 if (status) {
1666 err = -ENOMEM;
1667 i40iw_pr_err("CQP-OP MR Reg fail");
1668 }
1669 return err;
1670 }
1671
1672 /**
1673 * i40iw_reg_user_mr - Register a user memory region
1674 * @pd: ptr of pd
1675 * @start: virtual start address
1676 * @length: length of mr
1677 * @virt: virtual address
1678 * @acc: access of mr
1679 * @udata: user data
1680 */
1681 static struct ib_mr *i40iw_reg_user_mr(struct ib_pd *pd,
1682 u64 start,
1683 u64 length,
1684 u64 virt,
1685 int acc,
1686 struct ib_udata *udata)
1687 {
1688 struct i40iw_pd *iwpd = to_iwpd(pd);
1689 struct i40iw_device *iwdev = to_iwdev(pd->device);
1690 struct i40iw_ucontext *ucontext;
1691 struct i40iw_pble_alloc *palloc;
1692 struct i40iw_pbl *iwpbl;
1693 struct i40iw_mr *iwmr;
1694 struct ib_umem *region;
1695 struct i40iw_mem_reg_req req;
1696 u64 pbl_depth = 0;
1697 u32 stag = 0;
1698 u16 access;
1699 u64 region_length;
1700 bool use_pbles = false;
1701 unsigned long flags;
1702 int err = -ENOSYS;
1703
1704 if (length > I40IW_MAX_MR_SIZE)
1705 return ERR_PTR(-EINVAL);
1706 region = ib_umem_get(pd->uobject->context, start, length, acc, 0);
1707 if (IS_ERR(region))
1708 return (struct ib_mr *)region;
1709
1710 if (ib_copy_from_udata(&req, udata, sizeof(req))) {
1711 ib_umem_release(region);
1712 return ERR_PTR(-EFAULT);
1713 }
1714
1715 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1716 if (!iwmr) {
1717 ib_umem_release(region);
1718 return ERR_PTR(-ENOMEM);
1719 }
1720
1721 iwpbl = &iwmr->iwpbl;
1722 iwpbl->iwmr = iwmr;
1723 iwmr->region = region;
1724 iwmr->ibmr.pd = pd;
1725 iwmr->ibmr.device = pd->device;
1726 ucontext = to_ucontext(pd->uobject->context);
1727 region_length = region->length + (start & 0xfff);
1728 pbl_depth = region_length >> 12;
1729 pbl_depth += (region_length & (4096 - 1)) ? 1 : 0;
1730 iwmr->length = region->length;
1731
1732 iwpbl->user_base = virt;
1733 palloc = &iwpbl->pble_alloc;
1734
1735 iwmr->type = req.reg_type;
1736 iwmr->page_cnt = (u32)pbl_depth;
1737
1738 switch (req.reg_type) {
1739 case IW_MEMREG_TYPE_QP:
1740 use_pbles = ((req.sq_pages + req.rq_pages) > 2);
1741 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1742 if (err)
1743 goto error;
1744 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1745 list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
1746 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1747 break;
1748 case IW_MEMREG_TYPE_CQ:
1749 use_pbles = (req.cq_pages > 1);
1750 err = i40iw_handle_q_mem(iwdev, &req, iwpbl, use_pbles);
1751 if (err)
1752 goto error;
1753
1754 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1755 list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
1756 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1757 break;
1758 case IW_MEMREG_TYPE_MEM:
1759 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1760
1761 use_pbles = (iwmr->page_cnt != 1);
1762 err = i40iw_setup_pbles(iwdev, iwmr, use_pbles);
1763 if (err)
1764 goto error;
1765
1766 access |= i40iw_get_user_access(acc);
1767 stag = i40iw_create_stag(iwdev);
1768 if (!stag) {
1769 err = -ENOMEM;
1770 goto error;
1771 }
1772
1773 iwmr->stag = stag;
1774 iwmr->ibmr.rkey = stag;
1775 iwmr->ibmr.lkey = stag;
1776
1777 err = i40iw_hwreg_mr(iwdev, iwmr, access);
1778 if (err) {
1779 i40iw_free_stag(iwdev, stag);
1780 goto error;
1781 }
1782 break;
1783 default:
1784 goto error;
1785 }
1786
1787 iwmr->type = req.reg_type;
1788 if (req.reg_type == IW_MEMREG_TYPE_MEM)
1789 i40iw_add_pdusecount(iwpd);
1790 return &iwmr->ibmr;
1791
1792 error:
1793 if (palloc->level != I40IW_LEVEL_0)
1794 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1795 ib_umem_release(region);
1796 kfree(iwmr);
1797 return ERR_PTR(err);
1798 }
1799
1800 /**
1801 * i40iw_reg_phys_mr - register kernel physical memory
1802 * @pd: ibpd pointer
1803 * @addr: physical address of memory to register
1804 * @size: size of memory to register
1805 * @acc: Access rights
1806 * @iova_start: start of virtual address for physical buffers
1807 */
1808 struct ib_mr *i40iw_reg_phys_mr(struct ib_pd *pd,
1809 u64 addr,
1810 u64 size,
1811 int acc,
1812 u64 *iova_start)
1813 {
1814 struct i40iw_pd *iwpd = to_iwpd(pd);
1815 struct i40iw_device *iwdev = to_iwdev(pd->device);
1816 struct i40iw_pbl *iwpbl;
1817 struct i40iw_mr *iwmr;
1818 enum i40iw_status_code status;
1819 u32 stag;
1820 u16 access = I40IW_ACCESS_FLAGS_LOCALREAD;
1821 int ret;
1822
1823 iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
1824 if (!iwmr)
1825 return ERR_PTR(-ENOMEM);
1826 iwmr->ibmr.pd = pd;
1827 iwmr->ibmr.device = pd->device;
1828 iwpbl = &iwmr->iwpbl;
1829 iwpbl->iwmr = iwmr;
1830 iwmr->type = IW_MEMREG_TYPE_MEM;
1831 iwpbl->user_base = *iova_start;
1832 stag = i40iw_create_stag(iwdev);
1833 if (!stag) {
1834 ret = -EOVERFLOW;
1835 goto err;
1836 }
1837 access |= i40iw_get_user_access(acc);
1838 iwmr->stag = stag;
1839 iwmr->ibmr.rkey = stag;
1840 iwmr->ibmr.lkey = stag;
1841 iwmr->page_cnt = 1;
1842 iwmr->pgaddrmem[0] = addr;
1843 iwmr->length = size;
1844 status = i40iw_hwreg_mr(iwdev, iwmr, access);
1845 if (status) {
1846 i40iw_free_stag(iwdev, stag);
1847 ret = -ENOMEM;
1848 goto err;
1849 }
1850
1851 i40iw_add_pdusecount(iwpd);
1852 return &iwmr->ibmr;
1853 err:
1854 kfree(iwmr);
1855 return ERR_PTR(ret);
1856 }
1857
1858 /**
1859 * i40iw_get_dma_mr - register physical mem
1860 * @pd: ptr of pd
1861 * @acc: access for memory
1862 */
1863 static struct ib_mr *i40iw_get_dma_mr(struct ib_pd *pd, int acc)
1864 {
1865 u64 kva = 0;
1866
1867 return i40iw_reg_phys_mr(pd, 0, 0, acc, &kva);
1868 }
1869
1870 /**
1871 * i40iw_del_mem_list - Deleting pbl list entries for CQ/QP
1872 * @iwmr: iwmr for IB's user page addresses
1873 * @ucontext: ptr to user context
1874 */
1875 static void i40iw_del_memlist(struct i40iw_mr *iwmr,
1876 struct i40iw_ucontext *ucontext)
1877 {
1878 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1879 unsigned long flags;
1880
1881 switch (iwmr->type) {
1882 case IW_MEMREG_TYPE_CQ:
1883 spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
1884 if (!list_empty(&ucontext->cq_reg_mem_list))
1885 list_del(&iwpbl->list);
1886 spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
1887 break;
1888 case IW_MEMREG_TYPE_QP:
1889 spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
1890 if (!list_empty(&ucontext->qp_reg_mem_list))
1891 list_del(&iwpbl->list);
1892 spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
1893 break;
1894 default:
1895 break;
1896 }
1897 }
1898
1899 /**
1900 * i40iw_dereg_mr - deregister mr
1901 * @ib_mr: mr ptr for dereg
1902 */
1903 static int i40iw_dereg_mr(struct ib_mr *ib_mr)
1904 {
1905 struct ib_pd *ibpd = ib_mr->pd;
1906 struct i40iw_pd *iwpd = to_iwpd(ibpd);
1907 struct i40iw_mr *iwmr = to_iwmr(ib_mr);
1908 struct i40iw_device *iwdev = to_iwdev(ib_mr->device);
1909 enum i40iw_status_code status;
1910 struct i40iw_dealloc_stag_info *info;
1911 struct i40iw_pbl *iwpbl = &iwmr->iwpbl;
1912 struct i40iw_pble_alloc *palloc = &iwpbl->pble_alloc;
1913 struct i40iw_cqp_request *cqp_request;
1914 struct cqp_commands_info *cqp_info;
1915 u32 stag_idx;
1916
1917 if (iwmr->region)
1918 ib_umem_release(iwmr->region);
1919
1920 if (iwmr->type != IW_MEMREG_TYPE_MEM) {
1921 if (ibpd->uobject) {
1922 struct i40iw_ucontext *ucontext;
1923
1924 ucontext = to_ucontext(ibpd->uobject->context);
1925 i40iw_del_memlist(iwmr, ucontext);
1926 }
1927 if (iwpbl->pbl_allocated)
1928 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1929 kfree(iwpbl->iwmr);
1930 iwpbl->iwmr = NULL;
1931 return 0;
1932 }
1933
1934 cqp_request = i40iw_get_cqp_request(&iwdev->cqp, true);
1935 if (!cqp_request)
1936 return -ENOMEM;
1937
1938 cqp_info = &cqp_request->info;
1939 info = &cqp_info->in.u.dealloc_stag.info;
1940 memset(info, 0, sizeof(*info));
1941
1942 info->pd_id = cpu_to_le32(iwpd->sc_pd.pd_id & 0x00007fff);
1943 info->stag_idx = RS_64_1(ib_mr->rkey, I40IW_CQPSQ_STAG_IDX_SHIFT);
1944 stag_idx = info->stag_idx;
1945 info->mr = true;
1946 if (iwpbl->pbl_allocated)
1947 info->dealloc_pbl = true;
1948
1949 cqp_info->cqp_cmd = OP_DEALLOC_STAG;
1950 cqp_info->post_sq = 1;
1951 cqp_info->in.u.dealloc_stag.dev = &iwdev->sc_dev;
1952 cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
1953 status = i40iw_handle_cqp_op(iwdev, cqp_request);
1954 if (status)
1955 i40iw_pr_err("CQP-OP dealloc failed for stag_idx = 0x%x\n", stag_idx);
1956 i40iw_rem_pdusecount(iwpd, iwdev);
1957 i40iw_free_stag(iwdev, iwmr->stag);
1958 if (iwpbl->pbl_allocated)
1959 i40iw_free_pble(iwdev->pble_rsrc, palloc);
1960 kfree(iwmr);
1961 return 0;
1962 }
1963
1964 /**
1965 * i40iw_show_rev
1966 */
1967 static ssize_t i40iw_show_rev(struct device *dev,
1968 struct device_attribute *attr, char *buf)
1969 {
1970 struct i40iw_ib_device *iwibdev = container_of(dev,
1971 struct i40iw_ib_device,
1972 ibdev.dev);
1973 u32 hw_rev = iwibdev->iwdev->sc_dev.hw_rev;
1974
1975 return sprintf(buf, "%x\n", hw_rev);
1976 }
1977
1978 /**
1979 * i40iw_show_hca
1980 */
1981 static ssize_t i40iw_show_hca(struct device *dev,
1982 struct device_attribute *attr, char *buf)
1983 {
1984 return sprintf(buf, "I40IW\n");
1985 }
1986
1987 /**
1988 * i40iw_show_board
1989 */
1990 static ssize_t i40iw_show_board(struct device *dev,
1991 struct device_attribute *attr,
1992 char *buf)
1993 {
1994 return sprintf(buf, "%.*s\n", 32, "I40IW Board ID");
1995 }
1996
1997 static DEVICE_ATTR(hw_rev, S_IRUGO, i40iw_show_rev, NULL);
1998 static DEVICE_ATTR(hca_type, S_IRUGO, i40iw_show_hca, NULL);
1999 static DEVICE_ATTR(board_id, S_IRUGO, i40iw_show_board, NULL);
2000
2001 static struct device_attribute *i40iw_dev_attributes[] = {
2002 &dev_attr_hw_rev,
2003 &dev_attr_hca_type,
2004 &dev_attr_board_id
2005 };
2006
2007 /**
2008 * i40iw_copy_sg_list - copy sg list for qp
2009 * @sg_list: copied into sg_list
2010 * @sgl: copy from sgl
2011 * @num_sges: count of sg entries
2012 */
2013 static void i40iw_copy_sg_list(struct i40iw_sge *sg_list, struct ib_sge *sgl, int num_sges)
2014 {
2015 unsigned int i;
2016
2017 for (i = 0; (i < num_sges) && (i < I40IW_MAX_WQ_FRAGMENT_COUNT); i++) {
2018 sg_list[i].tag_off = sgl[i].addr;
2019 sg_list[i].len = sgl[i].length;
2020 sg_list[i].stag = sgl[i].lkey;
2021 }
2022 }
2023
2024 /**
2025 * i40iw_post_send - kernel application wr
2026 * @ibqp: qp ptr for wr
2027 * @ib_wr: work request ptr
2028 * @bad_wr: return of bad wr if err
2029 */
2030 static int i40iw_post_send(struct ib_qp *ibqp,
2031 struct ib_send_wr *ib_wr,
2032 struct ib_send_wr **bad_wr)
2033 {
2034 struct i40iw_qp *iwqp;
2035 struct i40iw_qp_uk *ukqp;
2036 struct i40iw_post_sq_info info;
2037 enum i40iw_status_code ret;
2038 int err = 0;
2039 unsigned long flags;
2040 bool inv_stag;
2041
2042 iwqp = (struct i40iw_qp *)ibqp;
2043 ukqp = &iwqp->sc_qp.qp_uk;
2044
2045 spin_lock_irqsave(&iwqp->lock, flags);
2046 while (ib_wr) {
2047 inv_stag = false;
2048 memset(&info, 0, sizeof(info));
2049 info.wr_id = (u64)(ib_wr->wr_id);
2050 if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
2051 info.signaled = true;
2052 if (ib_wr->send_flags & IB_SEND_FENCE)
2053 info.read_fence = true;
2054
2055 switch (ib_wr->opcode) {
2056 case IB_WR_SEND:
2057 /* fall-through */
2058 case IB_WR_SEND_WITH_INV:
2059 if (ib_wr->opcode == IB_WR_SEND) {
2060 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2061 info.op_type = I40IW_OP_TYPE_SEND_SOL;
2062 else
2063 info.op_type = I40IW_OP_TYPE_SEND;
2064 } else {
2065 if (ib_wr->send_flags & IB_SEND_SOLICITED)
2066 info.op_type = I40IW_OP_TYPE_SEND_SOL_INV;
2067 else
2068 info.op_type = I40IW_OP_TYPE_SEND_INV;
2069 }
2070
2071 if (ib_wr->send_flags & IB_SEND_INLINE) {
2072 info.op.inline_send.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2073 info.op.inline_send.len = ib_wr->sg_list[0].length;
2074 ret = ukqp->ops.iw_inline_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2075 } else {
2076 info.op.send.num_sges = ib_wr->num_sge;
2077 info.op.send.sg_list = (struct i40iw_sge *)ib_wr->sg_list;
2078 ret = ukqp->ops.iw_send(ukqp, &info, ib_wr->ex.invalidate_rkey, false);
2079 }
2080
2081 if (ret) {
2082 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2083 err = -ENOMEM;
2084 else
2085 err = -EINVAL;
2086 }
2087 break;
2088 case IB_WR_RDMA_WRITE:
2089 info.op_type = I40IW_OP_TYPE_RDMA_WRITE;
2090
2091 if (ib_wr->send_flags & IB_SEND_INLINE) {
2092 info.op.inline_rdma_write.data = (void *)(unsigned long)ib_wr->sg_list[0].addr;
2093 info.op.inline_rdma_write.len = ib_wr->sg_list[0].length;
2094 info.op.inline_rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2095 info.op.inline_rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2096 info.op.inline_rdma_write.rem_addr.len = ib_wr->sg_list->length;
2097 ret = ukqp->ops.iw_inline_rdma_write(ukqp, &info, false);
2098 } else {
2099 info.op.rdma_write.lo_sg_list = (void *)ib_wr->sg_list;
2100 info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
2101 info.op.rdma_write.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2102 info.op.rdma_write.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2103 info.op.rdma_write.rem_addr.len = ib_wr->sg_list->length;
2104 ret = ukqp->ops.iw_rdma_write(ukqp, &info, false);
2105 }
2106
2107 if (ret) {
2108 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2109 err = -ENOMEM;
2110 else
2111 err = -EINVAL;
2112 }
2113 break;
2114 case IB_WR_RDMA_READ_WITH_INV:
2115 inv_stag = true;
2116 /* fall-through*/
2117 case IB_WR_RDMA_READ:
2118 if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
2119 err = -EINVAL;
2120 break;
2121 }
2122 info.op_type = I40IW_OP_TYPE_RDMA_READ;
2123 info.op.rdma_read.rem_addr.tag_off = rdma_wr(ib_wr)->remote_addr;
2124 info.op.rdma_read.rem_addr.stag = rdma_wr(ib_wr)->rkey;
2125 info.op.rdma_read.rem_addr.len = ib_wr->sg_list->length;
2126 info.op.rdma_read.lo_addr.tag_off = ib_wr->sg_list->addr;
2127 info.op.rdma_read.lo_addr.stag = ib_wr->sg_list->lkey;
2128 info.op.rdma_read.lo_addr.len = ib_wr->sg_list->length;
2129 ret = ukqp->ops.iw_rdma_read(ukqp, &info, inv_stag, false);
2130 if (ret) {
2131 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2132 err = -ENOMEM;
2133 else
2134 err = -EINVAL;
2135 }
2136 break;
2137 case IB_WR_LOCAL_INV:
2138 info.op_type = I40IW_OP_TYPE_INV_STAG;
2139 info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
2140 ret = ukqp->ops.iw_stag_local_invalidate(ukqp, &info, true);
2141 if (ret)
2142 err = -ENOMEM;
2143 break;
2144 case IB_WR_REG_MR:
2145 {
2146 struct i40iw_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
2147 int page_shift = ilog2(reg_wr(ib_wr)->mr->page_size);
2148 int flags = reg_wr(ib_wr)->access;
2149 struct i40iw_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
2150 struct i40iw_sc_dev *dev = &iwqp->iwdev->sc_dev;
2151 struct i40iw_fast_reg_stag_info info;
2152
2153 memset(&info, 0, sizeof(info));
2154 info.access_rights = I40IW_ACCESS_FLAGS_LOCALREAD;
2155 info.access_rights |= i40iw_get_user_access(flags);
2156 info.stag_key = reg_wr(ib_wr)->key & 0xff;
2157 info.stag_idx = reg_wr(ib_wr)->key >> 8;
2158 info.wr_id = ib_wr->wr_id;
2159
2160 info.addr_type = I40IW_ADDR_TYPE_VA_BASED;
2161 info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
2162 info.total_len = iwmr->ibmr.length;
2163 info.reg_addr_pa = *(u64 *)palloc->level1.addr;
2164 info.first_pm_pbl_index = palloc->level1.idx;
2165 info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
2166 info.signaled = ib_wr->send_flags & IB_SEND_SIGNALED;
2167
2168 if (iwmr->npages > I40IW_MIN_PAGES_PER_FMR)
2169 info.chunk_size = 1;
2170
2171 if (page_shift == 21)
2172 info.page_size = 1; /* 2M page */
2173
2174 ret = dev->iw_priv_qp_ops->iw_mr_fast_register(&iwqp->sc_qp, &info, true);
2175 if (ret)
2176 err = -ENOMEM;
2177 break;
2178 }
2179 default:
2180 err = -EINVAL;
2181 i40iw_pr_err(" upost_send bad opcode = 0x%x\n",
2182 ib_wr->opcode);
2183 break;
2184 }
2185
2186 if (err)
2187 break;
2188 ib_wr = ib_wr->next;
2189 }
2190
2191 if (err)
2192 *bad_wr = ib_wr;
2193 else
2194 ukqp->ops.iw_qp_post_wr(ukqp);
2195 spin_unlock_irqrestore(&iwqp->lock, flags);
2196
2197 return err;
2198 }
2199
2200 /**
2201 * i40iw_post_recv - post receive wr for kernel application
2202 * @ibqp: ib qp pointer
2203 * @ib_wr: work request for receive
2204 * @bad_wr: bad wr caused an error
2205 */
2206 static int i40iw_post_recv(struct ib_qp *ibqp,
2207 struct ib_recv_wr *ib_wr,
2208 struct ib_recv_wr **bad_wr)
2209 {
2210 struct i40iw_qp *iwqp;
2211 struct i40iw_qp_uk *ukqp;
2212 struct i40iw_post_rq_info post_recv;
2213 struct i40iw_sge sg_list[I40IW_MAX_WQ_FRAGMENT_COUNT];
2214 enum i40iw_status_code ret = 0;
2215 unsigned long flags;
2216 int err = 0;
2217
2218 iwqp = (struct i40iw_qp *)ibqp;
2219 ukqp = &iwqp->sc_qp.qp_uk;
2220
2221 memset(&post_recv, 0, sizeof(post_recv));
2222 spin_lock_irqsave(&iwqp->lock, flags);
2223 while (ib_wr) {
2224 post_recv.num_sges = ib_wr->num_sge;
2225 post_recv.wr_id = ib_wr->wr_id;
2226 i40iw_copy_sg_list(sg_list, ib_wr->sg_list, ib_wr->num_sge);
2227 post_recv.sg_list = sg_list;
2228 ret = ukqp->ops.iw_post_receive(ukqp, &post_recv);
2229 if (ret) {
2230 i40iw_pr_err(" post_recv err %d\n", ret);
2231 if (ret == I40IW_ERR_QP_TOOMANY_WRS_POSTED)
2232 err = -ENOMEM;
2233 else
2234 err = -EINVAL;
2235 *bad_wr = ib_wr;
2236 goto out;
2237 }
2238 ib_wr = ib_wr->next;
2239 }
2240 out:
2241 spin_unlock_irqrestore(&iwqp->lock, flags);
2242 return err;
2243 }
2244
2245 /**
2246 * i40iw_poll_cq - poll cq for completion (kernel apps)
2247 * @ibcq: cq to poll
2248 * @num_entries: number of entries to poll
2249 * @entry: wr of entry completed
2250 */
2251 static int i40iw_poll_cq(struct ib_cq *ibcq,
2252 int num_entries,
2253 struct ib_wc *entry)
2254 {
2255 struct i40iw_cq *iwcq;
2256 int cqe_count = 0;
2257 struct i40iw_cq_poll_info cq_poll_info;
2258 enum i40iw_status_code ret;
2259 struct i40iw_cq_uk *ukcq;
2260 struct i40iw_sc_qp *qp;
2261 struct i40iw_qp *iwqp;
2262 unsigned long flags;
2263
2264 iwcq = (struct i40iw_cq *)ibcq;
2265 ukcq = &iwcq->sc_cq.cq_uk;
2266
2267 spin_lock_irqsave(&iwcq->lock, flags);
2268 while (cqe_count < num_entries) {
2269 ret = ukcq->ops.iw_cq_poll_completion(ukcq, &cq_poll_info);
2270 if (ret == I40IW_ERR_QUEUE_EMPTY) {
2271 break;
2272 } else if (ret == I40IW_ERR_QUEUE_DESTROYED) {
2273 continue;
2274 } else if (ret) {
2275 if (!cqe_count)
2276 cqe_count = -1;
2277 break;
2278 }
2279 entry->wc_flags = 0;
2280 entry->wr_id = cq_poll_info.wr_id;
2281 if (cq_poll_info.error) {
2282 entry->status = IB_WC_WR_FLUSH_ERR;
2283 entry->vendor_err = cq_poll_info.major_err << 16 | cq_poll_info.minor_err;
2284 } else {
2285 entry->status = IB_WC_SUCCESS;
2286 }
2287
2288 switch (cq_poll_info.op_type) {
2289 case I40IW_OP_TYPE_RDMA_WRITE:
2290 entry->opcode = IB_WC_RDMA_WRITE;
2291 break;
2292 case I40IW_OP_TYPE_RDMA_READ_INV_STAG:
2293 case I40IW_OP_TYPE_RDMA_READ:
2294 entry->opcode = IB_WC_RDMA_READ;
2295 break;
2296 case I40IW_OP_TYPE_SEND_SOL:
2297 case I40IW_OP_TYPE_SEND_SOL_INV:
2298 case I40IW_OP_TYPE_SEND_INV:
2299 case I40IW_OP_TYPE_SEND:
2300 entry->opcode = IB_WC_SEND;
2301 break;
2302 case I40IW_OP_TYPE_REC:
2303 entry->opcode = IB_WC_RECV;
2304 break;
2305 default:
2306 entry->opcode = IB_WC_RECV;
2307 break;
2308 }
2309
2310 entry->ex.imm_data = 0;
2311 qp = (struct i40iw_sc_qp *)cq_poll_info.qp_handle;
2312 entry->qp = (struct ib_qp *)qp->back_qp;
2313 entry->src_qp = cq_poll_info.qp_id;
2314 iwqp = (struct i40iw_qp *)qp->back_qp;
2315 if (iwqp->iwarp_state > I40IW_QP_STATE_RTS) {
2316 if (!I40IW_RING_MORE_WORK(qp->qp_uk.sq_ring))
2317 complete(&iwqp->sq_drained);
2318 if (!I40IW_RING_MORE_WORK(qp->qp_uk.rq_ring))
2319 complete(&iwqp->rq_drained);
2320 }
2321 entry->byte_len = cq_poll_info.bytes_xfered;
2322 entry++;
2323 cqe_count++;
2324 }
2325 spin_unlock_irqrestore(&iwcq->lock, flags);
2326 return cqe_count;
2327 }
2328
2329 /**
2330 * i40iw_req_notify_cq - arm cq kernel application
2331 * @ibcq: cq to arm
2332 * @notify_flags: notofication flags
2333 */
2334 static int i40iw_req_notify_cq(struct ib_cq *ibcq,
2335 enum ib_cq_notify_flags notify_flags)
2336 {
2337 struct i40iw_cq *iwcq;
2338 struct i40iw_cq_uk *ukcq;
2339 unsigned long flags;
2340 enum i40iw_completion_notify cq_notify = IW_CQ_COMPL_EVENT;
2341
2342 iwcq = (struct i40iw_cq *)ibcq;
2343 ukcq = &iwcq->sc_cq.cq_uk;
2344 if (notify_flags == IB_CQ_SOLICITED)
2345 cq_notify = IW_CQ_COMPL_SOLICITED;
2346 spin_lock_irqsave(&iwcq->lock, flags);
2347 ukcq->ops.iw_cq_request_notification(ukcq, cq_notify);
2348 spin_unlock_irqrestore(&iwcq->lock, flags);
2349 return 0;
2350 }
2351
2352 /**
2353 * i40iw_port_immutable - return port's immutable data
2354 * @ibdev: ib dev struct
2355 * @port_num: port number
2356 * @immutable: immutable data for the port return
2357 */
2358 static int i40iw_port_immutable(struct ib_device *ibdev, u8 port_num,
2359 struct ib_port_immutable *immutable)
2360 {
2361 struct ib_port_attr attr;
2362 int err;
2363
2364 err = i40iw_query_port(ibdev, port_num, &attr);
2365
2366 if (err)
2367 return err;
2368
2369 immutable->pkey_tbl_len = attr.pkey_tbl_len;
2370 immutable->gid_tbl_len = attr.gid_tbl_len;
2371 immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
2372
2373 return 0;
2374 }
2375
2376 static const char * const i40iw_hw_stat_names[] = {
2377 // 32bit names
2378 [I40IW_HW_STAT_INDEX_IP4RXDISCARD] = "ip4InDiscards",
2379 [I40IW_HW_STAT_INDEX_IP4RXTRUNC] = "ip4InTruncatedPkts",
2380 [I40IW_HW_STAT_INDEX_IP4TXNOROUTE] = "ip4OutNoRoutes",
2381 [I40IW_HW_STAT_INDEX_IP6RXDISCARD] = "ip6InDiscards",
2382 [I40IW_HW_STAT_INDEX_IP6RXTRUNC] = "ip6InTruncatedPkts",
2383 [I40IW_HW_STAT_INDEX_IP6TXNOROUTE] = "ip6OutNoRoutes",
2384 [I40IW_HW_STAT_INDEX_TCPRTXSEG] = "tcpRetransSegs",
2385 [I40IW_HW_STAT_INDEX_TCPRXOPTERR] = "tcpInOptErrors",
2386 [I40IW_HW_STAT_INDEX_TCPRXPROTOERR] = "tcpInProtoErrors",
2387 // 64bit names
2388 [I40IW_HW_STAT_INDEX_IP4RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2389 "ip4InOctets",
2390 [I40IW_HW_STAT_INDEX_IP4RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2391 "ip4InPkts",
2392 [I40IW_HW_STAT_INDEX_IP4RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2393 "ip4InReasmRqd",
2394 [I40IW_HW_STAT_INDEX_IP4RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2395 "ip4InMcastPkts",
2396 [I40IW_HW_STAT_INDEX_IP4TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2397 "ip4OutOctets",
2398 [I40IW_HW_STAT_INDEX_IP4TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2399 "ip4OutPkts",
2400 [I40IW_HW_STAT_INDEX_IP4TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2401 "ip4OutSegRqd",
2402 [I40IW_HW_STAT_INDEX_IP4TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2403 "ip4OutMcastPkts",
2404 [I40IW_HW_STAT_INDEX_IP6RXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2405 "ip6InOctets",
2406 [I40IW_HW_STAT_INDEX_IP6RXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2407 "ip6InPkts",
2408 [I40IW_HW_STAT_INDEX_IP6RXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2409 "ip6InReasmRqd",
2410 [I40IW_HW_STAT_INDEX_IP6RXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2411 "ip6InMcastPkts",
2412 [I40IW_HW_STAT_INDEX_IP6TXOCTS + I40IW_HW_STAT_INDEX_MAX_32] =
2413 "ip6OutOctets",
2414 [I40IW_HW_STAT_INDEX_IP6TXPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2415 "ip6OutPkts",
2416 [I40IW_HW_STAT_INDEX_IP6TXFRAGS + I40IW_HW_STAT_INDEX_MAX_32] =
2417 "ip6OutSegRqd",
2418 [I40IW_HW_STAT_INDEX_IP6TXMCPKTS + I40IW_HW_STAT_INDEX_MAX_32] =
2419 "ip6OutMcastPkts",
2420 [I40IW_HW_STAT_INDEX_TCPRXSEGS + I40IW_HW_STAT_INDEX_MAX_32] =
2421 "tcpInSegs",
2422 [I40IW_HW_STAT_INDEX_TCPTXSEG + I40IW_HW_STAT_INDEX_MAX_32] =
2423 "tcpOutSegs",
2424 [I40IW_HW_STAT_INDEX_RDMARXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2425 "iwInRdmaReads",
2426 [I40IW_HW_STAT_INDEX_RDMARXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2427 "iwInRdmaSends",
2428 [I40IW_HW_STAT_INDEX_RDMARXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2429 "iwInRdmaWrites",
2430 [I40IW_HW_STAT_INDEX_RDMATXRDS + I40IW_HW_STAT_INDEX_MAX_32] =
2431 "iwOutRdmaReads",
2432 [I40IW_HW_STAT_INDEX_RDMATXSNDS + I40IW_HW_STAT_INDEX_MAX_32] =
2433 "iwOutRdmaSends",
2434 [I40IW_HW_STAT_INDEX_RDMATXWRS + I40IW_HW_STAT_INDEX_MAX_32] =
2435 "iwOutRdmaWrites",
2436 [I40IW_HW_STAT_INDEX_RDMAVBND + I40IW_HW_STAT_INDEX_MAX_32] =
2437 "iwRdmaBnd",
2438 [I40IW_HW_STAT_INDEX_RDMAVINV + I40IW_HW_STAT_INDEX_MAX_32] =
2439 "iwRdmaInv"
2440 };
2441
2442 static void i40iw_get_dev_fw_str(struct ib_device *dev, char *str,
2443 size_t str_len)
2444 {
2445 u32 firmware_version = I40IW_FW_VERSION;
2446
2447 snprintf(str, str_len, "%u.%u", firmware_version,
2448 (firmware_version & 0x000000ff));
2449 }
2450
2451 /**
2452 * i40iw_alloc_hw_stats - Allocate a hw stats structure
2453 * @ibdev: device pointer from stack
2454 * @port_num: port number
2455 */
2456 static struct rdma_hw_stats *i40iw_alloc_hw_stats(struct ib_device *ibdev,
2457 u8 port_num)
2458 {
2459 struct i40iw_device *iwdev = to_iwdev(ibdev);
2460 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2461 int num_counters = I40IW_HW_STAT_INDEX_MAX_32 +
2462 I40IW_HW_STAT_INDEX_MAX_64;
2463 unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
2464
2465 BUILD_BUG_ON(ARRAY_SIZE(i40iw_hw_stat_names) !=
2466 (I40IW_HW_STAT_INDEX_MAX_32 +
2467 I40IW_HW_STAT_INDEX_MAX_64));
2468
2469 /*
2470 * PFs get the default update lifespan, but VFs only update once
2471 * per second
2472 */
2473 if (!dev->is_pf)
2474 lifespan = 1000;
2475 return rdma_alloc_hw_stats_struct(i40iw_hw_stat_names, num_counters,
2476 lifespan);
2477 }
2478
2479 /**
2480 * i40iw_get_hw_stats - Populates the rdma_hw_stats structure
2481 * @ibdev: device pointer from stack
2482 * @stats: stats pointer from stack
2483 * @port_num: port number
2484 * @index: which hw counter the stack is requesting we update
2485 */
2486 static int i40iw_get_hw_stats(struct ib_device *ibdev,
2487 struct rdma_hw_stats *stats,
2488 u8 port_num, int index)
2489 {
2490 struct i40iw_device *iwdev = to_iwdev(ibdev);
2491 struct i40iw_sc_dev *dev = &iwdev->sc_dev;
2492 struct i40iw_dev_pestat *devstat = &dev->dev_pestat;
2493 struct i40iw_dev_hw_stats *hw_stats = &devstat->hw_stats;
2494 unsigned long flags;
2495
2496 if (dev->is_pf) {
2497 spin_lock_irqsave(&devstat->stats_lock, flags);
2498 devstat->ops.iw_hw_stat_read_all(devstat,
2499 &devstat->hw_stats);
2500 spin_unlock_irqrestore(&devstat->stats_lock, flags);
2501 } else {
2502 if (i40iw_vchnl_vf_get_pe_stats(dev, &devstat->hw_stats))
2503 return -ENOSYS;
2504 }
2505
2506 memcpy(&stats->value[0], &hw_stats, sizeof(*hw_stats));
2507
2508 return stats->num_counters;
2509 }
2510
2511 /**
2512 * i40iw_query_gid - Query port GID
2513 * @ibdev: device pointer from stack
2514 * @port: port number
2515 * @index: Entry index
2516 * @gid: Global ID
2517 */
2518 static int i40iw_query_gid(struct ib_device *ibdev,
2519 u8 port,
2520 int index,
2521 union ib_gid *gid)
2522 {
2523 struct i40iw_device *iwdev = to_iwdev(ibdev);
2524
2525 memset(gid->raw, 0, sizeof(gid->raw));
2526 ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
2527 return 0;
2528 }
2529
2530 /**
2531 * i40iw_modify_port Modify port properties
2532 * @ibdev: device pointer from stack
2533 * @port: port number
2534 * @port_modify_mask: mask for port modifications
2535 * @props: port properties
2536 */
2537 static int i40iw_modify_port(struct ib_device *ibdev,
2538 u8 port,
2539 int port_modify_mask,
2540 struct ib_port_modify *props)
2541 {
2542 return -ENOSYS;
2543 }
2544
2545 /**
2546 * i40iw_query_pkey - Query partition key
2547 * @ibdev: device pointer from stack
2548 * @port: port number
2549 * @index: index of pkey
2550 * @pkey: pointer to store the pkey
2551 */
2552 static int i40iw_query_pkey(struct ib_device *ibdev,
2553 u8 port,
2554 u16 index,
2555 u16 *pkey)
2556 {
2557 *pkey = 0;
2558 return 0;
2559 }
2560
2561 /**
2562 * i40iw_create_ah - create address handle
2563 * @ibpd: ptr of pd
2564 * @ah_attr: address handle attributes
2565 */
2566 static struct ib_ah *i40iw_create_ah(struct ib_pd *ibpd,
2567 struct ib_ah_attr *attr)
2568 {
2569 return ERR_PTR(-ENOSYS);
2570 }
2571
2572 /**
2573 * i40iw_destroy_ah - Destroy address handle
2574 * @ah: pointer to address handle
2575 */
2576 static int i40iw_destroy_ah(struct ib_ah *ah)
2577 {
2578 return -ENOSYS;
2579 }
2580
2581 /**
2582 * i40iw_init_rdma_device - initialization of iwarp device
2583 * @iwdev: iwarp device
2584 */
2585 static struct i40iw_ib_device *i40iw_init_rdma_device(struct i40iw_device *iwdev)
2586 {
2587 struct i40iw_ib_device *iwibdev;
2588 struct net_device *netdev = iwdev->netdev;
2589 struct pci_dev *pcidev = (struct pci_dev *)iwdev->hw.dev_context;
2590
2591 iwibdev = (struct i40iw_ib_device *)ib_alloc_device(sizeof(*iwibdev));
2592 if (!iwibdev) {
2593 i40iw_pr_err("iwdev == NULL\n");
2594 return NULL;
2595 }
2596 strlcpy(iwibdev->ibdev.name, "i40iw%d", IB_DEVICE_NAME_MAX);
2597 iwibdev->ibdev.owner = THIS_MODULE;
2598 iwdev->iwibdev = iwibdev;
2599 iwibdev->iwdev = iwdev;
2600
2601 iwibdev->ibdev.node_type = RDMA_NODE_RNIC;
2602 ether_addr_copy((u8 *)&iwibdev->ibdev.node_guid, netdev->dev_addr);
2603
2604 iwibdev->ibdev.uverbs_cmd_mask =
2605 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
2606 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
2607 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
2608 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
2609 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
2610 (1ull << IB_USER_VERBS_CMD_REG_MR) |
2611 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
2612 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
2613 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
2614 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
2615 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
2616 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
2617 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
2618 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
2619 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
2620 (1ull << IB_USER_VERBS_CMD_CREATE_AH) |
2621 (1ull << IB_USER_VERBS_CMD_DESTROY_AH) |
2622 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
2623 (1ull << IB_USER_VERBS_CMD_POST_RECV) |
2624 (1ull << IB_USER_VERBS_CMD_POST_SEND);
2625 iwibdev->ibdev.phys_port_cnt = 1;
2626 iwibdev->ibdev.num_comp_vectors = 1;
2627 iwibdev->ibdev.dma_device = &pcidev->dev;
2628 iwibdev->ibdev.dev.parent = &pcidev->dev;
2629 iwibdev->ibdev.query_port = i40iw_query_port;
2630 iwibdev->ibdev.modify_port = i40iw_modify_port;
2631 iwibdev->ibdev.query_pkey = i40iw_query_pkey;
2632 iwibdev->ibdev.query_gid = i40iw_query_gid;
2633 iwibdev->ibdev.alloc_ucontext = i40iw_alloc_ucontext;
2634 iwibdev->ibdev.dealloc_ucontext = i40iw_dealloc_ucontext;
2635 iwibdev->ibdev.mmap = i40iw_mmap;
2636 iwibdev->ibdev.alloc_pd = i40iw_alloc_pd;
2637 iwibdev->ibdev.dealloc_pd = i40iw_dealloc_pd;
2638 iwibdev->ibdev.create_qp = i40iw_create_qp;
2639 iwibdev->ibdev.modify_qp = i40iw_modify_qp;
2640 iwibdev->ibdev.query_qp = i40iw_query_qp;
2641 iwibdev->ibdev.destroy_qp = i40iw_destroy_qp;
2642 iwibdev->ibdev.create_cq = i40iw_create_cq;
2643 iwibdev->ibdev.destroy_cq = i40iw_destroy_cq;
2644 iwibdev->ibdev.get_dma_mr = i40iw_get_dma_mr;
2645 iwibdev->ibdev.reg_user_mr = i40iw_reg_user_mr;
2646 iwibdev->ibdev.dereg_mr = i40iw_dereg_mr;
2647 iwibdev->ibdev.alloc_hw_stats = i40iw_alloc_hw_stats;
2648 iwibdev->ibdev.get_hw_stats = i40iw_get_hw_stats;
2649 iwibdev->ibdev.query_device = i40iw_query_device;
2650 iwibdev->ibdev.create_ah = i40iw_create_ah;
2651 iwibdev->ibdev.destroy_ah = i40iw_destroy_ah;
2652 iwibdev->ibdev.drain_sq = i40iw_drain_sq;
2653 iwibdev->ibdev.drain_rq = i40iw_drain_rq;
2654 iwibdev->ibdev.alloc_mr = i40iw_alloc_mr;
2655 iwibdev->ibdev.map_mr_sg = i40iw_map_mr_sg;
2656 iwibdev->ibdev.iwcm = kzalloc(sizeof(*iwibdev->ibdev.iwcm), GFP_KERNEL);
2657 if (!iwibdev->ibdev.iwcm) {
2658 ib_dealloc_device(&iwibdev->ibdev);
2659 i40iw_pr_err("iwcm == NULL\n");
2660 return NULL;
2661 }
2662
2663 iwibdev->ibdev.iwcm->add_ref = i40iw_add_ref;
2664 iwibdev->ibdev.iwcm->rem_ref = i40iw_rem_ref;
2665 iwibdev->ibdev.iwcm->get_qp = i40iw_get_qp;
2666 iwibdev->ibdev.iwcm->connect = i40iw_connect;
2667 iwibdev->ibdev.iwcm->accept = i40iw_accept;
2668 iwibdev->ibdev.iwcm->reject = i40iw_reject;
2669 iwibdev->ibdev.iwcm->create_listen = i40iw_create_listen;
2670 iwibdev->ibdev.iwcm->destroy_listen = i40iw_destroy_listen;
2671 memcpy(iwibdev->ibdev.iwcm->ifname, netdev->name,
2672 sizeof(iwibdev->ibdev.iwcm->ifname));
2673 iwibdev->ibdev.get_port_immutable = i40iw_port_immutable;
2674 iwibdev->ibdev.get_dev_fw_str = i40iw_get_dev_fw_str;
2675 iwibdev->ibdev.poll_cq = i40iw_poll_cq;
2676 iwibdev->ibdev.req_notify_cq = i40iw_req_notify_cq;
2677 iwibdev->ibdev.post_send = i40iw_post_send;
2678 iwibdev->ibdev.post_recv = i40iw_post_recv;
2679
2680 return iwibdev;
2681 }
2682
2683 /**
2684 * i40iw_port_ibevent - indicate port event
2685 * @iwdev: iwarp device
2686 */
2687 void i40iw_port_ibevent(struct i40iw_device *iwdev)
2688 {
2689 struct i40iw_ib_device *iwibdev = iwdev->iwibdev;
2690 struct ib_event event;
2691
2692 event.device = &iwibdev->ibdev;
2693 event.element.port_num = 1;
2694 event.event = iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
2695 ib_dispatch_event(&event);
2696 }
2697
2698 /**
2699 * i40iw_unregister_rdma_device - unregister of iwarp from IB
2700 * @iwibdev: rdma device ptr
2701 */
2702 static void i40iw_unregister_rdma_device(struct i40iw_ib_device *iwibdev)
2703 {
2704 int i;
2705
2706 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i)
2707 device_remove_file(&iwibdev->ibdev.dev,
2708 i40iw_dev_attributes[i]);
2709 ib_unregister_device(&iwibdev->ibdev);
2710 }
2711
2712 /**
2713 * i40iw_destroy_rdma_device - destroy rdma device and free resources
2714 * @iwibdev: IB device ptr
2715 */
2716 void i40iw_destroy_rdma_device(struct i40iw_ib_device *iwibdev)
2717 {
2718 if (!iwibdev)
2719 return;
2720
2721 i40iw_unregister_rdma_device(iwibdev);
2722 kfree(iwibdev->ibdev.iwcm);
2723 iwibdev->ibdev.iwcm = NULL;
2724 ib_dealloc_device(&iwibdev->ibdev);
2725 }
2726
2727 /**
2728 * i40iw_register_rdma_device - register iwarp device to IB
2729 * @iwdev: iwarp device
2730 */
2731 int i40iw_register_rdma_device(struct i40iw_device *iwdev)
2732 {
2733 int i, ret;
2734 struct i40iw_ib_device *iwibdev;
2735
2736 iwdev->iwibdev = i40iw_init_rdma_device(iwdev);
2737 if (!iwdev->iwibdev)
2738 return -ENOMEM;
2739 iwibdev = iwdev->iwibdev;
2740
2741 ret = ib_register_device(&iwibdev->ibdev, NULL);
2742 if (ret)
2743 goto error;
2744
2745 for (i = 0; i < ARRAY_SIZE(i40iw_dev_attributes); ++i) {
2746 ret =
2747 device_create_file(&iwibdev->ibdev.dev,
2748 i40iw_dev_attributes[i]);
2749 if (ret) {
2750 while (i > 0) {
2751 i--;
2752 device_remove_file(&iwibdev->ibdev.dev, i40iw_dev_attributes[i]);
2753 }
2754 ib_unregister_device(&iwibdev->ibdev);
2755 goto error;
2756 }
2757 }
2758 return 0;
2759 error:
2760 kfree(iwdev->iwibdev->ibdev.iwcm);
2761 iwdev->iwibdev->ibdev.iwcm = NULL;
2762 ib_dealloc_device(&iwdev->iwibdev->ibdev);
2763 return ret;
2764 }
Linux with added FPC-III support