drivers/char/hw_random/amd-rng.c

   1 /*
   2  * RNG driver for AMD RNGs
   3  *
   4  * Copyright 2005 (c) MontaVista Software, Inc.
   5  *
   6  * with the majority of the code coming from:
   7  *
   8  * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
   9  * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
  10  *
  11  * derived from
  12  *
  13  * Hardware driver for the AMD 768 Random Number Generator (RNG)
  14  * (c) Copyright 2001 Red Hat Inc
  15  *
  16  * derived from
  17  *
  18  * Hardware driver for Intel i810 Random Number Generator (RNG)
  19  * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
  20  * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
  21  *
  22  * This file is licensed under  the terms of the GNU General Public
  23  * License version 2. This program is licensed "as is" without any
  24  * warranty of any kind, whether express or implied.
  25  */
  26
  27 #include <linux/delay.h>
  28 #include <linux/hw_random.h>
  29 #include <linux/kernel.h>
  30 #include <linux/module.h>
  31 #include <linux/pci.h>
  32
  33 #define DRV_NAME "AMD768-HWRNG"
  34
  35 #define RNGDATA         0x00
  36 #define RNGDONE         0x04
  37 #define PMBASE_OFFSET   0xF0
  38 #define PMBASE_SIZE     8
  39
  40 /*
  41  * Data for PCI driver interface
  42  *
  43  * This data only exists for exporting the supported
  44  * PCI ids via MODULE_DEVICE_TABLE.  We do not actually
  45  * register a pci_driver, because someone else might one day
  46  * want to register another driver on the same PCI id.
  47  */
  48 static const struct pci_device_id pci_tbl[] = {
  49         { PCI_VDEVICE(AMD, 0x7443), 0, },
  50         { PCI_VDEVICE(AMD, 0x746b), 0, },
  51         { 0, }, /* terminate list */
  52 };
  53 MODULE_DEVICE_TABLE(pci, pci_tbl);
  54
  55 struct amd768_priv {
  56         void __iomem *iobase;
  57         struct pci_dev *pcidev;
  58 };
  59
  60 static int amd_rng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
  61 {
  62         u32 *data = buf;
  63         struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
  64         size_t read = 0;
  65         /* We will wait at maximum one time per read */
  66         int timeout = max / 4 + 1;
  67
  68         /*
  69          * RNG data is available when RNGDONE is set to 1
  70          * New random numbers are generated approximately 128 microseconds
  71          * after RNGDATA is read
  72          */
  73         while (read < max) {
  74                 if (ioread32(priv->iobase + RNGDONE) == 0) {
  75                         if (wait) {
  76                                 /* Delay given by datasheet */
  77                                 usleep_range(128, 196);
  78                                 if (timeout-- == 0)
  79                                         return read;
  80                         } else {
  81                                 return 0;
  82                         }
  83                 } else {
  84                         *data = ioread32(priv->iobase + RNGDATA);
  85                         data++;
  86                         read += 4;
  87                 }
  88         }
  89
  90         return read;
  91 }
  92
  93 static int amd_rng_init(struct hwrng *rng)
  94 {
  95         struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
  96         u8 rnen;
  97
  98         pci_read_config_byte(priv->pcidev, 0x40, &rnen);
  99         rnen |= BIT(7); /* RNG on */
 100         pci_write_config_byte(priv->pcidev, 0x40, rnen);
 101
 102         pci_read_config_byte(priv->pcidev, 0x41, &rnen);
 103         rnen |= BIT(7); /* PMIO enable */
 104         pci_write_config_byte(priv->pcidev, 0x41, rnen);
 105
 106         return 0;
 107 }
 108
 109 static void amd_rng_cleanup(struct hwrng *rng)
 110 {
 111         struct amd768_priv *priv = (struct amd768_priv *)rng->priv;
 112         u8 rnen;
 113
 114         pci_read_config_byte(priv->pcidev, 0x40, &rnen);
 115         rnen &= ~BIT(7);        /* RNG off */
 116         pci_write_config_byte(priv->pcidev, 0x40, rnen);
 117 }
 118
 119 static struct hwrng amd_rng = {
 120         .name           = "amd",
 121         .init           = amd_rng_init,
 122         .cleanup        = amd_rng_cleanup,
 123         .read           = amd_rng_read,
 124 };
 125
 126 static int __init mod_init(void)
 127 {
 128         int err = -ENODEV;
 129         struct pci_dev *pdev = NULL;
 130         const struct pci_device_id *ent;
 131         u32 pmbase;
 132         struct amd768_priv *priv;
 133
 134         for_each_pci_dev(pdev) {
 135                 ent = pci_match_id(pci_tbl, pdev);
 136                 if (ent)
 137                         goto found;
 138         }
 139         /* Device not found. */
 140         return -ENODEV;
 141
 142 found:
 143         err = pci_read_config_dword(pdev, 0x58, &pmbase);
 144         if (err)
 145                 return err;
 146
 147         pmbase &= 0x0000FF00;
 148         if (pmbase == 0)
 149                 return -EIO;
 150
 151         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 152         if (!priv)
 153                 return -ENOMEM;
 154
 155         if (!devm_request_region(&pdev->dev, pmbase + PMBASE_OFFSET,
 156                                 PMBASE_SIZE, DRV_NAME)) {
 157                 dev_err(&pdev->dev, DRV_NAME " region 0x%x already in use!\n",
 158                         pmbase + 0xF0);
 159                 return -EBUSY;
 160         }
 161
 162         priv->iobase = devm_ioport_map(&pdev->dev, pmbase + PMBASE_OFFSET,
 163                         PMBASE_SIZE);
 164         if (!priv->iobase) {
 165                 pr_err(DRV_NAME "Cannot map ioport\n");
 166                 return -ENOMEM;
 167         }
 168
 169         amd_rng.priv = (unsigned long)priv;
 170         priv->pcidev = pdev;
 171
 172         pr_info(DRV_NAME " detected\n");
 173         return devm_hwrng_register(&pdev->dev, &amd_rng);
 174 }
 175
 176 static void __exit mod_exit(void)
 177 {
 178 }
 179
 180 module_init(mod_init);
 181 module_exit(mod_exit);
 182
 183 MODULE_AUTHOR("The Linux Kernel team");
 184 MODULE_DESCRIPTION("H/W RNG driver for AMD chipsets");
 185 MODULE_LICENSE("GPL");