1 /* n2-drv.c: Niagara-2 RNG driver.
3 * Copyright (C) 2008, 2011 David S. Miller <davem@davemloft.net>
6 #include <linux/kernel.h>
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/workqueue.h>
12 #include <linux/preempt.h>
13 #include <linux/hw_random.h>
16 #include <linux/of_device.h>
18 #include <asm/hypervisor.h>
22 #define DRV_MODULE_NAME "n2rng"
23 #define PFX DRV_MODULE_NAME ": "
24 #define DRV_MODULE_VERSION "0.2"
25 #define DRV_MODULE_RELDATE "July 27, 2011"
27 static char version
[] =
28 DRV_MODULE_NAME
".c:v" DRV_MODULE_VERSION
" (" DRV_MODULE_RELDATE
")\n";
30 MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
31 MODULE_DESCRIPTION("Niagara2 RNG driver");
32 MODULE_LICENSE("GPL");
33 MODULE_VERSION(DRV_MODULE_VERSION
);
35 /* The Niagara2 RNG provides a 64-bit read-only random number
36 * register, plus a control register. Access to the RNG is
37 * virtualized through the hypervisor so that both guests and control
38 * nodes can access the device.
40 * The entropy source consists of raw entropy sources, each
41 * constructed from a voltage controlled oscillator whose phase is
42 * jittered by thermal noise sources.
44 * The oscillator in each of the three raw entropy sources run at
45 * different frequencies. Normally, all three generator outputs are
46 * gathered, xored together, and fed into a CRC circuit, the output of
47 * which is the 64-bit read-only register.
49 * Some time is necessary for all the necessary entropy to build up
50 * such that a full 64-bits of entropy are available in the register.
51 * In normal operating mode (RNG_CTL_LFSR is set), the chip implements
52 * an interlock which blocks register reads until sufficient entropy
55 * A control register is provided for adjusting various aspects of RNG
56 * operation, and to enable diagnostic modes. Each of the three raw
57 * entropy sources has an enable bit (RNG_CTL_ES{1,2,3}). Also
58 * provided are fields for controlling the minimum time in cycles
59 * between read accesses to the register (RNG_CTL_WAIT, this controls
60 * the interlock described in the previous paragraph).
62 * The standard setting is to have the mode bit (RNG_CTL_LFSR) set,
63 * all three entropy sources enabled, and the interlock time set
66 * The CRC polynomial used by the chip is:
68 * P(X) = x64 + x61 + x57 + x56 + x52 + x51 + x50 + x48 + x47 + x46 +
69 * x43 + x42 + x41 + x39 + x38 + x37 + x35 + x32 + x28 + x25 +
70 * x22 + x21 + x17 + x15 + x13 + x12 + x11 + x7 + x5 + x + 1
72 * The RNG_CTL_VCO value of each noise cell must be programmed
73 * separately. This is why 4 control register values must be provided
74 * to the hypervisor. During a write, the hypervisor writes them all,
75 * one at a time, to the actual RNG_CTL register. The first three
76 * values are used to setup the desired RNG_CTL_VCO for each entropy
77 * source, for example:
79 * control 0: (1 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES1
80 * control 1: (2 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES2
81 * control 2: (3 << RNG_CTL_VCO_SHIFT) | RNG_CTL_ES3
83 * And then the fourth value sets the final chip state and enables
87 static int n2rng_hv_err_trans(unsigned long hv_err
)
108 static unsigned long n2rng_generic_read_control_v2(unsigned long ra
,
111 unsigned long hv_err
, state
, ticks
, watchdog_delta
, watchdog_status
;
112 int block
= 0, busy
= 0;
115 hv_err
= sun4v_rng_ctl_read_v2(ra
, unit
, &state
,
119 if (hv_err
== HV_EOK
)
122 if (hv_err
== HV_EBUSY
) {
123 if (++busy
>= N2RNG_BUSY_LIMIT
)
127 } else if (hv_err
== HV_EWOULDBLOCK
) {
128 if (++block
>= N2RNG_BLOCK_LIMIT
)
139 /* In multi-socket situations, the hypervisor might need to
140 * queue up the RNG control register write if it's for a unit
141 * that is on a cpu socket other than the one we are executing on.
143 * We poll here waiting for a successful read of that control
144 * register to make sure the write has been actually performed.
146 static unsigned long n2rng_control_settle_v2(struct n2rng
*np
, int unit
)
148 unsigned long ra
= __pa(&np
->scratch_control
[0]);
150 return n2rng_generic_read_control_v2(ra
, unit
);
153 static unsigned long n2rng_write_ctl_one(struct n2rng
*np
, int unit
,
155 unsigned long control_ra
,
156 unsigned long watchdog_timeout
,
157 unsigned long *ticks
)
159 unsigned long hv_err
;
161 if (np
->hvapi_major
== 1) {
162 hv_err
= sun4v_rng_ctl_write_v1(control_ra
, state
,
163 watchdog_timeout
, ticks
);
165 hv_err
= sun4v_rng_ctl_write_v2(control_ra
, state
,
166 watchdog_timeout
, unit
);
167 if (hv_err
== HV_EOK
)
168 hv_err
= n2rng_control_settle_v2(np
, unit
);
169 *ticks
= N2RNG_ACCUM_CYCLES_DEFAULT
;
175 static int n2rng_generic_read_data(unsigned long data_ra
)
177 unsigned long ticks
, hv_err
;
178 int block
= 0, hcheck
= 0;
181 hv_err
= sun4v_rng_data_read(data_ra
, &ticks
);
182 if (hv_err
== HV_EOK
)
185 if (hv_err
== HV_EWOULDBLOCK
) {
186 if (++block
>= N2RNG_BLOCK_LIMIT
)
189 } else if (hv_err
== HV_ENOACCESS
) {
191 } else if (hv_err
== HV_EIO
) {
192 if (++hcheck
>= N2RNG_HCHECK_LIMIT
)
200 static unsigned long n2rng_read_diag_data_one(struct n2rng
*np
,
202 unsigned long data_ra
,
203 unsigned long data_len
,
204 unsigned long *ticks
)
206 unsigned long hv_err
;
208 if (np
->hvapi_major
== 1) {
209 hv_err
= sun4v_rng_data_read_diag_v1(data_ra
, data_len
, ticks
);
211 hv_err
= sun4v_rng_data_read_diag_v2(data_ra
, data_len
,
214 *ticks
= N2RNG_ACCUM_CYCLES_DEFAULT
;
219 static int n2rng_generic_read_diag_data(struct n2rng
*np
,
221 unsigned long data_ra
,
222 unsigned long data_len
)
224 unsigned long ticks
, hv_err
;
228 hv_err
= n2rng_read_diag_data_one(np
, unit
,
231 if (hv_err
== HV_EOK
)
234 if (hv_err
== HV_EWOULDBLOCK
) {
235 if (++block
>= N2RNG_BLOCK_LIMIT
)
238 } else if (hv_err
== HV_ENOACCESS
) {
240 } else if (hv_err
== HV_EIO
) {
248 static int n2rng_generic_write_control(struct n2rng
*np
,
249 unsigned long control_ra
,
253 unsigned long hv_err
, ticks
;
254 int block
= 0, busy
= 0;
257 hv_err
= n2rng_write_ctl_one(np
, unit
, state
, control_ra
,
258 np
->wd_timeo
, &ticks
);
259 if (hv_err
== HV_EOK
)
262 if (hv_err
== HV_EWOULDBLOCK
) {
263 if (++block
>= N2RNG_BLOCK_LIMIT
)
266 } else if (hv_err
== HV_EBUSY
) {
267 if (++busy
>= N2RNG_BUSY_LIMIT
)
275 /* Just try to see if we can successfully access the control register
276 * of the RNG on the domain on which we are currently executing.
278 static int n2rng_try_read_ctl(struct n2rng
*np
)
280 unsigned long hv_err
;
283 if (np
->hvapi_major
== 1) {
284 hv_err
= sun4v_rng_get_diag_ctl();
286 /* We purposefully give invalid arguments, HV_NOACCESS
287 * is higher priority than the errors we'd get from
288 * these other cases, and that's the error we are
289 * truly interested in.
291 hv_err
= sun4v_rng_ctl_read_v2(0UL, ~0UL, &x
, &x
, &x
, &x
);
302 return n2rng_hv_err_trans(hv_err
);
305 #define CONTROL_DEFAULT_BASE \
306 ((2 << RNG_CTL_ASEL_SHIFT) | \
307 (N2RNG_ACCUM_CYCLES_DEFAULT << RNG_CTL_WAIT_SHIFT) | \
310 #define CONTROL_DEFAULT_0 \
311 (CONTROL_DEFAULT_BASE | \
312 (1 << RNG_CTL_VCO_SHIFT) | \
314 #define CONTROL_DEFAULT_1 \
315 (CONTROL_DEFAULT_BASE | \
316 (2 << RNG_CTL_VCO_SHIFT) | \
318 #define CONTROL_DEFAULT_2 \
319 (CONTROL_DEFAULT_BASE | \
320 (3 << RNG_CTL_VCO_SHIFT) | \
322 #define CONTROL_DEFAULT_3 \
323 (CONTROL_DEFAULT_BASE | \
324 RNG_CTL_ES1 | RNG_CTL_ES2 | RNG_CTL_ES3)
326 static void n2rng_control_swstate_init(struct n2rng
*np
)
330 np
->flags
|= N2RNG_FLAG_CONTROL
;
332 np
->health_check_sec
= N2RNG_HEALTH_CHECK_SEC_DEFAULT
;
333 np
->accum_cycles
= N2RNG_ACCUM_CYCLES_DEFAULT
;
334 np
->wd_timeo
= N2RNG_WD_TIMEO_DEFAULT
;
336 for (i
= 0; i
< np
->num_units
; i
++) {
337 struct n2rng_unit
*up
= &np
->units
[i
];
339 up
->control
[0] = CONTROL_DEFAULT_0
;
340 up
->control
[1] = CONTROL_DEFAULT_1
;
341 up
->control
[2] = CONTROL_DEFAULT_2
;
342 up
->control
[3] = CONTROL_DEFAULT_3
;
345 np
->hv_state
= HV_RNG_STATE_UNCONFIGURED
;
348 static int n2rng_grab_diag_control(struct n2rng
*np
)
350 int i
, busy_count
, err
= -ENODEV
;
353 for (i
= 0; i
< 100; i
++) {
354 err
= n2rng_try_read_ctl(np
);
358 if (++busy_count
> 100) {
359 dev_err(&np
->op
->dev
,
360 "Grab diag control timeout.\n");
370 static int n2rng_init_control(struct n2rng
*np
)
372 int err
= n2rng_grab_diag_control(np
);
374 /* Not in the control domain, that's OK we are only a consumer
375 * of the RNG data, we don't setup and program it.
382 n2rng_control_swstate_init(np
);
387 static int n2rng_data_read(struct hwrng
*rng
, u32
*data
)
389 struct n2rng
*np
= (struct n2rng
*) rng
->priv
;
390 unsigned long ra
= __pa(&np
->test_data
);
393 if (!(np
->flags
& N2RNG_FLAG_READY
)) {
395 } else if (np
->flags
& N2RNG_FLAG_BUFFER_VALID
) {
396 np
->flags
&= ~N2RNG_FLAG_BUFFER_VALID
;
400 int err
= n2rng_generic_read_data(ra
);
402 np
->buffer
= np
->test_data
>> 32;
403 *data
= np
->test_data
& 0xffffffff;
406 dev_err(&np
->op
->dev
, "RNG error, restesting\n");
407 np
->flags
&= ~N2RNG_FLAG_READY
;
408 if (!(np
->flags
& N2RNG_FLAG_SHUTDOWN
))
409 schedule_delayed_work(&np
->work
, 0);
417 /* On a guest node, just make sure we can read random data properly.
418 * If a control node reboots or reloads it's n2rng driver, this won't
419 * work during that time. So we have to keep probing until the device
422 static int n2rng_guest_check(struct n2rng
*np
)
424 unsigned long ra
= __pa(&np
->test_data
);
426 return n2rng_generic_read_data(ra
);
429 static int n2rng_entropy_diag_read(struct n2rng
*np
, unsigned long unit
,
430 u64
*pre_control
, u64 pre_state
,
431 u64
*buffer
, unsigned long buf_len
,
432 u64
*post_control
, u64 post_state
)
434 unsigned long post_ctl_ra
= __pa(post_control
);
435 unsigned long pre_ctl_ra
= __pa(pre_control
);
436 unsigned long buffer_ra
= __pa(buffer
);
439 err
= n2rng_generic_write_control(np
, pre_ctl_ra
, unit
, pre_state
);
443 err
= n2rng_generic_read_diag_data(np
, unit
,
446 (void) n2rng_generic_write_control(np
, post_ctl_ra
, unit
,
452 static u64
advance_polynomial(u64 poly
, u64 val
, int count
)
456 for (i
= 0; i
< count
; i
++) {
457 int highbit_set
= ((s64
)val
< 0);
467 static int n2rng_test_buffer_find(struct n2rng
*np
, u64 val
)
471 /* Purposefully skip over the first word. */
472 for (i
= 1; i
< SELFTEST_BUFFER_WORDS
; i
++) {
473 if (np
->test_buffer
[i
] == val
)
479 static void n2rng_dump_test_buffer(struct n2rng
*np
)
483 for (i
= 0; i
< SELFTEST_BUFFER_WORDS
; i
++)
484 dev_err(&np
->op
->dev
, "Test buffer slot %d [0x%016llx]\n",
485 i
, np
->test_buffer
[i
]);
488 static int n2rng_check_selftest_buffer(struct n2rng
*np
, unsigned long unit
)
490 u64 val
= SELFTEST_VAL
;
491 int err
, matches
, limit
;
494 for (limit
= 0; limit
< SELFTEST_LOOPS_MAX
; limit
++) {
495 matches
+= n2rng_test_buffer_find(np
, val
);
496 if (matches
>= SELFTEST_MATCH_GOAL
)
498 val
= advance_polynomial(SELFTEST_POLY
, val
, 1);
502 if (limit
>= SELFTEST_LOOPS_MAX
) {
504 dev_err(&np
->op
->dev
, "Selftest failed on unit %lu\n", unit
);
505 n2rng_dump_test_buffer(np
);
507 dev_info(&np
->op
->dev
, "Selftest passed on unit %lu\n", unit
);
512 static int n2rng_control_selftest(struct n2rng
*np
, unsigned long unit
)
516 np
->test_control
[0] = (0x2 << RNG_CTL_ASEL_SHIFT
);
517 np
->test_control
[1] = (0x2 << RNG_CTL_ASEL_SHIFT
);
518 np
->test_control
[2] = (0x2 << RNG_CTL_ASEL_SHIFT
);
519 np
->test_control
[3] = ((0x2 << RNG_CTL_ASEL_SHIFT
) |
521 ((SELFTEST_TICKS
- 2) << RNG_CTL_WAIT_SHIFT
));
524 err
= n2rng_entropy_diag_read(np
, unit
, np
->test_control
,
525 HV_RNG_STATE_HEALTHCHECK
,
527 sizeof(np
->test_buffer
),
528 &np
->units
[unit
].control
[0],
533 return n2rng_check_selftest_buffer(np
, unit
);
536 static int n2rng_control_check(struct n2rng
*np
)
540 for (i
= 0; i
< np
->num_units
; i
++) {
541 int err
= n2rng_control_selftest(np
, i
);
548 /* The sanity checks passed, install the final configuration into the
549 * chip, it's ready to use.
551 static int n2rng_control_configure_units(struct n2rng
*np
)
556 for (unit
= 0; unit
< np
->num_units
; unit
++) {
557 struct n2rng_unit
*up
= &np
->units
[unit
];
558 unsigned long ctl_ra
= __pa(&up
->control
[0]);
562 base
= ((np
->accum_cycles
<< RNG_CTL_WAIT_SHIFT
) |
563 (2 << RNG_CTL_ASEL_SHIFT
) |
566 /* XXX This isn't the best. We should fetch a bunch
567 * XXX of words using each entropy source combined XXX
568 * with each VCO setting, and see which combinations
569 * XXX give the best random data.
571 for (esrc
= 0; esrc
< 3; esrc
++)
572 up
->control
[esrc
] = base
|
573 (esrc
<< RNG_CTL_VCO_SHIFT
) |
574 (RNG_CTL_ES1
<< esrc
);
576 up
->control
[3] = base
|
577 (RNG_CTL_ES1
| RNG_CTL_ES2
| RNG_CTL_ES3
);
579 err
= n2rng_generic_write_control(np
, ctl_ra
, unit
,
580 HV_RNG_STATE_CONFIGURED
);
588 static void n2rng_work(struct work_struct
*work
)
590 struct n2rng
*np
= container_of(work
, struct n2rng
, work
.work
);
593 if (!(np
->flags
& N2RNG_FLAG_CONTROL
)) {
594 err
= n2rng_guest_check(np
);
597 err
= n2rng_control_check(np
);
601 err
= n2rng_control_configure_units(np
);
605 np
->flags
|= N2RNG_FLAG_READY
;
606 dev_info(&np
->op
->dev
, "RNG ready\n");
609 if (err
&& !(np
->flags
& N2RNG_FLAG_SHUTDOWN
))
610 schedule_delayed_work(&np
->work
, HZ
* 2);
613 static void n2rng_driver_version(void)
615 static int n2rng_version_printed
;
617 if (n2rng_version_printed
++ == 0)
618 pr_info("%s", version
);
621 static const struct of_device_id n2rng_match
[];
622 static int n2rng_probe(struct platform_device
*op
)
624 const struct of_device_id
*match
;
629 match
= of_match_device(n2rng_match
, &op
->dev
);
632 multi_capable
= (match
->data
!= NULL
);
634 n2rng_driver_version();
635 np
= devm_kzalloc(&op
->dev
, sizeof(*np
), GFP_KERNEL
);
640 INIT_DELAYED_WORK(&np
->work
, n2rng_work
);
643 np
->flags
|= N2RNG_FLAG_MULTI
;
647 if (sun4v_hvapi_register(HV_GRP_RNG
,
651 if (sun4v_hvapi_register(HV_GRP_RNG
,
654 dev_err(&op
->dev
, "Cannot register suitable "
660 if (np
->flags
& N2RNG_FLAG_MULTI
) {
661 if (np
->hvapi_major
< 2) {
662 dev_err(&op
->dev
, "multi-unit-capable RNG requires "
663 "HVAPI major version 2 or later, got %lu\n",
665 goto out_hvapi_unregister
;
667 np
->num_units
= of_getintprop_default(op
->dev
.of_node
,
669 if (!np
->num_units
) {
670 dev_err(&op
->dev
, "VF RNG lacks rng-#units property\n");
671 goto out_hvapi_unregister
;
676 dev_info(&op
->dev
, "Registered RNG HVAPI major %lu minor %lu\n",
677 np
->hvapi_major
, np
->hvapi_minor
);
679 np
->units
= devm_kzalloc(&op
->dev
,
680 sizeof(struct n2rng_unit
) * np
->num_units
,
684 goto out_hvapi_unregister
;
686 err
= n2rng_init_control(np
);
688 goto out_hvapi_unregister
;
690 dev_info(&op
->dev
, "Found %s RNG, units: %d\n",
691 ((np
->flags
& N2RNG_FLAG_MULTI
) ?
692 "multi-unit-capable" : "single-unit"),
695 np
->hwrng
.name
= "n2rng";
696 np
->hwrng
.data_read
= n2rng_data_read
;
697 np
->hwrng
.priv
= (unsigned long) np
;
699 err
= hwrng_register(&np
->hwrng
);
701 goto out_hvapi_unregister
;
703 platform_set_drvdata(op
, np
);
705 schedule_delayed_work(&np
->work
, 0);
709 out_hvapi_unregister
:
710 sun4v_hvapi_unregister(HV_GRP_RNG
);
716 static int n2rng_remove(struct platform_device
*op
)
718 struct n2rng
*np
= platform_get_drvdata(op
);
720 np
->flags
|= N2RNG_FLAG_SHUTDOWN
;
722 cancel_delayed_work_sync(&np
->work
);
724 hwrng_unregister(&np
->hwrng
);
726 sun4v_hvapi_unregister(HV_GRP_RNG
);
731 static const struct of_device_id n2rng_match
[] = {
733 .name
= "random-number-generator",
734 .compatible
= "SUNW,n2-rng",
737 .name
= "random-number-generator",
738 .compatible
= "SUNW,vf-rng",
742 .name
= "random-number-generator",
743 .compatible
= "SUNW,kt-rng",
747 .name
= "random-number-generator",
748 .compatible
= "ORCL,m4-rng",
752 .name
= "random-number-generator",
753 .compatible
= "ORCL,m7-rng",
758 MODULE_DEVICE_TABLE(of
, n2rng_match
);
760 static struct platform_driver n2rng_driver
= {
763 .of_match_table
= n2rng_match
,
765 .probe
= n2rng_probe
,
766 .remove
= n2rng_remove
,
769 module_platform_driver(n2rng_driver
);