sh_eth: R8A7740 supports packet shecksumming
[linux/fpc-iii.git] / drivers / char / hw_random / stm32-rng.c
blob63d84e6f189180098a893d558b25f4e740677e63
1 /*
2 * Copyright (c) 2015, Daniel Thompson
4 * This file is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This file is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/hw_random.h>
18 #include <linux/io.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_platform.h>
23 #include <linux/pm_runtime.h>
24 #include <linux/slab.h>
26 #define RNG_CR 0x00
27 #define RNG_CR_RNGEN BIT(2)
29 #define RNG_SR 0x04
30 #define RNG_SR_SEIS BIT(6)
31 #define RNG_SR_CEIS BIT(5)
32 #define RNG_SR_DRDY BIT(0)
34 #define RNG_DR 0x08
37 * It takes 40 cycles @ 48MHz to generate each random number (e.g. <1us).
38 * At the time of writing STM32 parts max out at ~200MHz meaning a timeout
39 * of 500 leaves us a very comfortable margin for error. The loop to which
40 * the timeout applies takes at least 4 instructions per iteration so the
41 * timeout is enough to take us up to multi-GHz parts!
43 #define RNG_TIMEOUT 500
45 struct stm32_rng_private {
46 struct hwrng rng;
47 void __iomem *base;
48 struct clk *clk;
51 static int stm32_rng_read(struct hwrng *rng, void *data, size_t max, bool wait)
53 struct stm32_rng_private *priv =
54 container_of(rng, struct stm32_rng_private, rng);
55 u32 sr;
56 int retval = 0;
58 pm_runtime_get_sync((struct device *) priv->rng.priv);
60 while (max > sizeof(u32)) {
61 sr = readl_relaxed(priv->base + RNG_SR);
62 if (!sr && wait) {
63 unsigned int timeout = RNG_TIMEOUT;
65 do {
66 cpu_relax();
67 sr = readl_relaxed(priv->base + RNG_SR);
68 } while (!sr && --timeout);
71 /* If error detected or data not ready... */
72 if (sr != RNG_SR_DRDY) {
73 if (WARN_ONCE(sr & (RNG_SR_SEIS | RNG_SR_CEIS),
74 "bad RNG status - %x\n", sr))
75 writel_relaxed(0, priv->base + RNG_SR);
76 break;
79 *(u32 *)data = readl_relaxed(priv->base + RNG_DR);
81 retval += sizeof(u32);
82 data += sizeof(u32);
83 max -= sizeof(u32);
86 pm_runtime_mark_last_busy((struct device *) priv->rng.priv);
87 pm_runtime_put_sync_autosuspend((struct device *) priv->rng.priv);
89 return retval || !wait ? retval : -EIO;
92 static int stm32_rng_init(struct hwrng *rng)
94 struct stm32_rng_private *priv =
95 container_of(rng, struct stm32_rng_private, rng);
96 int err;
98 err = clk_prepare_enable(priv->clk);
99 if (err)
100 return err;
102 writel_relaxed(RNG_CR_RNGEN, priv->base + RNG_CR);
104 /* clear error indicators */
105 writel_relaxed(0, priv->base + RNG_SR);
107 return 0;
110 static void stm32_rng_cleanup(struct hwrng *rng)
112 struct stm32_rng_private *priv =
113 container_of(rng, struct stm32_rng_private, rng);
115 writel_relaxed(0, priv->base + RNG_CR);
116 clk_disable_unprepare(priv->clk);
119 static int stm32_rng_probe(struct platform_device *ofdev)
121 struct device *dev = &ofdev->dev;
122 struct device_node *np = ofdev->dev.of_node;
123 struct stm32_rng_private *priv;
124 struct resource res;
125 int err;
127 priv = devm_kzalloc(dev, sizeof(struct stm32_rng_private), GFP_KERNEL);
128 if (!priv)
129 return -ENOMEM;
131 err = of_address_to_resource(np, 0, &res);
132 if (err)
133 return err;
135 priv->base = devm_ioremap_resource(dev, &res);
136 if (IS_ERR(priv->base))
137 return PTR_ERR(priv->base);
139 priv->clk = devm_clk_get(&ofdev->dev, NULL);
140 if (IS_ERR(priv->clk))
141 return PTR_ERR(priv->clk);
143 dev_set_drvdata(dev, priv);
145 priv->rng.name = dev_driver_string(dev),
146 #ifndef CONFIG_PM
147 priv->rng.init = stm32_rng_init,
148 priv->rng.cleanup = stm32_rng_cleanup,
149 #endif
150 priv->rng.read = stm32_rng_read,
151 priv->rng.priv = (unsigned long) dev;
153 pm_runtime_set_autosuspend_delay(dev, 100);
154 pm_runtime_use_autosuspend(dev);
155 pm_runtime_enable(dev);
157 return devm_hwrng_register(dev, &priv->rng);
160 #ifdef CONFIG_PM
161 static int stm32_rng_runtime_suspend(struct device *dev)
163 struct stm32_rng_private *priv = dev_get_drvdata(dev);
165 stm32_rng_cleanup(&priv->rng);
167 return 0;
170 static int stm32_rng_runtime_resume(struct device *dev)
172 struct stm32_rng_private *priv = dev_get_drvdata(dev);
174 return stm32_rng_init(&priv->rng);
176 #endif
178 static UNIVERSAL_DEV_PM_OPS(stm32_rng_pm_ops, stm32_rng_runtime_suspend,
179 stm32_rng_runtime_resume, NULL);
181 static const struct of_device_id stm32_rng_match[] = {
183 .compatible = "st,stm32-rng",
187 MODULE_DEVICE_TABLE(of, stm32_rng_match);
189 static struct platform_driver stm32_rng_driver = {
190 .driver = {
191 .name = "stm32-rng",
192 .pm = &stm32_rng_pm_ops,
193 .of_match_table = stm32_rng_match,
195 .probe = stm32_rng_probe,
198 module_platform_driver(stm32_rng_driver);
200 MODULE_LICENSE("GPL");
201 MODULE_AUTHOR("Daniel Thompson <daniel.thompson@linaro.org>");
202 MODULE_DESCRIPTION("STMicroelectronics STM32 RNG device driver");