drivers/rtc/rtc-sun6i.c

   1 /*
   2  * An RTC driver for Allwinner A31/A23
   3  *
   4  * Copyright (c) 2014, Chen-Yu Tsai <wens@csie.org>
   5  *
   6  * based on rtc-sunxi.c
   7  *
   8  * An RTC driver for Allwinner A10/A20
   9  *
  10  * Copyright (c) 2013, Carlo Caione <carlo.caione@gmail.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License as published by
  14  * the Free Software Foundation; either version 2 of the License, or
  15  * (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful, but WITHOUT
  18  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  19  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  20  * more details.
  21  */
  22
  23 #include <linux/delay.h>
  24 #include <linux/err.h>
  25 #include <linux/fs.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kernel.h>
  30 #include <linux/module.h>
  31 #include <linux/of.h>
  32 #include <linux/of_address.h>
  33 #include <linux/of_device.h>
  34 #include <linux/platform_device.h>
  35 #include <linux/rtc.h>
  36 #include <linux/types.h>
  37
  38 /* Control register */
  39 #define SUN6I_LOSC_CTRL                         0x0000
  40 #define SUN6I_LOSC_CTRL_KEY                     (0x16aa << 16)
  41 #define SUN6I_LOSC_CTRL_ALM_DHMS_ACC            BIT(9)
  42 #define SUN6I_LOSC_CTRL_RTC_HMS_ACC             BIT(8)
  43 #define SUN6I_LOSC_CTRL_RTC_YMD_ACC             BIT(7)
  44 #define SUN6I_LOSC_CTRL_EXT_OSC                 BIT(0)
  45 #define SUN6I_LOSC_CTRL_ACC_MASK                GENMASK(9, 7)
  46
  47 /* RTC */
  48 #define SUN6I_RTC_YMD                           0x0010
  49 #define SUN6I_RTC_HMS                           0x0014
  50
  51 /* Alarm 0 (counter) */
  52 #define SUN6I_ALRM_COUNTER                      0x0020
  53 #define SUN6I_ALRM_CUR_VAL                      0x0024
  54 #define SUN6I_ALRM_EN                           0x0028
  55 #define SUN6I_ALRM_EN_CNT_EN                    BIT(0)
  56 #define SUN6I_ALRM_IRQ_EN                       0x002c
  57 #define SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN            BIT(0)
  58 #define SUN6I_ALRM_IRQ_STA                      0x0030
  59 #define SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND         BIT(0)
  60
  61 /* Alarm 1 (wall clock) */
  62 #define SUN6I_ALRM1_EN                          0x0044
  63 #define SUN6I_ALRM1_IRQ_EN                      0x0048
  64 #define SUN6I_ALRM1_IRQ_STA                     0x004c
  65 #define SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND       BIT(0)
  66
  67 /* Alarm config */
  68 #define SUN6I_ALARM_CONFIG                      0x0050
  69 #define SUN6I_ALARM_CONFIG_WAKEUP               BIT(0)
  70
  71 /*
  72  * Get date values
  73  */
  74 #define SUN6I_DATE_GET_DAY_VALUE(x)             ((x)  & 0x0000001f)
  75 #define SUN6I_DATE_GET_MON_VALUE(x)             (((x) & 0x00000f00) >> 8)
  76 #define SUN6I_DATE_GET_YEAR_VALUE(x)            (((x) & 0x003f0000) >> 16)
  77 #define SUN6I_LEAP_GET_VALUE(x)                 (((x) & 0x00400000) >> 22)
  78
  79 /*
  80  * Get time values
  81  */
  82 #define SUN6I_TIME_GET_SEC_VALUE(x)             ((x)  & 0x0000003f)
  83 #define SUN6I_TIME_GET_MIN_VALUE(x)             (((x) & 0x00003f00) >> 8)
  84 #define SUN6I_TIME_GET_HOUR_VALUE(x)            (((x) & 0x001f0000) >> 16)
  85
  86 /*
  87  * Set date values
  88  */
  89 #define SUN6I_DATE_SET_DAY_VALUE(x)             ((x)       & 0x0000001f)
  90 #define SUN6I_DATE_SET_MON_VALUE(x)             ((x) <<  8 & 0x00000f00)
  91 #define SUN6I_DATE_SET_YEAR_VALUE(x)            ((x) << 16 & 0x003f0000)
  92 #define SUN6I_LEAP_SET_VALUE(x)                 ((x) << 22 & 0x00400000)
  93
  94 /*
  95  * Set time values
  96  */
  97 #define SUN6I_TIME_SET_SEC_VALUE(x)             ((x)       & 0x0000003f)
  98 #define SUN6I_TIME_SET_MIN_VALUE(x)             ((x) <<  8 & 0x00003f00)
  99 #define SUN6I_TIME_SET_HOUR_VALUE(x)            ((x) << 16 & 0x001f0000)
 100
 101 /*
 102  * The year parameter passed to the driver is usually an offset relative to
 103  * the year 1900. This macro is used to convert this offset to another one
 104  * relative to the minimum year allowed by the hardware.
 105  *
 106  * The year range is 1970 - 2033. This range is selected to match Allwinner's
 107  * driver, even though it is somewhat limited.
 108  */
 109 #define SUN6I_YEAR_MIN                          1970
 110 #define SUN6I_YEAR_MAX                          2033
 111 #define SUN6I_YEAR_OFF                          (SUN6I_YEAR_MIN - 1900)
 112
 113 struct sun6i_rtc_dev {
 114         struct rtc_device *rtc;
 115         struct device *dev;
 116         void __iomem *base;
 117         int irq;
 118         unsigned long alarm;
 119
 120         spinlock_t lock;
 121 };
 122
 123 static irqreturn_t sun6i_rtc_alarmirq(int irq, void *id)
 124 {
 125         struct sun6i_rtc_dev *chip = (struct sun6i_rtc_dev *) id;
 126         irqreturn_t ret = IRQ_NONE;
 127         u32 val;
 128
 129         spin_lock(&chip->lock);
 130         val = readl(chip->base + SUN6I_ALRM_IRQ_STA);
 131
 132         if (val & SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND) {
 133                 val |= SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND;
 134                 writel(val, chip->base + SUN6I_ALRM_IRQ_STA);
 135
 136                 rtc_update_irq(chip->rtc, 1, RTC_AF | RTC_IRQF);
 137
 138                 ret = IRQ_HANDLED;
 139         }
 140         spin_unlock(&chip->lock);
 141
 142         return ret;
 143 }
 144
 145 static void sun6i_rtc_setaie(int to, struct sun6i_rtc_dev *chip)
 146 {
 147         u32 alrm_val = 0;
 148         u32 alrm_irq_val = 0;
 149         u32 alrm_wake_val = 0;
 150         unsigned long flags;
 151
 152         if (to) {
 153                 alrm_val = SUN6I_ALRM_EN_CNT_EN;
 154                 alrm_irq_val = SUN6I_ALRM_IRQ_EN_CNT_IRQ_EN;
 155                 alrm_wake_val = SUN6I_ALARM_CONFIG_WAKEUP;
 156         } else {
 157                 writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
 158                        chip->base + SUN6I_ALRM_IRQ_STA);
 159         }
 160
 161         spin_lock_irqsave(&chip->lock, flags);
 162         writel(alrm_val, chip->base + SUN6I_ALRM_EN);
 163         writel(alrm_irq_val, chip->base + SUN6I_ALRM_IRQ_EN);
 164         writel(alrm_wake_val, chip->base + SUN6I_ALARM_CONFIG);
 165         spin_unlock_irqrestore(&chip->lock, flags);
 166 }
 167
 168 static int sun6i_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
 169 {
 170         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 171         u32 date, time;
 172
 173         /*
 174          * read again in case it changes
 175          */
 176         do {
 177                 date = readl(chip->base + SUN6I_RTC_YMD);
 178                 time = readl(chip->base + SUN6I_RTC_HMS);
 179         } while ((date != readl(chip->base + SUN6I_RTC_YMD)) ||
 180                  (time != readl(chip->base + SUN6I_RTC_HMS)));
 181
 182         rtc_tm->tm_sec  = SUN6I_TIME_GET_SEC_VALUE(time);
 183         rtc_tm->tm_min  = SUN6I_TIME_GET_MIN_VALUE(time);
 184         rtc_tm->tm_hour = SUN6I_TIME_GET_HOUR_VALUE(time);
 185
 186         rtc_tm->tm_mday = SUN6I_DATE_GET_DAY_VALUE(date);
 187         rtc_tm->tm_mon  = SUN6I_DATE_GET_MON_VALUE(date);
 188         rtc_tm->tm_year = SUN6I_DATE_GET_YEAR_VALUE(date);
 189
 190         rtc_tm->tm_mon  -= 1;
 191
 192         /*
 193          * switch from (data_year->min)-relative offset to
 194          * a (1900)-relative one
 195          */
 196         rtc_tm->tm_year += SUN6I_YEAR_OFF;
 197
 198         return rtc_valid_tm(rtc_tm);
 199 }
 200
 201 static int sun6i_rtc_getalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 202 {
 203         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 204         unsigned long flags;
 205         u32 alrm_st;
 206         u32 alrm_en;
 207
 208         spin_lock_irqsave(&chip->lock, flags);
 209         alrm_en = readl(chip->base + SUN6I_ALRM_IRQ_EN);
 210         alrm_st = readl(chip->base + SUN6I_ALRM_IRQ_STA);
 211         spin_unlock_irqrestore(&chip->lock, flags);
 212
 213         wkalrm->enabled = !!(alrm_en & SUN6I_ALRM_EN_CNT_EN);
 214         wkalrm->pending = !!(alrm_st & SUN6I_ALRM_EN_CNT_EN);
 215         rtc_time_to_tm(chip->alarm, &wkalrm->time);
 216
 217         return 0;
 218 }
 219
 220 static int sun6i_rtc_setalarm(struct device *dev, struct rtc_wkalrm *wkalrm)
 221 {
 222         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 223         struct rtc_time *alrm_tm = &wkalrm->time;
 224         struct rtc_time tm_now;
 225         unsigned long time_now = 0;
 226         unsigned long time_set = 0;
 227         unsigned long time_gap = 0;
 228         int ret = 0;
 229
 230         ret = sun6i_rtc_gettime(dev, &tm_now);
 231         if (ret < 0) {
 232                 dev_err(dev, "Error in getting time\n");
 233                 return -EINVAL;
 234         }
 235
 236         rtc_tm_to_time(alrm_tm, &time_set);
 237         rtc_tm_to_time(&tm_now, &time_now);
 238         if (time_set <= time_now) {
 239                 dev_err(dev, "Date to set in the past\n");
 240                 return -EINVAL;
 241         }
 242
 243         time_gap = time_set - time_now;
 244
 245         if (time_gap > U32_MAX) {
 246                 dev_err(dev, "Date too far in the future\n");
 247                 return -EINVAL;
 248         }
 249
 250         sun6i_rtc_setaie(0, chip);
 251         writel(0, chip->base + SUN6I_ALRM_COUNTER);
 252         usleep_range(100, 300);
 253
 254         writel(time_gap, chip->base + SUN6I_ALRM_COUNTER);
 255         chip->alarm = time_set;
 256
 257         sun6i_rtc_setaie(wkalrm->enabled, chip);
 258
 259         return 0;
 260 }
 261
 262 static int sun6i_rtc_wait(struct sun6i_rtc_dev *chip, int offset,
 263                           unsigned int mask, unsigned int ms_timeout)
 264 {
 265         const unsigned long timeout = jiffies + msecs_to_jiffies(ms_timeout);
 266         u32 reg;
 267
 268         do {
 269                 reg = readl(chip->base + offset);
 270                 reg &= mask;
 271
 272                 if (!reg)
 273                         return 0;
 274
 275         } while (time_before(jiffies, timeout));
 276
 277         return -ETIMEDOUT;
 278 }
 279
 280 static int sun6i_rtc_settime(struct device *dev, struct rtc_time *rtc_tm)
 281 {
 282         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 283         u32 date = 0;
 284         u32 time = 0;
 285         int year;
 286
 287         year = rtc_tm->tm_year + 1900;
 288         if (year < SUN6I_YEAR_MIN || year > SUN6I_YEAR_MAX) {
 289                 dev_err(dev, "rtc only supports year in range %d - %d\n",
 290                         SUN6I_YEAR_MIN, SUN6I_YEAR_MAX);
 291                 return -EINVAL;
 292         }
 293
 294         rtc_tm->tm_year -= SUN6I_YEAR_OFF;
 295         rtc_tm->tm_mon += 1;
 296
 297         date = SUN6I_DATE_SET_DAY_VALUE(rtc_tm->tm_mday) |
 298                 SUN6I_DATE_SET_MON_VALUE(rtc_tm->tm_mon)  |
 299                 SUN6I_DATE_SET_YEAR_VALUE(rtc_tm->tm_year);
 300
 301         if (is_leap_year(year))
 302                 date |= SUN6I_LEAP_SET_VALUE(1);
 303
 304         time = SUN6I_TIME_SET_SEC_VALUE(rtc_tm->tm_sec)  |
 305                 SUN6I_TIME_SET_MIN_VALUE(rtc_tm->tm_min)  |
 306                 SUN6I_TIME_SET_HOUR_VALUE(rtc_tm->tm_hour);
 307
 308         /* Check whether registers are writable */
 309         if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
 310                            SUN6I_LOSC_CTRL_ACC_MASK, 50)) {
 311                 dev_err(dev, "rtc is still busy.\n");
 312                 return -EBUSY;
 313         }
 314
 315         writel(time, chip->base + SUN6I_RTC_HMS);
 316
 317         /*
 318          * After writing the RTC HH-MM-SS register, the
 319          * SUN6I_LOSC_CTRL_RTC_HMS_ACC bit is set and it will not
 320          * be cleared until the real writing operation is finished
 321          */
 322
 323         if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
 324                            SUN6I_LOSC_CTRL_RTC_HMS_ACC, 50)) {
 325                 dev_err(dev, "Failed to set rtc time.\n");
 326                 return -ETIMEDOUT;
 327         }
 328
 329         writel(date, chip->base + SUN6I_RTC_YMD);
 330
 331         /*
 332          * After writing the RTC YY-MM-DD register, the
 333          * SUN6I_LOSC_CTRL_RTC_YMD_ACC bit is set and it will not
 334          * be cleared until the real writing operation is finished
 335          */
 336
 337         if (sun6i_rtc_wait(chip, SUN6I_LOSC_CTRL,
 338                            SUN6I_LOSC_CTRL_RTC_YMD_ACC, 50)) {
 339                 dev_err(dev, "Failed to set rtc time.\n");
 340                 return -ETIMEDOUT;
 341         }
 342
 343         return 0;
 344 }
 345
 346 static int sun6i_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
 347 {
 348         struct sun6i_rtc_dev *chip = dev_get_drvdata(dev);
 349
 350         if (!enabled)
 351                 sun6i_rtc_setaie(enabled, chip);
 352
 353         return 0;
 354 }
 355
 356 static const struct rtc_class_ops sun6i_rtc_ops = {
 357         .read_time              = sun6i_rtc_gettime,
 358         .set_time               = sun6i_rtc_settime,
 359         .read_alarm             = sun6i_rtc_getalarm,
 360         .set_alarm              = sun6i_rtc_setalarm,
 361         .alarm_irq_enable       = sun6i_rtc_alarm_irq_enable
 362 };
 363
 364 static int sun6i_rtc_probe(struct platform_device *pdev)
 365 {
 366         struct sun6i_rtc_dev *chip;
 367         struct resource *res;
 368         int ret;
 369
 370         chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
 371         if (!chip)
 372                 return -ENOMEM;
 373         spin_lock_init(&chip->lock);
 374
 375         platform_set_drvdata(pdev, chip);
 376         chip->dev = &pdev->dev;
 377
 378         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 379         chip->base = devm_ioremap_resource(&pdev->dev, res);
 380         if (IS_ERR(chip->base))
 381                 return PTR_ERR(chip->base);
 382
 383         chip->irq = platform_get_irq(pdev, 0);
 384         if (chip->irq < 0) {
 385                 dev_err(&pdev->dev, "No IRQ resource\n");
 386                 return chip->irq;
 387         }
 388
 389         ret = devm_request_irq(&pdev->dev, chip->irq, sun6i_rtc_alarmirq,
 390                                0, dev_name(&pdev->dev), chip);
 391         if (ret) {
 392                 dev_err(&pdev->dev, "Could not request IRQ\n");
 393                 return ret;
 394         }
 395
 396         /* clear the alarm counter value */
 397         writel(0, chip->base + SUN6I_ALRM_COUNTER);
 398
 399         /* disable counter alarm */
 400         writel(0, chip->base + SUN6I_ALRM_EN);
 401
 402         /* disable counter alarm interrupt */
 403         writel(0, chip->base + SUN6I_ALRM_IRQ_EN);
 404
 405         /* disable week alarm */
 406         writel(0, chip->base + SUN6I_ALRM1_EN);
 407
 408         /* disable week alarm interrupt */
 409         writel(0, chip->base + SUN6I_ALRM1_IRQ_EN);
 410
 411         /* clear counter alarm pending interrupts */
 412         writel(SUN6I_ALRM_IRQ_STA_CNT_IRQ_PEND,
 413                chip->base + SUN6I_ALRM_IRQ_STA);
 414
 415         /* clear week alarm pending interrupts */
 416         writel(SUN6I_ALRM1_IRQ_STA_WEEK_IRQ_PEND,
 417                chip->base + SUN6I_ALRM1_IRQ_STA);
 418
 419         /* disable alarm wakeup */
 420         writel(0, chip->base + SUN6I_ALARM_CONFIG);
 421
 422         /* switch to the external, more precise, oscillator */
 423         writel(SUN6I_LOSC_CTRL_KEY | SUN6I_LOSC_CTRL_EXT_OSC,
 424                chip->base + SUN6I_LOSC_CTRL);
 425
 426         chip->rtc = rtc_device_register("rtc-sun6i", &pdev->dev,
 427                                         &sun6i_rtc_ops, THIS_MODULE);
 428         if (IS_ERR(chip->rtc)) {
 429                 dev_err(&pdev->dev, "unable to register device\n");
 430                 return PTR_ERR(chip->rtc);
 431         }
 432
 433         dev_info(&pdev->dev, "RTC enabled\n");
 434
 435         return 0;
 436 }
 437
 438 static int sun6i_rtc_remove(struct platform_device *pdev)
 439 {
 440         struct sun6i_rtc_dev *chip = platform_get_drvdata(pdev);
 441
 442         rtc_device_unregister(chip->rtc);
 443
 444         return 0;
 445 }
 446
 447 static const struct of_device_id sun6i_rtc_dt_ids[] = {
 448         { .compatible = "allwinner,sun6i-a31-rtc" },
 449         { /* sentinel */ },
 450 };
 451 MODULE_DEVICE_TABLE(of, sun6i_rtc_dt_ids);
 452
 453 static struct platform_driver sun6i_rtc_driver = {
 454         .probe          = sun6i_rtc_probe,
 455         .remove         = sun6i_rtc_remove,
 456         .driver         = {
 457                 .name           = "sun6i-rtc",
 458                 .of_match_table = sun6i_rtc_dt_ids,
 459         },
 460 };
 461 builtin_platform_driver(sun6i_rtc_driver);