drivers/rtc/rtc-twl.c

   1 /*
   2  * rtc-twl.c -- TWL Real Time Clock interface
   3  *
   4  * Copyright (C) 2007 MontaVista Software, Inc
   5  * Author: Alexandre Rusev <source@mvista.com>
   6  *
   7  * Based on original TI driver twl4030-rtc.c
   8  *   Copyright (C) 2006 Texas Instruments, Inc.
   9  *
  10  * Based on rtc-omap.c
  11  *   Copyright (C) 2003 MontaVista Software, Inc.
  12  *   Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  13  *   Copyright (C) 2006 David Brownell
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License
  17  * as published by the Free Software Foundation; either version
  18  * 2 of the License, or (at your option) any later version.
  19  */
  20
  21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22
  23 #include <linux/kernel.h>
  24 #include <linux/errno.h>
  25 #include <linux/init.h>
  26 #include <linux/module.h>
  27 #include <linux/types.h>
  28 #include <linux/rtc.h>
  29 #include <linux/bcd.h>
  30 #include <linux/platform_device.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/of.h>
  33
  34 #include <linux/i2c/twl.h>
  35
  36
  37 /*
  38  * RTC block register offsets (use TWL_MODULE_RTC)
  39  */
  40 enum {
  41         REG_SECONDS_REG = 0,
  42         REG_MINUTES_REG,
  43         REG_HOURS_REG,
  44         REG_DAYS_REG,
  45         REG_MONTHS_REG,
  46         REG_YEARS_REG,
  47         REG_WEEKS_REG,
  48
  49         REG_ALARM_SECONDS_REG,
  50         REG_ALARM_MINUTES_REG,
  51         REG_ALARM_HOURS_REG,
  52         REG_ALARM_DAYS_REG,
  53         REG_ALARM_MONTHS_REG,
  54         REG_ALARM_YEARS_REG,
  55
  56         REG_RTC_CTRL_REG,
  57         REG_RTC_STATUS_REG,
  58         REG_RTC_INTERRUPTS_REG,
  59
  60         REG_RTC_COMP_LSB_REG,
  61         REG_RTC_COMP_MSB_REG,
  62 };
  63 static const u8 twl4030_rtc_reg_map[] = {
  64         [REG_SECONDS_REG] = 0x00,
  65         [REG_MINUTES_REG] = 0x01,
  66         [REG_HOURS_REG] = 0x02,
  67         [REG_DAYS_REG] = 0x03,
  68         [REG_MONTHS_REG] = 0x04,
  69         [REG_YEARS_REG] = 0x05,
  70         [REG_WEEKS_REG] = 0x06,
  71
  72         [REG_ALARM_SECONDS_REG] = 0x07,
  73         [REG_ALARM_MINUTES_REG] = 0x08,
  74         [REG_ALARM_HOURS_REG] = 0x09,
  75         [REG_ALARM_DAYS_REG] = 0x0A,
  76         [REG_ALARM_MONTHS_REG] = 0x0B,
  77         [REG_ALARM_YEARS_REG] = 0x0C,
  78
  79         [REG_RTC_CTRL_REG] = 0x0D,
  80         [REG_RTC_STATUS_REG] = 0x0E,
  81         [REG_RTC_INTERRUPTS_REG] = 0x0F,
  82
  83         [REG_RTC_COMP_LSB_REG] = 0x10,
  84         [REG_RTC_COMP_MSB_REG] = 0x11,
  85 };
  86 static const u8 twl6030_rtc_reg_map[] = {
  87         [REG_SECONDS_REG] = 0x00,
  88         [REG_MINUTES_REG] = 0x01,
  89         [REG_HOURS_REG] = 0x02,
  90         [REG_DAYS_REG] = 0x03,
  91         [REG_MONTHS_REG] = 0x04,
  92         [REG_YEARS_REG] = 0x05,
  93         [REG_WEEKS_REG] = 0x06,
  94
  95         [REG_ALARM_SECONDS_REG] = 0x08,
  96         [REG_ALARM_MINUTES_REG] = 0x09,
  97         [REG_ALARM_HOURS_REG] = 0x0A,
  98         [REG_ALARM_DAYS_REG] = 0x0B,
  99         [REG_ALARM_MONTHS_REG] = 0x0C,
 100         [REG_ALARM_YEARS_REG] = 0x0D,
 101
 102         [REG_RTC_CTRL_REG] = 0x10,
 103         [REG_RTC_STATUS_REG] = 0x11,
 104         [REG_RTC_INTERRUPTS_REG] = 0x12,
 105
 106         [REG_RTC_COMP_LSB_REG] = 0x13,
 107         [REG_RTC_COMP_MSB_REG] = 0x14,
 108 };
 109
 110 /* RTC_CTRL_REG bitfields */
 111 #define BIT_RTC_CTRL_REG_STOP_RTC_M              0x01
 112 #define BIT_RTC_CTRL_REG_ROUND_30S_M             0x02
 113 #define BIT_RTC_CTRL_REG_AUTO_COMP_M             0x04
 114 #define BIT_RTC_CTRL_REG_MODE_12_24_M            0x08
 115 #define BIT_RTC_CTRL_REG_TEST_MODE_M             0x10
 116 #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M        0x20
 117 #define BIT_RTC_CTRL_REG_GET_TIME_M              0x40
 118 #define BIT_RTC_CTRL_REG_RTC_V_OPT               0x80
 119
 120 /* RTC_STATUS_REG bitfields */
 121 #define BIT_RTC_STATUS_REG_RUN_M                 0x02
 122 #define BIT_RTC_STATUS_REG_1S_EVENT_M            0x04
 123 #define BIT_RTC_STATUS_REG_1M_EVENT_M            0x08
 124 #define BIT_RTC_STATUS_REG_1H_EVENT_M            0x10
 125 #define BIT_RTC_STATUS_REG_1D_EVENT_M            0x20
 126 #define BIT_RTC_STATUS_REG_ALARM_M               0x40
 127 #define BIT_RTC_STATUS_REG_POWER_UP_M            0x80
 128
 129 /* RTC_INTERRUPTS_REG bitfields */
 130 #define BIT_RTC_INTERRUPTS_REG_EVERY_M           0x03
 131 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M        0x04
 132 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M        0x08
 133
 134
 135 /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
 136 #define ALL_TIME_REGS           6
 137
 138 /*----------------------------------------------------------------------*/
 139 static u8  *rtc_reg_map;
 140
 141 /*
 142  * Supports 1 byte read from TWL RTC register.
 143  */
 144 static int twl_rtc_read_u8(u8 *data, u8 reg)
 145 {
 146         int ret;
 147
 148         ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
 149         if (ret < 0)
 150                 pr_err("Could not read TWL register %X - error %d\n", reg, ret);
 151         return ret;
 152 }
 153
 154 /*
 155  * Supports 1 byte write to TWL RTC registers.
 156  */
 157 static int twl_rtc_write_u8(u8 data, u8 reg)
 158 {
 159         int ret;
 160
 161         ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
 162         if (ret < 0)
 163                 pr_err("Could not write TWL register %X - error %d\n",
 164                        reg, ret);
 165         return ret;
 166 }
 167
 168 /*
 169  * Cache the value for timer/alarm interrupts register; this is
 170  * only changed by callers holding rtc ops lock (or resume).
 171  */
 172 static unsigned char rtc_irq_bits;
 173
 174 /*
 175  * Enable 1/second update and/or alarm interrupts.
 176  */
 177 static int set_rtc_irq_bit(unsigned char bit)
 178 {
 179         unsigned char val;
 180         int ret;
 181
 182         /* if the bit is set, return from here */
 183         if (rtc_irq_bits & bit)
 184                 return 0;
 185
 186         val = rtc_irq_bits | bit;
 187         val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
 188         ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
 189         if (ret == 0)
 190                 rtc_irq_bits = val;
 191
 192         return ret;
 193 }
 194
 195 /*
 196  * Disable update and/or alarm interrupts.
 197  */
 198 static int mask_rtc_irq_bit(unsigned char bit)
 199 {
 200         unsigned char val;
 201         int ret;
 202
 203         /* if the bit is clear, return from here */
 204         if (!(rtc_irq_bits & bit))
 205                 return 0;
 206
 207         val = rtc_irq_bits & ~bit;
 208         ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
 209         if (ret == 0)
 210                 rtc_irq_bits = val;
 211
 212         return ret;
 213 }
 214
 215 static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
 216 {
 217         struct platform_device *pdev = to_platform_device(dev);
 218         int irq = platform_get_irq(pdev, 0);
 219         static bool twl_rtc_wake_enabled;
 220         int ret;
 221
 222         if (enabled) {
 223                 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
 224                 if (device_can_wakeup(dev) && !twl_rtc_wake_enabled) {
 225                         enable_irq_wake(irq);
 226                         twl_rtc_wake_enabled = true;
 227                 }
 228         } else {
 229                 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
 230                 if (twl_rtc_wake_enabled) {
 231                         disable_irq_wake(irq);
 232                         twl_rtc_wake_enabled = false;
 233                 }
 234         }
 235
 236         return ret;
 237 }
 238
 239 /*
 240  * Gets current TWL RTC time and date parameters.
 241  *
 242  * The RTC's time/alarm representation is not what gmtime(3) requires
 243  * Linux to use:
 244  *
 245  *  - Months are 1..12 vs Linux 0-11
 246  *  - Years are 0..99 vs Linux 1900..N (we assume 21st century)
 247  */
 248 static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
 249 {
 250         unsigned char rtc_data[ALL_TIME_REGS];
 251         int ret;
 252         u8 save_control;
 253         u8 rtc_control;
 254
 255         ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
 256         if (ret < 0) {
 257                 dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret);
 258                 return ret;
 259         }
 260         /* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */
 261         if (twl_class_is_6030()) {
 262                 if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) {
 263                         save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M;
 264                         ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
 265                         if (ret < 0) {
 266                                 dev_err(dev, "%s clr GET_TIME, error %d\n",
 267                                         __func__, ret);
 268                                 return ret;
 269                         }
 270                 }
 271         }
 272
 273         /* Copy RTC counting registers to static registers or latches */
 274         rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M;
 275
 276         /* for twl6030/32 enable read access to static shadowed registers */
 277         if (twl_class_is_6030())
 278                 rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT;
 279
 280         ret = twl_rtc_write_u8(rtc_control, REG_RTC_CTRL_REG);
 281         if (ret < 0) {
 282                 dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret);
 283                 return ret;
 284         }
 285
 286         ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
 287                         (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
 288
 289         if (ret < 0) {
 290                 dev_err(dev, "%s: reading data, error %d\n", __func__, ret);
 291                 return ret;
 292         }
 293
 294         /* for twl6030 restore original state of rtc control register */
 295         if (twl_class_is_6030()) {
 296                 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
 297                 if (ret < 0) {
 298                         dev_err(dev, "%s: restore CTRL_REG, error %d\n",
 299                                 __func__, ret);
 300                         return ret;
 301                 }
 302         }
 303
 304         tm->tm_sec = bcd2bin(rtc_data[0]);
 305         tm->tm_min = bcd2bin(rtc_data[1]);
 306         tm->tm_hour = bcd2bin(rtc_data[2]);
 307         tm->tm_mday = bcd2bin(rtc_data[3]);
 308         tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
 309         tm->tm_year = bcd2bin(rtc_data[5]) + 100;
 310
 311         return ret;
 312 }
 313
 314 static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
 315 {
 316         unsigned char save_control;
 317         unsigned char rtc_data[ALL_TIME_REGS];
 318         int ret;
 319
 320         rtc_data[0] = bin2bcd(tm->tm_sec);
 321         rtc_data[1] = bin2bcd(tm->tm_min);
 322         rtc_data[2] = bin2bcd(tm->tm_hour);
 323         rtc_data[3] = bin2bcd(tm->tm_mday);
 324         rtc_data[4] = bin2bcd(tm->tm_mon + 1);
 325         rtc_data[5] = bin2bcd(tm->tm_year - 100);
 326
 327         /* Stop RTC while updating the TC registers */
 328         ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
 329         if (ret < 0)
 330                 goto out;
 331
 332         save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
 333         ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
 334         if (ret < 0)
 335                 goto out;
 336
 337         /* update all the time registers in one shot */
 338         ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
 339                 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
 340         if (ret < 0) {
 341                 dev_err(dev, "rtc_set_time error %d\n", ret);
 342                 goto out;
 343         }
 344
 345         /* Start back RTC */
 346         save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
 347         ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
 348
 349 out:
 350         return ret;
 351 }
 352
 353 /*
 354  * Gets current TWL RTC alarm time.
 355  */
 356 static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
 357 {
 358         unsigned char rtc_data[ALL_TIME_REGS];
 359         int ret;
 360
 361         ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
 362                         (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
 363         if (ret < 0) {
 364                 dev_err(dev, "rtc_read_alarm error %d\n", ret);
 365                 return ret;
 366         }
 367
 368         /* some of these fields may be wildcard/"match all" */
 369         alm->time.tm_sec = bcd2bin(rtc_data[0]);
 370         alm->time.tm_min = bcd2bin(rtc_data[1]);
 371         alm->time.tm_hour = bcd2bin(rtc_data[2]);
 372         alm->time.tm_mday = bcd2bin(rtc_data[3]);
 373         alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
 374         alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
 375
 376         /* report cached alarm enable state */
 377         if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
 378                 alm->enabled = 1;
 379
 380         return ret;
 381 }
 382
 383 static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
 384 {
 385         unsigned char alarm_data[ALL_TIME_REGS];
 386         int ret;
 387
 388         ret = twl_rtc_alarm_irq_enable(dev, 0);
 389         if (ret)
 390                 goto out;
 391
 392         alarm_data[0] = bin2bcd(alm->time.tm_sec);
 393         alarm_data[1] = bin2bcd(alm->time.tm_min);
 394         alarm_data[2] = bin2bcd(alm->time.tm_hour);
 395         alarm_data[3] = bin2bcd(alm->time.tm_mday);
 396         alarm_data[4] = bin2bcd(alm->time.tm_mon + 1);
 397         alarm_data[5] = bin2bcd(alm->time.tm_year - 100);
 398
 399         /* update all the alarm registers in one shot */
 400         ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
 401                 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
 402         if (ret) {
 403                 dev_err(dev, "rtc_set_alarm error %d\n", ret);
 404                 goto out;
 405         }
 406
 407         if (alm->enabled)
 408                 ret = twl_rtc_alarm_irq_enable(dev, 1);
 409 out:
 410         return ret;
 411 }
 412
 413 static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
 414 {
 415         unsigned long events;
 416         int ret = IRQ_NONE;
 417         int res;
 418         u8 rd_reg;
 419
 420         res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
 421         if (res)
 422                 goto out;
 423         /*
 424          * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
 425          * only one (ALARM or RTC) interrupt source may be enabled
 426          * at time, we also could check our results
 427          * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
 428          */
 429         if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
 430                 events = RTC_IRQF | RTC_AF;
 431         else
 432                 events = RTC_IRQF | RTC_PF;
 433
 434         res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M,
 435                                    REG_RTC_STATUS_REG);
 436         if (res)
 437                 goto out;
 438
 439         if (twl_class_is_4030()) {
 440                 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
 441                  * needs 2 reads to clear the interrupt. One read is done in
 442                  * do_twl_pwrirq(). Doing the second read, to clear
 443                  * the bit.
 444                  *
 445                  * FIXME the reason PWR_ISR1 needs an extra read is that
 446                  * RTC_IF retriggered until we cleared REG_ALARM_M above.
 447                  * But re-reading like this is a bad hack; by doing so we
 448                  * risk wrongly clearing status for some other IRQ (losing
 449                  * the interrupt).  Be smarter about handling RTC_UF ...
 450                  */
 451                 res = twl_i2c_read_u8(TWL4030_MODULE_INT,
 452                         &rd_reg, TWL4030_INT_PWR_ISR1);
 453                 if (res)
 454                         goto out;
 455         }
 456
 457         /* Notify RTC core on event */
 458         rtc_update_irq(rtc, 1, events);
 459
 460         ret = IRQ_HANDLED;
 461 out:
 462         return ret;
 463 }
 464
 465 static const struct rtc_class_ops twl_rtc_ops = {
 466         .read_time      = twl_rtc_read_time,
 467         .set_time       = twl_rtc_set_time,
 468         .read_alarm     = twl_rtc_read_alarm,
 469         .set_alarm      = twl_rtc_set_alarm,
 470         .alarm_irq_enable = twl_rtc_alarm_irq_enable,
 471 };
 472
 473 /*----------------------------------------------------------------------*/
 474
 475 static int twl_rtc_probe(struct platform_device *pdev)
 476 {
 477         struct rtc_device *rtc;
 478         int ret = -EINVAL;
 479         int irq = platform_get_irq(pdev, 0);
 480         u8 rd_reg;
 481
 482         if (irq <= 0)
 483                 return ret;
 484
 485         /* Initialize the register map */
 486         if (twl_class_is_4030())
 487                 rtc_reg_map = (u8 *)twl4030_rtc_reg_map;
 488         else
 489                 rtc_reg_map = (u8 *)twl6030_rtc_reg_map;
 490
 491         ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
 492         if (ret < 0)
 493                 return ret;
 494
 495         if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
 496                 dev_warn(&pdev->dev, "Power up reset detected.\n");
 497
 498         if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
 499                 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
 500
 501         /* Clear RTC Power up reset and pending alarm interrupts */
 502         ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
 503         if (ret < 0)
 504                 return ret;
 505
 506         if (twl_class_is_6030()) {
 507                 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
 508                         REG_INT_MSK_LINE_A);
 509                 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
 510                         REG_INT_MSK_STS_A);
 511         }
 512
 513         dev_info(&pdev->dev, "Enabling TWL-RTC\n");
 514         ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG);
 515         if (ret < 0)
 516                 return ret;
 517
 518         /* ensure interrupts are disabled, bootloaders can be strange */
 519         ret = twl_rtc_write_u8(0, REG_RTC_INTERRUPTS_REG);
 520         if (ret < 0)
 521                 dev_warn(&pdev->dev, "unable to disable interrupt\n");
 522
 523         /* init cached IRQ enable bits */
 524         ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
 525         if (ret < 0)
 526                 return ret;
 527
 528         device_init_wakeup(&pdev->dev, 1);
 529
 530         rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
 531                                         &twl_rtc_ops, THIS_MODULE);
 532         if (IS_ERR(rtc)) {
 533                 dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
 534                         PTR_ERR(rtc));
 535                 return PTR_ERR(rtc);
 536         }
 537
 538         ret = devm_request_threaded_irq(&pdev->dev, irq, NULL,
 539                                         twl_rtc_interrupt,
 540                                         IRQF_TRIGGER_RISING | IRQF_ONESHOT,
 541                                         dev_name(&rtc->dev), rtc);
 542         if (ret < 0) {
 543                 dev_err(&pdev->dev, "IRQ is not free.\n");
 544                 return ret;
 545         }
 546
 547         platform_set_drvdata(pdev, rtc);
 548         return 0;
 549 }
 550
 551 /*
 552  * Disable all TWL RTC module interrupts.
 553  * Sets status flag to free.
 554  */
 555 static int twl_rtc_remove(struct platform_device *pdev)
 556 {
 557         /* leave rtc running, but disable irqs */
 558         mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
 559         mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
 560         if (twl_class_is_6030()) {
 561                 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
 562                         REG_INT_MSK_LINE_A);
 563                 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
 564                         REG_INT_MSK_STS_A);
 565         }
 566
 567         return 0;
 568 }
 569
 570 static void twl_rtc_shutdown(struct platform_device *pdev)
 571 {
 572         /* mask timer interrupts, but leave alarm interrupts on to enable
 573            power-on when alarm is triggered */
 574         mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
 575 }
 576
 577 #ifdef CONFIG_PM_SLEEP
 578 static unsigned char irqstat;
 579
 580 static int twl_rtc_suspend(struct device *dev)
 581 {
 582         irqstat = rtc_irq_bits;
 583
 584         mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
 585         return 0;
 586 }
 587
 588 static int twl_rtc_resume(struct device *dev)
 589 {
 590         set_rtc_irq_bit(irqstat);
 591         return 0;
 592 }
 593 #endif
 594
 595 static SIMPLE_DEV_PM_OPS(twl_rtc_pm_ops, twl_rtc_suspend, twl_rtc_resume);
 596
 597 #ifdef CONFIG_OF
 598 static const struct of_device_id twl_rtc_of_match[] = {
 599         {.compatible = "ti,twl4030-rtc", },
 600         { },
 601 };
 602 MODULE_DEVICE_TABLE(of, twl_rtc_of_match);
 603 #endif
 604
 605 MODULE_ALIAS("platform:twl_rtc");
 606
 607 static struct platform_driver twl4030rtc_driver = {
 608         .probe          = twl_rtc_probe,
 609         .remove         = twl_rtc_remove,
 610         .shutdown       = twl_rtc_shutdown,
 611         .driver         = {
 612                 .name           = "twl_rtc",
 613                 .pm             = &twl_rtc_pm_ops,
 614                 .of_match_table = of_match_ptr(twl_rtc_of_match),
 615         },
 616 };
 617
 618 module_platform_driver(twl4030rtc_driver);
 619
 620 MODULE_AUTHOR("Texas Instruments, MontaVista Software");
 621 MODULE_LICENSE("GPL");