1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: <isonum.txt>
4 ===========================================================
5 The PCI Express Advanced Error Reporting Driver Guide HOWTO
6 ===========================================================
8 :Authors: - T. Long Nguyen <tom.l.nguyen@intel.com>
9 - Yanmin Zhang <yanmin.zhang@intel.com>
11 :Copyright: |copy| 2006 Intel Corporation
19 This guide describes the basics of the PCI Express Advanced Error
20 Reporting (AER) driver and provides information on how to use it, as
21 well as how to enable the drivers of endpoint devices to conform with
22 PCI Express AER driver.
25 What is the PCI Express AER Driver?
26 -----------------------------------
28 PCI Express error signaling can occur on the PCI Express link itself
29 or on behalf of transactions initiated on the link. PCI Express
30 defines two error reporting paradigms: the baseline capability and
31 the Advanced Error Reporting capability. The baseline capability is
32 required of all PCI Express components providing a minimum defined
33 set of error reporting requirements. Advanced Error Reporting
34 capability is implemented with a PCI Express advanced error reporting
35 extended capability structure providing more robust error reporting.
37 The PCI Express AER driver provides the infrastructure to support PCI
38 Express Advanced Error Reporting capability. The PCI Express AER
39 driver provides three basic functions:
41 - Gathers the comprehensive error information if errors occurred.
42 - Reports error to the users.
43 - Performs error recovery actions.
45 AER driver only attaches root ports which support PCI-Express AER
52 Include the PCI Express AER Root Driver into the Linux Kernel
53 -------------------------------------------------------------
55 The PCI Express AER Root driver is a Root Port service driver attached
56 to the PCI Express Port Bus driver. If a user wants to use it, the driver
57 has to be compiled. Option CONFIG_PCIEAER supports this capability. It
58 depends on CONFIG_PCIEPORTBUS, so pls. set CONFIG_PCIEPORTBUS=y and
61 Load PCI Express AER Root Driver
62 --------------------------------
64 Some systems have AER support in firmware. Enabling Linux AER support at
65 the same time the firmware handles AER may result in unpredictable
66 behavior. Therefore, Linux does not handle AER events unless the firmware
67 grants AER control to the OS via the ACPI _OSC method. See the PCI FW 3.0
68 Specification for details regarding _OSC usage.
73 When a PCIe AER error is captured, an error message will be output to
74 console. If it's a correctable error, it is output as a warning.
75 Otherwise, it is printed as an error. So users could choose different
76 log level to filter out correctable error messages.
78 Below shows an example::
80 0000:50:00.0: PCIe Bus Error: severity=Uncorrected (Fatal), type=Transaction Layer, id=0500(Requester ID)
81 0000:50:00.0: device [8086:0329] error status/mask=00100000/00000000
82 0000:50:00.0: [20] Unsupported Request (First)
83 0000:50:00.0: TLP Header: 04000001 00200a03 05010000 00050100
85 In the example, 'Requester ID' means the ID of the device who sends
86 the error message to root port. Pls. refer to pci express specs for
89 AER Statistics / Counters
90 -------------------------
92 When PCIe AER errors are captured, the counters / statistics are also exposed
93 in the form of sysfs attributes which are documented at
94 Documentation/ABI/testing/sysfs-bus-pci-devices-aer_stats
99 To enable AER aware support requires a software driver to configure
100 the AER capability structure within its device and to provide callbacks.
102 To support AER better, developers need understand how AER does work
105 PCI Express errors are classified into two types: correctable errors
106 and uncorrectable errors. This classification is based on the impacts
107 of those errors, which may result in degraded performance or function
110 Correctable errors pose no impacts on the functionality of the
111 interface. The PCI Express protocol can recover without any software
112 intervention or any loss of data. These errors are detected and
113 corrected by hardware. Unlike correctable errors, uncorrectable
114 errors impact functionality of the interface. Uncorrectable errors
115 can cause a particular transaction or a particular PCI Express link
116 to be unreliable. Depending on those error conditions, uncorrectable
117 errors are further classified into non-fatal errors and fatal errors.
118 Non-fatal errors cause the particular transaction to be unreliable,
119 but the PCI Express link itself is fully functional. Fatal errors, on
120 the other hand, cause the link to be unreliable.
122 When AER is enabled, a PCI Express device will automatically send an
123 error message to the PCIe root port above it when the device captures
124 an error. The Root Port, upon receiving an error reporting message,
125 internally processes and logs the error message in its PCI Express
126 capability structure. Error information being logged includes storing
127 the error reporting agent's requestor ID into the Error Source
128 Identification Registers and setting the error bits of the Root Error
129 Status Register accordingly. If AER error reporting is enabled in Root
130 Error Command Register, the Root Port generates an interrupt if an
133 Note that the errors as described above are related to the PCI Express
134 hierarchy and links. These errors do not include any device specific
135 errors because device specific errors will still get sent directly to
138 Configure the AER capability structure
139 --------------------------------------
141 AER aware drivers of PCI Express component need change the device
142 control registers to enable AER. They also could change AER registers,
143 including mask and severity registers. Helper function
144 pci_enable_pcie_error_reporting could be used to enable AER. See
150 callback reset_link to reset pci express link
151 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
153 This callback is used to reset the pci express physical link when a
154 fatal error happens. The root port aer service driver provides a
155 default reset_link function, but different upstream ports might
156 have different specifications to reset pci express link, so all
157 upstream ports should provide their own reset_link functions.
159 Section 3.2.2.2 provides more detailed info on when to call
162 PCI error-recovery callbacks
163 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
165 The PCI Express AER Root driver uses error callbacks to coordinate
166 with downstream device drivers associated with a hierarchy in question
167 when performing error recovery actions.
169 Data struct pci_driver has a pointer, err_handler, to point to
170 pci_error_handlers who consists of a couple of callback function
171 pointers. AER driver follows the rules defined in
172 pci-error-recovery.txt except pci express specific parts (e.g.
173 reset_link). Pls. refer to pci-error-recovery.txt for detailed
174 definitions of the callbacks.
176 Below sections specify when to call the error callback functions.
181 Correctable errors pose no impacts on the functionality of
182 the interface. The PCI Express protocol can recover without any
183 software intervention or any loss of data. These errors do not
184 require any recovery actions. The AER driver clears the device's
185 correctable error status register accordingly and logs these errors.
187 Non-correctable (non-fatal and fatal) errors
188 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
190 If an error message indicates a non-fatal error, performing link reset
191 at upstream is not required. The AER driver calls error_detected(dev,
192 pci_channel_io_normal) to all drivers associated within a hierarchy in
193 question. for example::
195 EndPoint<==>DownstreamPort B<==>UpstreamPort A<==>RootPort
197 If Upstream port A captures an AER error, the hierarchy consists of
198 Downstream port B and EndPoint.
200 A driver may return PCI_ERS_RESULT_CAN_RECOVER,
201 PCI_ERS_RESULT_DISCONNECT, or PCI_ERS_RESULT_NEED_RESET, depending on
202 whether it can recover or the AER driver calls mmio_enabled as next.
204 If an error message indicates a fatal error, kernel will broadcast
205 error_detected(dev, pci_channel_io_frozen) to all drivers within
206 a hierarchy in question. Then, performing link reset at upstream is
207 necessary. As different kinds of devices might use different approaches
208 to reset link, AER port service driver is required to provide the
209 function to reset link via callback parameter of pcie_do_recovery()
210 function. If reset_link is not NULL, recovery function will use it
211 to reset the link. If error_detected returns PCI_ERS_RESULT_CAN_RECOVER
212 and reset_link returns PCI_ERS_RESULT_RECOVERED, the error handling goes
219 int pci_enable_pcie_error_reporting(struct pci_dev *dev);
221 pci_enable_pcie_error_reporting enables the device to send error
222 messages to root port when an error is detected. Note that devices
223 don't enable the error reporting by default, so device drivers need
224 call this function to enable it.
228 int pci_disable_pcie_error_reporting(struct pci_dev *dev);
230 pci_disable_pcie_error_reporting disables the device to send error
231 messages to root port when an error is detected.
235 int pci_aer_clear_nonfatal_status(struct pci_dev *dev);`
237 pci_aer_clear_nonfatal_status clears non-fatal errors in the uncorrectable
238 error status register.
240 Frequent Asked Questions
241 ------------------------
244 What happens if a PCI Express device driver does not provide an
245 error recovery handler (pci_driver->err_handler is equal to NULL)?
248 The devices attached with the driver won't be recovered. If the
249 error is fatal, kernel will print out warning messages. Please refer
250 to section 3 for more information.
253 What happens if an upstream port service driver does not provide
257 Fatal error recovery will fail if the errors are reported by the
258 upstream ports who are attached by the service driver.
261 How does this infrastructure deal with driver that is not PCI
265 This infrastructure calls the error callback functions of the
266 driver when an error happens. But if the driver is not aware of
267 PCI Express, the device might not report its own errors to root
271 What modifications will that driver need to make it compatible
272 with the PCI Express AER Root driver?
275 It could call the helper functions to enable AER in devices and
276 cleanup uncorrectable status register. Pls. refer to section 3.3.
279 Software error injection
280 ========================
282 Debugging PCIe AER error recovery code is quite difficult because it
283 is hard to trigger real hardware errors. Software based error
284 injection can be used to fake various kinds of PCIe errors.
286 First you should enable PCIe AER software error injection in kernel
287 configuration, that is, following item should be in your .config.
289 CONFIG_PCIEAER_INJECT=y or CONFIG_PCIEAER_INJECT=m
291 After reboot with new kernel or insert the module, a device file named
292 /dev/aer_inject should be created.
294 Then, you need a user space tool named aer-inject, which can be gotten
297 https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
299 More information about aer-inject can be found in the document comes
300 with its source code.