1 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */
2 /* Copyright(c) 2014 - 2020 Intel Corporation */
3 #ifndef _QAT_CRYPTO_INSTANCE_H_
4 #define _QAT_CRYPTO_INSTANCE_H_
6 #include <crypto/aes.h>
7 #include <linux/list.h>
8 #include <linux/slab.h>
9 #include "adf_accel_devices.h"
10 #include "icp_qat_fw_la.h"
12 struct qat_crypto_instance
{
13 struct adf_etr_ring_data
*sym_tx
;
14 struct adf_etr_ring_data
*sym_rx
;
15 struct adf_etr_ring_data
*pke_tx
;
16 struct adf_etr_ring_data
*pke_rx
;
17 struct adf_accel_dev
*accel_dev
;
18 struct list_head list
;
24 struct qat_crypto_request_buffs
{
25 struct qat_alg_buf_list
*bl
;
27 struct qat_alg_buf_list
*blout
;
33 struct qat_crypto_request
;
35 struct qat_crypto_request
{
36 struct icp_qat_fw_la_bulk_req req
;
38 struct qat_alg_aead_ctx
*aead_ctx
;
39 struct qat_alg_skcipher_ctx
*skcipher_ctx
;
42 struct aead_request
*aead_req
;
43 struct skcipher_request
*skcipher_req
;
45 struct qat_crypto_request_buffs buf
;
46 void (*cb
)(struct icp_qat_fw_la_resp
*resp
,
47 struct qat_crypto_request
*req
);
53 u8 iv
[AES_BLOCK_SIZE
];
58 static inline bool adf_hw_dev_has_crypto(struct adf_accel_dev
*accel_dev
)
60 struct adf_hw_device_data
*hw_device
= accel_dev
->hw_device
;
61 u32 mask
= ~hw_device
->accel_capabilities_mask
;
63 if (mask
& ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC
)
65 if (mask
& ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC
)
67 if (mask
& ADF_ACCEL_CAPABILITIES_AUTHENTICATION
)