Merge tag 'io_uring-5.11-2021-01-16' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / firmware / imx / scu-pd.c
blob08533ee6762612dedb6f0eebfa255a6ea1d0dfb2
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2016 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP
5 * Dong Aisheng <aisheng.dong@nxp.com>
7 * Implementation of the SCU based Power Domains
9 * NOTE: a better implementation suggested by Ulf Hansson is using a
10 * single global power domain and implement the ->attach|detach_dev()
11 * callback for the genpd and use the regular of_genpd_add_provider_simple().
12 * From within the ->attach_dev(), we could get the OF node for
13 * the device that is being attached and then parse the power-domain
14 * cell containing the "resource id" and store that in the per device
15 * struct generic_pm_domain_data (we have void pointer there for
16 * storing these kind of things).
18 * Additionally, we need to implement the ->stop() and ->start()
19 * callbacks of genpd, which is where you "power on/off" devices,
20 * rather than using the above ->power_on|off() callbacks.
22 * However, there're two known issues:
23 * 1. The ->attach_dev() of power domain infrastructure still does
24 * not support multi domains case as the struct device *dev passed
25 * in is a virtual PD device, it does not help for parsing the real
26 * device resource id from device tree, so it's unware of which
27 * real sub power domain of device should be attached.
29 * The framework needs some proper extension to support multi power
30 * domain cases.
32 * 2. It also breaks most of current drivers as the driver probe sequence
33 * behavior changed if removing ->power_on|off() callback and use
34 * ->start() and ->stop() instead. genpd_dev_pm_attach will only power
35 * up the domain and attach device, but will not call .start() which
36 * relies on device runtime pm. That means the device power is still
37 * not up before running driver probe function. For SCU enabled
38 * platforms, all device drivers accessing registers/clock without power
39 * domain enabled will trigger a HW access error. That means we need fix
40 * most drivers probe sequence with proper runtime pm.
42 * In summary, we need fix above two issue before being able to switch to
43 * the "single global power domain" way.
47 #include <dt-bindings/firmware/imx/rsrc.h>
48 #include <linux/firmware/imx/sci.h>
49 #include <linux/firmware/imx/svc/rm.h>
50 #include <linux/io.h>
51 #include <linux/module.h>
52 #include <linux/of.h>
53 #include <linux/of_address.h>
54 #include <linux/of_platform.h>
55 #include <linux/platform_device.h>
56 #include <linux/pm.h>
57 #include <linux/pm_domain.h>
58 #include <linux/slab.h>
60 /* SCU Power Mode Protocol definition */
61 struct imx_sc_msg_req_set_resource_power_mode {
62 struct imx_sc_rpc_msg hdr;
63 u16 resource;
64 u8 mode;
65 } __packed __aligned(4);
67 #define IMX_SCU_PD_NAME_SIZE 20
68 struct imx_sc_pm_domain {
69 struct generic_pm_domain pd;
70 char name[IMX_SCU_PD_NAME_SIZE];
71 u32 rsrc;
74 struct imx_sc_pd_range {
75 char *name;
76 u32 rsrc;
77 u8 num;
79 /* add domain index */
80 bool postfix;
81 u8 start_from;
84 struct imx_sc_pd_soc {
85 const struct imx_sc_pd_range *pd_ranges;
86 u8 num_ranges;
89 static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
90 /* LSIO SS */
91 { "pwm", IMX_SC_R_PWM_0, 8, true, 0 },
92 { "gpio", IMX_SC_R_GPIO_0, 8, true, 0 },
93 { "gpt", IMX_SC_R_GPT_0, 5, true, 0 },
94 { "kpp", IMX_SC_R_KPP, 1, false, 0 },
95 { "fspi", IMX_SC_R_FSPI_0, 2, true, 0 },
96 { "mu_a", IMX_SC_R_MU_0A, 14, true, 0 },
97 { "mu_b", IMX_SC_R_MU_5B, 9, true, 5 },
99 /* CONN SS */
100 { "usb", IMX_SC_R_USB_0, 2, true, 0 },
101 { "usb0phy", IMX_SC_R_USB_0_PHY, 1, false, 0 },
102 { "usb2", IMX_SC_R_USB_2, 1, false, 0 },
103 { "usb2phy", IMX_SC_R_USB_2_PHY, 1, false, 0 },
104 { "sdhc", IMX_SC_R_SDHC_0, 3, true, 0 },
105 { "enet", IMX_SC_R_ENET_0, 2, true, 0 },
106 { "nand", IMX_SC_R_NAND, 1, false, 0 },
107 { "mlb", IMX_SC_R_MLB_0, 1, true, 0 },
109 /* AUDIO SS */
110 { "audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, false, 0 },
111 { "audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, false, 0 },
112 { "audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, false, 0 },
113 { "audio-clk-1", IMX_SC_R_AUDIO_CLK_1, 1, false, 0 },
114 { "dma0-ch", IMX_SC_R_DMA_0_CH0, 16, true, 0 },
115 { "dma1-ch", IMX_SC_R_DMA_1_CH0, 16, true, 0 },
116 { "dma2-ch", IMX_SC_R_DMA_2_CH0, 5, true, 0 },
117 { "asrc0", IMX_SC_R_ASRC_0, 1, false, 0 },
118 { "asrc1", IMX_SC_R_ASRC_1, 1, false, 0 },
119 { "esai0", IMX_SC_R_ESAI_0, 1, false, 0 },
120 { "spdif0", IMX_SC_R_SPDIF_0, 1, false, 0 },
121 { "spdif1", IMX_SC_R_SPDIF_1, 1, false, 0 },
122 { "sai", IMX_SC_R_SAI_0, 3, true, 0 },
123 { "sai3", IMX_SC_R_SAI_3, 1, false, 0 },
124 { "sai4", IMX_SC_R_SAI_4, 1, false, 0 },
125 { "sai5", IMX_SC_R_SAI_5, 1, false, 0 },
126 { "sai6", IMX_SC_R_SAI_6, 1, false, 0 },
127 { "sai7", IMX_SC_R_SAI_7, 1, false, 0 },
128 { "amix", IMX_SC_R_AMIX, 1, false, 0 },
129 { "mqs0", IMX_SC_R_MQS_0, 1, false, 0 },
130 { "dsp", IMX_SC_R_DSP, 1, false, 0 },
131 { "dsp-ram", IMX_SC_R_DSP_RAM, 1, false, 0 },
133 /* DMA SS */
134 { "can", IMX_SC_R_CAN_0, 3, true, 0 },
135 { "ftm", IMX_SC_R_FTM_0, 2, true, 0 },
136 { "lpi2c", IMX_SC_R_I2C_0, 4, true, 0 },
137 { "adc", IMX_SC_R_ADC_0, 1, true, 0 },
138 { "lcd", IMX_SC_R_LCD_0, 1, true, 0 },
139 { "lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, true, 0 },
140 { "lpuart", IMX_SC_R_UART_0, 4, true, 0 },
141 { "lpspi", IMX_SC_R_SPI_0, 4, true, 0 },
142 { "irqstr_dsp", IMX_SC_R_IRQSTR_DSP, 1, false, 0 },
144 /* VPU SS */
145 { "vpu", IMX_SC_R_VPU, 1, false, 0 },
146 { "vpu-pid", IMX_SC_R_VPU_PID0, 8, true, 0 },
147 { "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, false, 0 },
148 { "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, false, 0 },
150 /* GPU SS */
151 { "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, true, 0 },
153 /* HSIO SS */
154 { "pcie-b", IMX_SC_R_PCIE_B, 1, false, 0 },
155 { "serdes-1", IMX_SC_R_SERDES_1, 1, false, 0 },
156 { "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, false, 0 },
158 /* MIPI SS */
159 { "mipi0", IMX_SC_R_MIPI_0, 1, false, 0 },
160 { "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, false, 0 },
161 { "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, true, 0 },
163 { "mipi1", IMX_SC_R_MIPI_1, 1, false, 0 },
164 { "mipi1-pwm0", IMX_SC_R_MIPI_1_PWM_0, 1, false, 0 },
165 { "mipi1-i2c", IMX_SC_R_MIPI_1_I2C_0, 2, true, 0 },
167 /* LVDS SS */
168 { "lvds0", IMX_SC_R_LVDS_0, 1, false, 0 },
169 { "lvds1", IMX_SC_R_LVDS_1, 1, false, 0 },
171 /* DC SS */
172 { "dc0", IMX_SC_R_DC_0, 1, false, 0 },
173 { "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, true, 0 },
174 { "dc0-video", IMX_SC_R_DC_0_VIDEO0, 2, true, 0 },
176 /* CM40 SS */
177 { "cm40-i2c", IMX_SC_R_M4_0_I2C, 1, false, 0 },
178 { "cm40-intmux", IMX_SC_R_M4_0_INTMUX, 1, false, 0 },
179 { "cm40-pid", IMX_SC_R_M4_0_PID0, 5, true, 0},
180 { "cm40-mu-a1", IMX_SC_R_M4_0_MU_1A, 1, false, 0},
181 { "cm40-lpuart", IMX_SC_R_M4_0_UART, 1, false, 0},
183 /* CM41 SS */
184 { "cm41-i2c", IMX_SC_R_M4_1_I2C, 1, false, 0 },
185 { "cm41-intmux", IMX_SC_R_M4_1_INTMUX, 1, false, 0 },
186 { "cm41-pid", IMX_SC_R_M4_1_PID0, 5, true, 0},
187 { "cm41-mu-a1", IMX_SC_R_M4_1_MU_1A, 1, false, 0},
188 { "cm41-lpuart", IMX_SC_R_M4_1_UART, 1, false, 0},
190 /* IMAGE SS */
191 { "img-jpegdec-mp", IMX_SC_R_MJPEG_DEC_MP, 1, false, 0 },
192 { "img-jpegdec-s0", IMX_SC_R_MJPEG_DEC_S0, 4, true, 0 },
193 { "img-jpegenc-mp", IMX_SC_R_MJPEG_ENC_MP, 1, false, 0 },
194 { "img-jpegenc-s0", IMX_SC_R_MJPEG_ENC_S0, 4, true, 0 },
197 static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
198 .pd_ranges = imx8qxp_scu_pd_ranges,
199 .num_ranges = ARRAY_SIZE(imx8qxp_scu_pd_ranges),
202 static struct imx_sc_ipc *pm_ipc_handle;
204 static inline struct imx_sc_pm_domain *
205 to_imx_sc_pd(struct generic_pm_domain *genpd)
207 return container_of(genpd, struct imx_sc_pm_domain, pd);
210 static int imx_sc_pd_power(struct generic_pm_domain *domain, bool power_on)
212 struct imx_sc_msg_req_set_resource_power_mode msg;
213 struct imx_sc_rpc_msg *hdr = &msg.hdr;
214 struct imx_sc_pm_domain *pd;
215 int ret;
217 pd = to_imx_sc_pd(domain);
219 hdr->ver = IMX_SC_RPC_VERSION;
220 hdr->svc = IMX_SC_RPC_SVC_PM;
221 hdr->func = IMX_SC_PM_FUNC_SET_RESOURCE_POWER_MODE;
222 hdr->size = 2;
224 msg.resource = pd->rsrc;
225 msg.mode = power_on ? IMX_SC_PM_PW_MODE_ON : IMX_SC_PM_PW_MODE_LP;
227 ret = imx_scu_call_rpc(pm_ipc_handle, &msg, true);
228 if (ret)
229 dev_err(&domain->dev, "failed to power %s resource %d ret %d\n",
230 power_on ? "up" : "off", pd->rsrc, ret);
232 return ret;
235 static int imx_sc_pd_power_on(struct generic_pm_domain *domain)
237 return imx_sc_pd_power(domain, true);
240 static int imx_sc_pd_power_off(struct generic_pm_domain *domain)
242 return imx_sc_pd_power(domain, false);
245 static struct generic_pm_domain *imx_scu_pd_xlate(struct of_phandle_args *spec,
246 void *data)
248 struct generic_pm_domain *domain = ERR_PTR(-ENOENT);
249 struct genpd_onecell_data *pd_data = data;
250 unsigned int i;
252 for (i = 0; i < pd_data->num_domains; i++) {
253 struct imx_sc_pm_domain *sc_pd;
255 sc_pd = to_imx_sc_pd(pd_data->domains[i]);
256 if (sc_pd->rsrc == spec->args[0]) {
257 domain = &sc_pd->pd;
258 break;
262 return domain;
265 static struct imx_sc_pm_domain *
266 imx_scu_add_pm_domain(struct device *dev, int idx,
267 const struct imx_sc_pd_range *pd_ranges)
269 struct imx_sc_pm_domain *sc_pd;
270 int ret;
272 if (!imx_sc_rm_is_resource_owned(pm_ipc_handle, pd_ranges->rsrc + idx))
273 return NULL;
275 sc_pd = devm_kzalloc(dev, sizeof(*sc_pd), GFP_KERNEL);
276 if (!sc_pd)
277 return ERR_PTR(-ENOMEM);
279 sc_pd->rsrc = pd_ranges->rsrc + idx;
280 sc_pd->pd.power_off = imx_sc_pd_power_off;
281 sc_pd->pd.power_on = imx_sc_pd_power_on;
283 if (pd_ranges->postfix)
284 snprintf(sc_pd->name, sizeof(sc_pd->name),
285 "%s%i", pd_ranges->name, pd_ranges->start_from + idx);
286 else
287 snprintf(sc_pd->name, sizeof(sc_pd->name),
288 "%s", pd_ranges->name);
290 sc_pd->pd.name = sc_pd->name;
292 if (sc_pd->rsrc >= IMX_SC_R_LAST) {
293 dev_warn(dev, "invalid pd %s rsrc id %d found",
294 sc_pd->name, sc_pd->rsrc);
296 devm_kfree(dev, sc_pd);
297 return NULL;
300 ret = pm_genpd_init(&sc_pd->pd, NULL, true);
301 if (ret) {
302 dev_warn(dev, "failed to init pd %s rsrc id %d",
303 sc_pd->name, sc_pd->rsrc);
304 devm_kfree(dev, sc_pd);
305 return NULL;
308 return sc_pd;
311 static int imx_scu_init_pm_domains(struct device *dev,
312 const struct imx_sc_pd_soc *pd_soc)
314 const struct imx_sc_pd_range *pd_ranges = pd_soc->pd_ranges;
315 struct generic_pm_domain **domains;
316 struct genpd_onecell_data *pd_data;
317 struct imx_sc_pm_domain *sc_pd;
318 u32 count = 0;
319 int i, j;
321 for (i = 0; i < pd_soc->num_ranges; i++)
322 count += pd_ranges[i].num;
324 domains = devm_kcalloc(dev, count, sizeof(*domains), GFP_KERNEL);
325 if (!domains)
326 return -ENOMEM;
328 pd_data = devm_kzalloc(dev, sizeof(*pd_data), GFP_KERNEL);
329 if (!pd_data)
330 return -ENOMEM;
332 count = 0;
333 for (i = 0; i < pd_soc->num_ranges; i++) {
334 for (j = 0; j < pd_ranges[i].num; j++) {
335 sc_pd = imx_scu_add_pm_domain(dev, j, &pd_ranges[i]);
336 if (IS_ERR_OR_NULL(sc_pd))
337 continue;
339 domains[count++] = &sc_pd->pd;
340 dev_dbg(dev, "added power domain %s\n", sc_pd->pd.name);
344 pd_data->domains = domains;
345 pd_data->num_domains = count;
346 pd_data->xlate = imx_scu_pd_xlate;
348 of_genpd_add_provider_onecell(dev->of_node, pd_data);
350 return 0;
353 static int imx_sc_pd_probe(struct platform_device *pdev)
355 const struct imx_sc_pd_soc *pd_soc;
356 int ret;
358 ret = imx_scu_get_handle(&pm_ipc_handle);
359 if (ret)
360 return ret;
362 pd_soc = of_device_get_match_data(&pdev->dev);
363 if (!pd_soc)
364 return -ENODEV;
366 return imx_scu_init_pm_domains(&pdev->dev, pd_soc);
369 static const struct of_device_id imx_sc_pd_match[] = {
370 { .compatible = "fsl,imx8qxp-scu-pd", &imx8qxp_scu_pd},
371 { .compatible = "fsl,scu-pd", &imx8qxp_scu_pd},
372 { /* sentinel */ }
375 static struct platform_driver imx_sc_pd_driver = {
376 .driver = {
377 .name = "imx-scu-pd",
378 .of_match_table = imx_sc_pd_match,
380 .probe = imx_sc_pd_probe,
382 builtin_platform_driver(imx_sc_pd_driver);
384 MODULE_AUTHOR("Dong Aisheng <aisheng.dong@nxp.com>");
385 MODULE_DESCRIPTION("IMX SCU Power Domain driver");
386 MODULE_LICENSE("GPL v2");