drivers/gpu/drm/amd/display/dmub/src/dmub_reg.h

   1 /*
   2  * Copyright 2019 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef _DMUB_REG_H_
  27 #define _DMUB_REG_H_
  28
  29 #include "../inc/dmub_cmd.h"
  30
  31 struct dmub_srv;
  32
  33 /* Register offset and field lookup. */
  34
  35 #define BASE(seg) BASE_INNER(seg)
  36
  37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name)
  38
  39 #define FD_SHIFT(reg_name, field) reg_name##__##field##__SHIFT
  40
  41 #define FD_MASK(reg_name, field) reg_name##__##field##_MASK
  42
  43 #define REG(reg) (REGS)->offset.reg
  44
  45 #define FD(reg_field) (REGS)->shift.reg_field, (REGS)->mask.reg_field
  46
  47 #define FN(reg_name, field) FD(reg_name##__##field)
  48
  49 /* Register reads and writes. */
  50
  51 #define REG_READ(reg) ((CTX)->funcs.reg_read((CTX)->user_ctx, REG(reg)))
  52
  53 #define REG_WRITE(reg, val) \
  54         ((CTX)->funcs.reg_write((CTX)->user_ctx, REG(reg), (val)))
  55
  56 /* Register field setting. */
  57
  58 #define REG_SET_N(reg_name, n, initial_val, ...) \
  59         dmub_reg_set(CTX, REG(reg_name), initial_val, n, __VA_ARGS__)
  60
  61 #define REG_SET(reg_name, initial_val, field, val) \
  62                 REG_SET_N(reg_name, 1, initial_val, \
  63                                 FN(reg_name, field), val)
  64
  65 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \
  66                 REG_SET_N(reg, 2, init_value, \
  67                                 FN(reg, f1), v1, \
  68                                 FN(reg, f2), v2)
  69
  70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \
  71                 REG_SET_N(reg, 3, init_value, \
  72                                 FN(reg, f1), v1, \
  73                                 FN(reg, f2), v2, \
  74                                 FN(reg, f3), v3)
  75
  76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \
  77                 REG_SET_N(reg, 4, init_value, \
  78                                 FN(reg, f1), v1, \
  79                                 FN(reg, f2), v2, \
  80                                 FN(reg, f3), v3, \
  81                                 FN(reg, f4), v4)
  82
  83 /* Register field updating. */
  84
  85 #define REG_UPDATE_N(reg_name, n, ...)\
  86                 dmub_reg_update(CTX, REG(reg_name), n, __VA_ARGS__)
  87
  88 #define REG_UPDATE(reg_name, field, val)        \
  89                 REG_UPDATE_N(reg_name, 1, \
  90                                 FN(reg_name, field), val)
  91
  92 #define REG_UPDATE_2(reg, f1, v1, f2, v2)       \
  93                 REG_UPDATE_N(reg, 2,\
  94                                 FN(reg, f1), v1,\
  95                                 FN(reg, f2), v2)
  96
  97 #define REG_UPDATE_3(reg, f1, v1, f2, v2, f3, v3) \
  98                 REG_UPDATE_N(reg, 3, \
  99                                 FN(reg, f1), v1, \
 100                                 FN(reg, f2), v2, \
 101                                 FN(reg, f3), v3)
 102
 103 #define REG_UPDATE_4(reg, f1, v1, f2, v2, f3, v3, f4, v4) \
 104                 REG_UPDATE_N(reg, 4, \
 105                                 FN(reg, f1), v1, \
 106                                 FN(reg, f2), v2, \
 107                                 FN(reg, f3), v3, \
 108                                 FN(reg, f4), v4)
 109
 110 /* Register field getting. */
 111
 112 #define REG_GET(reg_name, field, val) \
 113         dmub_reg_get(CTX, REG(reg_name), FN(reg_name, field), val)
 114
 115 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
 116                   uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...);
 117
 118 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
 119                      uint32_t mask1, uint32_t field_value1, ...);
 120
 121 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
 122                   uint32_t mask, uint32_t *field_value);
 123
 124 #endif /* _DMUB_REG_H_ */