drivers/gpu/drm/msm/dsi/dsi_cfg.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2015, The Linux Foundation. All rights reserved.
   4  */
   5
   6 #include "dsi_cfg.h"
   7
   8 static const char * const dsi_v2_bus_clk_names[] = {
   9         "core_mmss", "iface", "bus",
  10 };
  11
  12 static const struct msm_dsi_config apq8064_dsi_cfg = {
  13         .io_offset = 0,
  14         .reg_cfg = {
  15                 .num = 3,
  16                 .regs = {
  17                         {"vdda", 100000, 100},  /* 1.2 V */
  18                         {"avdd", 10000, 100},   /* 3.0 V */
  19                         {"vddio", 100000, 100}, /* 1.8 V */
  20                 },
  21         },
  22         .bus_clk_names = dsi_v2_bus_clk_names,
  23         .num_bus_clks = ARRAY_SIZE(dsi_v2_bus_clk_names),
  24         .io_start = { 0x4700000, 0x5800000 },
  25         .num_dsi = 2,
  26 };
  27
  28 static const char * const dsi_6g_bus_clk_names[] = {
  29         "mdp_core", "iface", "bus", "core_mmss",
  30 };
  31
  32 static const struct msm_dsi_config msm8974_apq8084_dsi_cfg = {
  33         .io_offset = DSI_6G_REG_SHIFT,
  34         .reg_cfg = {
  35                 .num = 4,
  36                 .regs = {
  37                         {"gdsc", -1, -1},
  38                         {"vdd", 150000, 100},   /* 3.0 V */
  39                         {"vdda", 100000, 100},  /* 1.2 V */
  40                         {"vddio", 100000, 100}, /* 1.8 V */
  41                 },
  42         },
  43         .bus_clk_names = dsi_6g_bus_clk_names,
  44         .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
  45         .io_start = { 0xfd922800, 0xfd922b00 },
  46         .num_dsi = 2,
  47 };
  48
  49 static const char * const dsi_8916_bus_clk_names[] = {
  50         "mdp_core", "iface", "bus",
  51 };
  52
  53 static const struct msm_dsi_config msm8916_dsi_cfg = {
  54         .io_offset = DSI_6G_REG_SHIFT,
  55         .reg_cfg = {
  56                 .num = 3,
  57                 .regs = {
  58                         {"gdsc", -1, -1},
  59                         {"vdda", 100000, 100},  /* 1.2 V */
  60                         {"vddio", 100000, 100}, /* 1.8 V */
  61                 },
  62         },
  63         .bus_clk_names = dsi_8916_bus_clk_names,
  64         .num_bus_clks = ARRAY_SIZE(dsi_8916_bus_clk_names),
  65         .io_start = { 0x1a98000 },
  66         .num_dsi = 1,
  67 };
  68
  69 static const char * const dsi_8976_bus_clk_names[] = {
  70         "mdp_core", "iface", "bus",
  71 };
  72
  73 static const struct msm_dsi_config msm8976_dsi_cfg = {
  74         .io_offset = DSI_6G_REG_SHIFT,
  75         .reg_cfg = {
  76                 .num = 3,
  77                 .regs = {
  78                         {"gdsc", -1, -1},
  79                         {"vdda", 100000, 100},  /* 1.2 V */
  80                         {"vddio", 100000, 100}, /* 1.8 V */
  81                 },
  82         },
  83         .bus_clk_names = dsi_8976_bus_clk_names,
  84         .num_bus_clks = ARRAY_SIZE(dsi_8976_bus_clk_names),
  85         .io_start = { 0x1a94000, 0x1a96000 },
  86         .num_dsi = 2,
  87 };
  88
  89 static const struct msm_dsi_config msm8994_dsi_cfg = {
  90         .io_offset = DSI_6G_REG_SHIFT,
  91         .reg_cfg = {
  92                 .num = 7,
  93                 .regs = {
  94                         {"gdsc", -1, -1},
  95                         {"vdda", 100000, 100},  /* 1.25 V */
  96                         {"vddio", 100000, 100}, /* 1.8 V */
  97                         {"vcca", 10000, 100},   /* 1.0 V */
  98                         {"vdd", 100000, 100},   /* 1.8 V */
  99                         {"lab_reg", -1, -1},
 100                         {"ibb_reg", -1, -1},
 101                 },
 102         },
 103         .bus_clk_names = dsi_6g_bus_clk_names,
 104         .num_bus_clks = ARRAY_SIZE(dsi_6g_bus_clk_names),
 105         .io_start = { 0xfd998000, 0xfd9a0000 },
 106         .num_dsi = 2,
 107 };
 108
 109 /*
 110  * TODO: core_mmss_clk fails to enable for some reason, but things work fine
 111  * without it too. Figure out why it doesn't enable and uncomment below
 112  */
 113 static const char * const dsi_8996_bus_clk_names[] = {
 114         "mdp_core", "iface", "bus", /* "core_mmss", */
 115 };
 116
 117 static const struct msm_dsi_config msm8996_dsi_cfg = {
 118         .io_offset = DSI_6G_REG_SHIFT,
 119         .reg_cfg = {
 120                 .num = 2,
 121                 .regs = {
 122                         {"vdda", 18160, 1 },    /* 1.25 V */
 123                         {"vcca", 17000, 32 },   /* 0.925 V */
 124                         {"vddio", 100000, 100 },/* 1.8 V */
 125                 },
 126         },
 127         .bus_clk_names = dsi_8996_bus_clk_names,
 128         .num_bus_clks = ARRAY_SIZE(dsi_8996_bus_clk_names),
 129         .io_start = { 0x994000, 0x996000 },
 130         .num_dsi = 2,
 131 };
 132
 133 static const char * const dsi_msm8998_bus_clk_names[] = {
 134         "iface", "bus", "core",
 135 };
 136
 137 static const struct msm_dsi_config msm8998_dsi_cfg = {
 138         .io_offset = DSI_6G_REG_SHIFT,
 139         .reg_cfg = {
 140                 .num = 2,
 141                 .regs = {
 142                         {"vdd", 367000, 16 },   /* 0.9 V */
 143                         {"vdda", 62800, 2 },    /* 1.2 V */
 144                 },
 145         },
 146         .bus_clk_names = dsi_msm8998_bus_clk_names,
 147         .num_bus_clks = ARRAY_SIZE(dsi_msm8998_bus_clk_names),
 148         .io_start = { 0xc994000, 0xc996000 },
 149         .num_dsi = 2,
 150 };
 151
 152 static const char * const dsi_sdm660_bus_clk_names[] = {
 153         "iface", "bus", "core", "core_mmss",
 154 };
 155
 156 static const struct msm_dsi_config sdm660_dsi_cfg = {
 157         .io_offset = DSI_6G_REG_SHIFT,
 158         .reg_cfg = {
 159                 .num = 2,
 160                 .regs = {
 161                         {"vdd", 73400, 32 },    /* 0.9 V */
 162                         {"vdda", 12560, 4 },    /* 1.2 V */
 163                 },
 164         },
 165         .bus_clk_names = dsi_sdm660_bus_clk_names,
 166         .num_bus_clks = ARRAY_SIZE(dsi_sdm660_bus_clk_names),
 167         .io_start = { 0xc994000, 0xc996000 },
 168         .num_dsi = 2,
 169 };
 170
 171 static const char * const dsi_sdm845_bus_clk_names[] = {
 172         "iface", "bus",
 173 };
 174
 175 static const char * const dsi_sc7180_bus_clk_names[] = {
 176         "iface", "bus",
 177 };
 178
 179 static const struct msm_dsi_config sdm845_dsi_cfg = {
 180         .io_offset = DSI_6G_REG_SHIFT,
 181         .reg_cfg = {
 182                 .num = 1,
 183                 .regs = {
 184                         {"vdda", 21800, 4 },    /* 1.2 V */
 185                 },
 186         },
 187         .bus_clk_names = dsi_sdm845_bus_clk_names,
 188         .num_bus_clks = ARRAY_SIZE(dsi_sdm845_bus_clk_names),
 189         .io_start = { 0xae94000, 0xae96000 },
 190         .num_dsi = 2,
 191 };
 192
 193 static const struct msm_dsi_config sc7180_dsi_cfg = {
 194         .io_offset = DSI_6G_REG_SHIFT,
 195         .reg_cfg = {
 196                 .num = 1,
 197                 .regs = {
 198                         {"vdda", 21800, 4 },    /* 1.2 V */
 199                 },
 200         },
 201         .bus_clk_names = dsi_sc7180_bus_clk_names,
 202         .num_bus_clks = ARRAY_SIZE(dsi_sc7180_bus_clk_names),
 203         .io_start = { 0xae94000 },
 204         .num_dsi = 1,
 205 };
 206
 207 static const struct msm_dsi_host_cfg_ops msm_dsi_v2_host_ops = {
 208         .link_clk_set_rate = dsi_link_clk_set_rate_v2,
 209         .link_clk_enable = dsi_link_clk_enable_v2,
 210         .link_clk_disable = dsi_link_clk_disable_v2,
 211         .clk_init_ver = dsi_clk_init_v2,
 212         .tx_buf_alloc = dsi_tx_buf_alloc_v2,
 213         .tx_buf_get = dsi_tx_buf_get_v2,
 214         .tx_buf_put = NULL,
 215         .dma_base_get = dsi_dma_base_get_v2,
 216         .calc_clk_rate = dsi_calc_clk_rate_v2,
 217 };
 218
 219 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_host_ops = {
 220         .link_clk_set_rate = dsi_link_clk_set_rate_6g,
 221         .link_clk_enable = dsi_link_clk_enable_6g,
 222         .link_clk_disable = dsi_link_clk_disable_6g,
 223         .clk_init_ver = NULL,
 224         .tx_buf_alloc = dsi_tx_buf_alloc_6g,
 225         .tx_buf_get = dsi_tx_buf_get_6g,
 226         .tx_buf_put = dsi_tx_buf_put_6g,
 227         .dma_base_get = dsi_dma_base_get_6g,
 228         .calc_clk_rate = dsi_calc_clk_rate_6g,
 229 };
 230
 231 static const struct msm_dsi_host_cfg_ops msm_dsi_6g_v2_host_ops = {
 232         .link_clk_set_rate = dsi_link_clk_set_rate_6g,
 233         .link_clk_enable = dsi_link_clk_enable_6g,
 234         .link_clk_disable = dsi_link_clk_disable_6g,
 235         .clk_init_ver = dsi_clk_init_6g_v2,
 236         .tx_buf_alloc = dsi_tx_buf_alloc_6g,
 237         .tx_buf_get = dsi_tx_buf_get_6g,
 238         .tx_buf_put = dsi_tx_buf_put_6g,
 239         .dma_base_get = dsi_dma_base_get_6g,
 240         .calc_clk_rate = dsi_calc_clk_rate_6g,
 241 };
 242
 243 static const struct msm_dsi_cfg_handler dsi_cfg_handlers[] = {
 244         {MSM_DSI_VER_MAJOR_V2, MSM_DSI_V2_VER_MINOR_8064,
 245                 &apq8064_dsi_cfg, &msm_dsi_v2_host_ops},
 246         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_0,
 247                 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 248         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1,
 249                 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 250         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_1_1,
 251                 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 252         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_2,
 253                 &msm8974_apq8084_dsi_cfg, &msm_dsi_6g_host_ops},
 254         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3,
 255                 &msm8994_dsi_cfg, &msm_dsi_6g_host_ops},
 256         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_3_1,
 257                 &msm8916_dsi_cfg, &msm_dsi_6g_host_ops},
 258         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_1,
 259                 &msm8996_dsi_cfg, &msm_dsi_6g_host_ops},
 260         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V1_4_2,
 261                 &msm8976_dsi_cfg, &msm_dsi_6g_host_ops},
 262         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_1_0,
 263                 &sdm660_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 264         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_0,
 265                 &msm8998_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 266         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_2_1,
 267                 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 268         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_3_0,
 269                 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 270         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_0,
 271                 &sdm845_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 272         {MSM_DSI_VER_MAJOR_6G, MSM_DSI_6G_VER_MINOR_V2_4_1,
 273                 &sc7180_dsi_cfg, &msm_dsi_6g_v2_host_ops},
 274 };
 275
 276 const struct msm_dsi_cfg_handler *msm_dsi_cfg_get(u32 major, u32 minor)
 277 {
 278         const struct msm_dsi_cfg_handler *cfg_hnd = NULL;
 279         int i;
 280
 281         for (i = ARRAY_SIZE(dsi_cfg_handlers) - 1; i >= 0; i--) {
 282                 if ((dsi_cfg_handlers[i].major == major) &&
 283                         (dsi_cfg_handlers[i].minor == minor)) {
 284                         cfg_hnd = &dsi_cfg_handlers[i];
 285                         break;
 286                 }
 287         }
 288
 289         return cfg_hnd;
 290 }
 291