Merge tag 'io_uring-5.11-2021-01-16' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / gpu / drm / msm / msm_drv.c
blob108c405e03dd92e0535cd88c05b019c4be77fc39
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
4 * Copyright (C) 2013 Red Hat
5 * Author: Rob Clark <robdclark@gmail.com>
6 */
8 #include <linux/dma-mapping.h>
9 #include <linux/kthread.h>
10 #include <linux/sched/mm.h>
11 #include <linux/uaccess.h>
12 #include <uapi/linux/sched/types.h>
14 #include <drm/drm_drv.h>
15 #include <drm/drm_file.h>
16 #include <drm/drm_ioctl.h>
17 #include <drm/drm_irq.h>
18 #include <drm/drm_prime.h>
19 #include <drm/drm_of.h>
20 #include <drm/drm_vblank.h>
22 #include "msm_drv.h"
23 #include "msm_debugfs.h"
24 #include "msm_fence.h"
25 #include "msm_gem.h"
26 #include "msm_gpu.h"
27 #include "msm_kms.h"
28 #include "adreno/adreno_gpu.h"
31 * MSM driver version:
32 * - 1.0.0 - initial interface
33 * - 1.1.0 - adds madvise, and support for submits with > 4 cmd buffers
34 * - 1.2.0 - adds explicit fence support for submit ioctl
35 * - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
36 * SUBMITQUEUE_CLOSE ioctls, and MSM_INFO_IOVA flag for
37 * MSM_GEM_INFO ioctl.
38 * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
39 * GEM object's debug name
40 * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl
41 * - 1.6.0 - Syncobj support
43 #define MSM_VERSION_MAJOR 1
44 #define MSM_VERSION_MINOR 6
45 #define MSM_VERSION_PATCHLEVEL 0
47 static const struct drm_mode_config_funcs mode_config_funcs = {
48 .fb_create = msm_framebuffer_create,
49 .output_poll_changed = drm_fb_helper_output_poll_changed,
50 .atomic_check = drm_atomic_helper_check,
51 .atomic_commit = drm_atomic_helper_commit,
54 static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = {
55 .atomic_commit_tail = msm_atomic_commit_tail,
58 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
59 static bool reglog = false;
60 MODULE_PARM_DESC(reglog, "Enable register read/write logging");
61 module_param(reglog, bool, 0600);
62 #else
63 #define reglog 0
64 #endif
66 #ifdef CONFIG_DRM_FBDEV_EMULATION
67 static bool fbdev = true;
68 MODULE_PARM_DESC(fbdev, "Enable fbdev compat layer");
69 module_param(fbdev, bool, 0600);
70 #endif
72 static char *vram = "16m";
73 MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
74 module_param(vram, charp, 0);
76 bool dumpstate = false;
77 MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors");
78 module_param(dumpstate, bool, 0600);
80 static bool modeset = true;
81 MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (1=on (default), 0=disable)");
82 module_param(modeset, bool, 0600);
85 * Util/helpers:
88 struct clk *msm_clk_bulk_get_clock(struct clk_bulk_data *bulk, int count,
89 const char *name)
91 int i;
92 char n[32];
94 snprintf(n, sizeof(n), "%s_clk", name);
96 for (i = 0; bulk && i < count; i++) {
97 if (!strcmp(bulk[i].id, name) || !strcmp(bulk[i].id, n))
98 return bulk[i].clk;
102 return NULL;
105 struct clk *msm_clk_get(struct platform_device *pdev, const char *name)
107 struct clk *clk;
108 char name2[32];
110 clk = devm_clk_get(&pdev->dev, name);
111 if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
112 return clk;
114 snprintf(name2, sizeof(name2), "%s_clk", name);
116 clk = devm_clk_get(&pdev->dev, name2);
117 if (!IS_ERR(clk))
118 dev_warn(&pdev->dev, "Using legacy clk name binding. Use "
119 "\"%s\" instead of \"%s\"\n", name, name2);
121 return clk;
124 static void __iomem *_msm_ioremap(struct platform_device *pdev, const char *name,
125 const char *dbgname, bool quiet)
127 struct resource *res;
128 unsigned long size;
129 void __iomem *ptr;
131 if (name)
132 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
133 else
134 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
136 if (!res) {
137 if (!quiet)
138 DRM_DEV_ERROR(&pdev->dev, "failed to get memory resource: %s\n", name);
139 return ERR_PTR(-EINVAL);
142 size = resource_size(res);
144 ptr = devm_ioremap(&pdev->dev, res->start, size);
145 if (!ptr) {
146 if (!quiet)
147 DRM_DEV_ERROR(&pdev->dev, "failed to ioremap: %s\n", name);
148 return ERR_PTR(-ENOMEM);
151 if (reglog)
152 printk(KERN_DEBUG "IO:region %s %p %08lx\n", dbgname, ptr, size);
154 return ptr;
157 void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
158 const char *dbgname)
160 return _msm_ioremap(pdev, name, dbgname, false);
163 void __iomem *msm_ioremap_quiet(struct platform_device *pdev, const char *name,
164 const char *dbgname)
166 return _msm_ioremap(pdev, name, dbgname, true);
169 void msm_writel(u32 data, void __iomem *addr)
171 if (reglog)
172 printk(KERN_DEBUG "IO:W %p %08x\n", addr, data);
173 writel(data, addr);
176 u32 msm_readl(const void __iomem *addr)
178 u32 val = readl(addr);
179 if (reglog)
180 pr_err("IO:R %p %08x\n", addr, val);
181 return val;
184 void msm_rmw(void __iomem *addr, u32 mask, u32 or)
186 u32 val = msm_readl(addr);
188 val &= ~mask;
189 msm_writel(val | or, addr);
192 struct msm_vblank_work {
193 struct work_struct work;
194 int crtc_id;
195 bool enable;
196 struct msm_drm_private *priv;
199 static void vblank_ctrl_worker(struct work_struct *work)
201 struct msm_vblank_work *vbl_work = container_of(work,
202 struct msm_vblank_work, work);
203 struct msm_drm_private *priv = vbl_work->priv;
204 struct msm_kms *kms = priv->kms;
206 if (vbl_work->enable)
207 kms->funcs->enable_vblank(kms, priv->crtcs[vbl_work->crtc_id]);
208 else
209 kms->funcs->disable_vblank(kms, priv->crtcs[vbl_work->crtc_id]);
211 kfree(vbl_work);
214 static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
215 int crtc_id, bool enable)
217 struct msm_vblank_work *vbl_work;
219 vbl_work = kzalloc(sizeof(*vbl_work), GFP_ATOMIC);
220 if (!vbl_work)
221 return -ENOMEM;
223 INIT_WORK(&vbl_work->work, vblank_ctrl_worker);
225 vbl_work->crtc_id = crtc_id;
226 vbl_work->enable = enable;
227 vbl_work->priv = priv;
229 queue_work(priv->wq, &vbl_work->work);
231 return 0;
234 static int msm_drm_uninit(struct device *dev)
236 struct platform_device *pdev = to_platform_device(dev);
237 struct drm_device *ddev = platform_get_drvdata(pdev);
238 struct msm_drm_private *priv = ddev->dev_private;
239 struct msm_kms *kms = priv->kms;
240 struct msm_mdss *mdss = priv->mdss;
241 int i;
244 * Shutdown the hw if we're far enough along where things might be on.
245 * If we run this too early, we'll end up panicking in any variety of
246 * places. Since we don't register the drm device until late in
247 * msm_drm_init, drm_dev->registered is used as an indicator that the
248 * shutdown will be successful.
250 if (ddev->registered) {
251 drm_dev_unregister(ddev);
252 drm_atomic_helper_shutdown(ddev);
255 /* We must cancel and cleanup any pending vblank enable/disable
256 * work before drm_irq_uninstall() to avoid work re-enabling an
257 * irq after uninstall has disabled it.
260 flush_workqueue(priv->wq);
262 /* clean up event worker threads */
263 for (i = 0; i < priv->num_crtcs; i++) {
264 if (priv->event_thread[i].worker)
265 kthread_destroy_worker(priv->event_thread[i].worker);
268 msm_gem_shrinker_cleanup(ddev);
270 drm_kms_helper_poll_fini(ddev);
272 msm_perf_debugfs_cleanup(priv);
273 msm_rd_debugfs_cleanup(priv);
275 #ifdef CONFIG_DRM_FBDEV_EMULATION
276 if (fbdev && priv->fbdev)
277 msm_fbdev_free(ddev);
278 #endif
280 drm_mode_config_cleanup(ddev);
282 pm_runtime_get_sync(dev);
283 drm_irq_uninstall(ddev);
284 pm_runtime_put_sync(dev);
286 if (kms && kms->funcs)
287 kms->funcs->destroy(kms);
289 if (priv->vram.paddr) {
290 unsigned long attrs = DMA_ATTR_NO_KERNEL_MAPPING;
291 drm_mm_takedown(&priv->vram.mm);
292 dma_free_attrs(dev, priv->vram.size, NULL,
293 priv->vram.paddr, attrs);
296 component_unbind_all(dev, ddev);
298 if (mdss && mdss->funcs)
299 mdss->funcs->destroy(ddev);
301 ddev->dev_private = NULL;
302 drm_dev_put(ddev);
304 destroy_workqueue(priv->wq);
305 kfree(priv);
307 return 0;
310 #define KMS_MDP4 4
311 #define KMS_MDP5 5
312 #define KMS_DPU 3
314 static int get_mdp_ver(struct platform_device *pdev)
316 struct device *dev = &pdev->dev;
318 return (int) (unsigned long) of_device_get_match_data(dev);
321 #include <linux/of_address.h>
323 bool msm_use_mmu(struct drm_device *dev)
325 struct msm_drm_private *priv = dev->dev_private;
327 /* a2xx comes with its own MMU */
328 return priv->is_a2xx || iommu_present(&platform_bus_type);
331 static int msm_init_vram(struct drm_device *dev)
333 struct msm_drm_private *priv = dev->dev_private;
334 struct device_node *node;
335 unsigned long size = 0;
336 int ret = 0;
338 /* In the device-tree world, we could have a 'memory-region'
339 * phandle, which gives us a link to our "vram". Allocating
340 * is all nicely abstracted behind the dma api, but we need
341 * to know the entire size to allocate it all in one go. There
342 * are two cases:
343 * 1) device with no IOMMU, in which case we need exclusive
344 * access to a VRAM carveout big enough for all gpu
345 * buffers
346 * 2) device with IOMMU, but where the bootloader puts up
347 * a splash screen. In this case, the VRAM carveout
348 * need only be large enough for fbdev fb. But we need
349 * exclusive access to the buffer to avoid the kernel
350 * using those pages for other purposes (which appears
351 * as corruption on screen before we have a chance to
352 * load and do initial modeset)
355 node = of_parse_phandle(dev->dev->of_node, "memory-region", 0);
356 if (node) {
357 struct resource r;
358 ret = of_address_to_resource(node, 0, &r);
359 of_node_put(node);
360 if (ret)
361 return ret;
362 size = r.end - r.start;
363 DRM_INFO("using VRAM carveout: %lx@%pa\n", size, &r.start);
365 /* if we have no IOMMU, then we need to use carveout allocator.
366 * Grab the entire CMA chunk carved out in early startup in
367 * mach-msm:
369 } else if (!msm_use_mmu(dev)) {
370 DRM_INFO("using %s VRAM carveout\n", vram);
371 size = memparse(vram, NULL);
374 if (size) {
375 unsigned long attrs = 0;
376 void *p;
378 priv->vram.size = size;
380 drm_mm_init(&priv->vram.mm, 0, (size >> PAGE_SHIFT) - 1);
381 spin_lock_init(&priv->vram.lock);
383 attrs |= DMA_ATTR_NO_KERNEL_MAPPING;
384 attrs |= DMA_ATTR_WRITE_COMBINE;
386 /* note that for no-kernel-mapping, the vaddr returned
387 * is bogus, but non-null if allocation succeeded:
389 p = dma_alloc_attrs(dev->dev, size,
390 &priv->vram.paddr, GFP_KERNEL, attrs);
391 if (!p) {
392 DRM_DEV_ERROR(dev->dev, "failed to allocate VRAM\n");
393 priv->vram.paddr = 0;
394 return -ENOMEM;
397 DRM_DEV_INFO(dev->dev, "VRAM: %08x->%08x\n",
398 (uint32_t)priv->vram.paddr,
399 (uint32_t)(priv->vram.paddr + size));
402 return ret;
405 static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
407 struct platform_device *pdev = to_platform_device(dev);
408 struct drm_device *ddev;
409 struct msm_drm_private *priv;
410 struct msm_kms *kms;
411 struct msm_mdss *mdss;
412 int ret, i;
414 ddev = drm_dev_alloc(drv, dev);
415 if (IS_ERR(ddev)) {
416 DRM_DEV_ERROR(dev, "failed to allocate drm_device\n");
417 return PTR_ERR(ddev);
420 platform_set_drvdata(pdev, ddev);
422 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
423 if (!priv) {
424 ret = -ENOMEM;
425 goto err_put_drm_dev;
428 ddev->dev_private = priv;
429 priv->dev = ddev;
431 switch (get_mdp_ver(pdev)) {
432 case KMS_MDP5:
433 ret = mdp5_mdss_init(ddev);
434 break;
435 case KMS_DPU:
436 ret = dpu_mdss_init(ddev);
437 break;
438 default:
439 ret = 0;
440 break;
442 if (ret)
443 goto err_free_priv;
445 mdss = priv->mdss;
447 priv->wq = alloc_ordered_workqueue("msm", 0);
449 INIT_LIST_HEAD(&priv->inactive_willneed);
450 INIT_LIST_HEAD(&priv->inactive_dontneed);
451 mutex_init(&priv->mm_lock);
453 /* Teach lockdep about lock ordering wrt. shrinker: */
454 fs_reclaim_acquire(GFP_KERNEL);
455 might_lock(&priv->mm_lock);
456 fs_reclaim_release(GFP_KERNEL);
458 drm_mode_config_init(ddev);
460 ret = msm_init_vram(ddev);
461 if (ret)
462 goto err_destroy_mdss;
464 /* Bind all our sub-components: */
465 ret = component_bind_all(dev, ddev);
466 if (ret)
467 goto err_destroy_mdss;
469 dma_set_max_seg_size(dev, UINT_MAX);
471 msm_gem_shrinker_init(ddev);
473 switch (get_mdp_ver(pdev)) {
474 case KMS_MDP4:
475 kms = mdp4_kms_init(ddev);
476 priv->kms = kms;
477 break;
478 case KMS_MDP5:
479 kms = mdp5_kms_init(ddev);
480 break;
481 case KMS_DPU:
482 kms = dpu_kms_init(ddev);
483 priv->kms = kms;
484 break;
485 default:
486 /* valid only for the dummy headless case, where of_node=NULL */
487 WARN_ON(dev->of_node);
488 kms = NULL;
489 break;
492 if (IS_ERR(kms)) {
493 DRM_DEV_ERROR(dev, "failed to load kms\n");
494 ret = PTR_ERR(kms);
495 priv->kms = NULL;
496 goto err_msm_uninit;
499 /* Enable normalization of plane zpos */
500 ddev->mode_config.normalize_zpos = true;
502 if (kms) {
503 kms->dev = ddev;
504 ret = kms->funcs->hw_init(kms);
505 if (ret) {
506 DRM_DEV_ERROR(dev, "kms hw init failed: %d\n", ret);
507 goto err_msm_uninit;
511 ddev->mode_config.funcs = &mode_config_funcs;
512 ddev->mode_config.helper_private = &mode_config_helper_funcs;
514 for (i = 0; i < priv->num_crtcs; i++) {
515 /* initialize event thread */
516 priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
517 priv->event_thread[i].dev = ddev;
518 priv->event_thread[i].worker = kthread_create_worker(0,
519 "crtc_event:%d", priv->event_thread[i].crtc_id);
520 if (IS_ERR(priv->event_thread[i].worker)) {
521 DRM_DEV_ERROR(dev, "failed to create crtc_event kthread\n");
522 goto err_msm_uninit;
525 sched_set_fifo(priv->event_thread[i].worker->task);
528 ret = drm_vblank_init(ddev, priv->num_crtcs);
529 if (ret < 0) {
530 DRM_DEV_ERROR(dev, "failed to initialize vblank\n");
531 goto err_msm_uninit;
534 if (kms) {
535 pm_runtime_get_sync(dev);
536 ret = drm_irq_install(ddev, kms->irq);
537 pm_runtime_put_sync(dev);
538 if (ret < 0) {
539 DRM_DEV_ERROR(dev, "failed to install IRQ handler\n");
540 goto err_msm_uninit;
544 ret = drm_dev_register(ddev, 0);
545 if (ret)
546 goto err_msm_uninit;
548 drm_mode_config_reset(ddev);
550 #ifdef CONFIG_DRM_FBDEV_EMULATION
551 if (kms && fbdev)
552 priv->fbdev = msm_fbdev_init(ddev);
553 #endif
555 ret = msm_debugfs_late_init(ddev);
556 if (ret)
557 goto err_msm_uninit;
559 drm_kms_helper_poll_init(ddev);
561 return 0;
563 err_msm_uninit:
564 msm_drm_uninit(dev);
565 return ret;
566 err_destroy_mdss:
567 if (mdss && mdss->funcs)
568 mdss->funcs->destroy(ddev);
569 err_free_priv:
570 kfree(priv);
571 err_put_drm_dev:
572 drm_dev_put(ddev);
573 return ret;
577 * DRM operations:
580 static void load_gpu(struct drm_device *dev)
582 static DEFINE_MUTEX(init_lock);
583 struct msm_drm_private *priv = dev->dev_private;
585 mutex_lock(&init_lock);
587 if (!priv->gpu)
588 priv->gpu = adreno_load_gpu(dev);
590 mutex_unlock(&init_lock);
593 static int context_init(struct drm_device *dev, struct drm_file *file)
595 struct msm_drm_private *priv = dev->dev_private;
596 struct msm_file_private *ctx;
598 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
599 if (!ctx)
600 return -ENOMEM;
602 kref_init(&ctx->ref);
603 msm_submitqueue_init(dev, ctx);
605 ctx->aspace = msm_gpu_create_private_address_space(priv->gpu, current);
606 file->driver_priv = ctx;
608 return 0;
611 static int msm_open(struct drm_device *dev, struct drm_file *file)
613 /* For now, load gpu on open.. to avoid the requirement of having
614 * firmware in the initrd.
616 load_gpu(dev);
618 return context_init(dev, file);
621 static void context_close(struct msm_file_private *ctx)
623 msm_submitqueue_close(ctx);
624 msm_file_private_put(ctx);
627 static void msm_postclose(struct drm_device *dev, struct drm_file *file)
629 struct msm_drm_private *priv = dev->dev_private;
630 struct msm_file_private *ctx = file->driver_priv;
632 mutex_lock(&dev->struct_mutex);
633 if (ctx == priv->lastctx)
634 priv->lastctx = NULL;
635 mutex_unlock(&dev->struct_mutex);
637 context_close(ctx);
640 static irqreturn_t msm_irq(int irq, void *arg)
642 struct drm_device *dev = arg;
643 struct msm_drm_private *priv = dev->dev_private;
644 struct msm_kms *kms = priv->kms;
645 BUG_ON(!kms);
646 return kms->funcs->irq(kms);
649 static void msm_irq_preinstall(struct drm_device *dev)
651 struct msm_drm_private *priv = dev->dev_private;
652 struct msm_kms *kms = priv->kms;
653 BUG_ON(!kms);
654 kms->funcs->irq_preinstall(kms);
657 static int msm_irq_postinstall(struct drm_device *dev)
659 struct msm_drm_private *priv = dev->dev_private;
660 struct msm_kms *kms = priv->kms;
661 BUG_ON(!kms);
663 if (kms->funcs->irq_postinstall)
664 return kms->funcs->irq_postinstall(kms);
666 return 0;
669 static void msm_irq_uninstall(struct drm_device *dev)
671 struct msm_drm_private *priv = dev->dev_private;
672 struct msm_kms *kms = priv->kms;
673 BUG_ON(!kms);
674 kms->funcs->irq_uninstall(kms);
677 int msm_crtc_enable_vblank(struct drm_crtc *crtc)
679 struct drm_device *dev = crtc->dev;
680 unsigned int pipe = crtc->index;
681 struct msm_drm_private *priv = dev->dev_private;
682 struct msm_kms *kms = priv->kms;
683 if (!kms)
684 return -ENXIO;
685 DBG("dev=%p, crtc=%u", dev, pipe);
686 return vblank_ctrl_queue_work(priv, pipe, true);
689 void msm_crtc_disable_vblank(struct drm_crtc *crtc)
691 struct drm_device *dev = crtc->dev;
692 unsigned int pipe = crtc->index;
693 struct msm_drm_private *priv = dev->dev_private;
694 struct msm_kms *kms = priv->kms;
695 if (!kms)
696 return;
697 DBG("dev=%p, crtc=%u", dev, pipe);
698 vblank_ctrl_queue_work(priv, pipe, false);
702 * DRM ioctls:
705 static int msm_ioctl_get_param(struct drm_device *dev, void *data,
706 struct drm_file *file)
708 struct msm_drm_private *priv = dev->dev_private;
709 struct drm_msm_param *args = data;
710 struct msm_gpu *gpu;
712 /* for now, we just have 3d pipe.. eventually this would need to
713 * be more clever to dispatch to appropriate gpu module:
715 if (args->pipe != MSM_PIPE_3D0)
716 return -EINVAL;
718 gpu = priv->gpu;
720 if (!gpu)
721 return -ENXIO;
723 return gpu->funcs->get_param(gpu, args->param, &args->value);
726 static int msm_ioctl_gem_new(struct drm_device *dev, void *data,
727 struct drm_file *file)
729 struct drm_msm_gem_new *args = data;
731 if (args->flags & ~MSM_BO_FLAGS) {
732 DRM_ERROR("invalid flags: %08x\n", args->flags);
733 return -EINVAL;
736 return msm_gem_new_handle(dev, file, args->size,
737 args->flags, &args->handle, NULL);
740 static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
742 return ktime_set(timeout.tv_sec, timeout.tv_nsec);
745 static int msm_ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
746 struct drm_file *file)
748 struct drm_msm_gem_cpu_prep *args = data;
749 struct drm_gem_object *obj;
750 ktime_t timeout = to_ktime(args->timeout);
751 int ret;
753 if (args->op & ~MSM_PREP_FLAGS) {
754 DRM_ERROR("invalid op: %08x\n", args->op);
755 return -EINVAL;
758 obj = drm_gem_object_lookup(file, args->handle);
759 if (!obj)
760 return -ENOENT;
762 ret = msm_gem_cpu_prep(obj, args->op, &timeout);
764 drm_gem_object_put(obj);
766 return ret;
769 static int msm_ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
770 struct drm_file *file)
772 struct drm_msm_gem_cpu_fini *args = data;
773 struct drm_gem_object *obj;
774 int ret;
776 obj = drm_gem_object_lookup(file, args->handle);
777 if (!obj)
778 return -ENOENT;
780 ret = msm_gem_cpu_fini(obj);
782 drm_gem_object_put(obj);
784 return ret;
787 static int msm_ioctl_gem_info_iova(struct drm_device *dev,
788 struct drm_file *file, struct drm_gem_object *obj,
789 uint64_t *iova)
791 struct msm_file_private *ctx = file->driver_priv;
793 if (!ctx->aspace)
794 return -EINVAL;
797 * Don't pin the memory here - just get an address so that userspace can
798 * be productive
800 return msm_gem_get_iova(obj, ctx->aspace, iova);
803 static int msm_ioctl_gem_info(struct drm_device *dev, void *data,
804 struct drm_file *file)
806 struct drm_msm_gem_info *args = data;
807 struct drm_gem_object *obj;
808 struct msm_gem_object *msm_obj;
809 int i, ret = 0;
811 if (args->pad)
812 return -EINVAL;
814 switch (args->info) {
815 case MSM_INFO_GET_OFFSET:
816 case MSM_INFO_GET_IOVA:
817 /* value returned as immediate, not pointer, so len==0: */
818 if (args->len)
819 return -EINVAL;
820 break;
821 case MSM_INFO_SET_NAME:
822 case MSM_INFO_GET_NAME:
823 break;
824 default:
825 return -EINVAL;
828 obj = drm_gem_object_lookup(file, args->handle);
829 if (!obj)
830 return -ENOENT;
832 msm_obj = to_msm_bo(obj);
834 switch (args->info) {
835 case MSM_INFO_GET_OFFSET:
836 args->value = msm_gem_mmap_offset(obj);
837 break;
838 case MSM_INFO_GET_IOVA:
839 ret = msm_ioctl_gem_info_iova(dev, file, obj, &args->value);
840 break;
841 case MSM_INFO_SET_NAME:
842 /* length check should leave room for terminating null: */
843 if (args->len >= sizeof(msm_obj->name)) {
844 ret = -EINVAL;
845 break;
847 if (copy_from_user(msm_obj->name, u64_to_user_ptr(args->value),
848 args->len)) {
849 msm_obj->name[0] = '\0';
850 ret = -EFAULT;
851 break;
853 msm_obj->name[args->len] = '\0';
854 for (i = 0; i < args->len; i++) {
855 if (!isprint(msm_obj->name[i])) {
856 msm_obj->name[i] = '\0';
857 break;
860 break;
861 case MSM_INFO_GET_NAME:
862 if (args->value && (args->len < strlen(msm_obj->name))) {
863 ret = -EINVAL;
864 break;
866 args->len = strlen(msm_obj->name);
867 if (args->value) {
868 if (copy_to_user(u64_to_user_ptr(args->value),
869 msm_obj->name, args->len))
870 ret = -EFAULT;
872 break;
875 drm_gem_object_put(obj);
877 return ret;
880 static int msm_ioctl_wait_fence(struct drm_device *dev, void *data,
881 struct drm_file *file)
883 struct msm_drm_private *priv = dev->dev_private;
884 struct drm_msm_wait_fence *args = data;
885 ktime_t timeout = to_ktime(args->timeout);
886 struct msm_gpu_submitqueue *queue;
887 struct msm_gpu *gpu = priv->gpu;
888 int ret;
890 if (args->pad) {
891 DRM_ERROR("invalid pad: %08x\n", args->pad);
892 return -EINVAL;
895 if (!gpu)
896 return 0;
898 queue = msm_submitqueue_get(file->driver_priv, args->queueid);
899 if (!queue)
900 return -ENOENT;
902 ret = msm_wait_fence(gpu->rb[queue->prio]->fctx, args->fence, &timeout,
903 true);
905 msm_submitqueue_put(queue);
906 return ret;
909 static int msm_ioctl_gem_madvise(struct drm_device *dev, void *data,
910 struct drm_file *file)
912 struct drm_msm_gem_madvise *args = data;
913 struct drm_gem_object *obj;
914 int ret;
916 switch (args->madv) {
917 case MSM_MADV_DONTNEED:
918 case MSM_MADV_WILLNEED:
919 break;
920 default:
921 return -EINVAL;
924 obj = drm_gem_object_lookup(file, args->handle);
925 if (!obj) {
926 return -ENOENT;
929 ret = msm_gem_madvise(obj, args->madv);
930 if (ret >= 0) {
931 args->retained = ret;
932 ret = 0;
935 drm_gem_object_put(obj);
937 return ret;
941 static int msm_ioctl_submitqueue_new(struct drm_device *dev, void *data,
942 struct drm_file *file)
944 struct drm_msm_submitqueue *args = data;
946 if (args->flags & ~MSM_SUBMITQUEUE_FLAGS)
947 return -EINVAL;
949 return msm_submitqueue_create(dev, file->driver_priv, args->prio,
950 args->flags, &args->id);
953 static int msm_ioctl_submitqueue_query(struct drm_device *dev, void *data,
954 struct drm_file *file)
956 return msm_submitqueue_query(dev, file->driver_priv, data);
959 static int msm_ioctl_submitqueue_close(struct drm_device *dev, void *data,
960 struct drm_file *file)
962 u32 id = *(u32 *) data;
964 return msm_submitqueue_remove(file->driver_priv, id);
967 static const struct drm_ioctl_desc msm_ioctls[] = {
968 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_RENDER_ALLOW),
969 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_RENDER_ALLOW),
970 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_RENDER_ALLOW),
971 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_RENDER_ALLOW),
972 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_RENDER_ALLOW),
973 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_RENDER_ALLOW),
974 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_RENDER_ALLOW),
975 DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_RENDER_ALLOW),
976 DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_NEW, msm_ioctl_submitqueue_new, DRM_RENDER_ALLOW),
977 DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLOSE, msm_ioctl_submitqueue_close, DRM_RENDER_ALLOW),
978 DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_QUERY, msm_ioctl_submitqueue_query, DRM_RENDER_ALLOW),
981 static const struct file_operations fops = {
982 .owner = THIS_MODULE,
983 .open = drm_open,
984 .release = drm_release,
985 .unlocked_ioctl = drm_ioctl,
986 .compat_ioctl = drm_compat_ioctl,
987 .poll = drm_poll,
988 .read = drm_read,
989 .llseek = no_llseek,
990 .mmap = msm_gem_mmap,
993 static const struct drm_driver msm_driver = {
994 .driver_features = DRIVER_GEM |
995 DRIVER_RENDER |
996 DRIVER_ATOMIC |
997 DRIVER_MODESET |
998 DRIVER_SYNCOBJ,
999 .open = msm_open,
1000 .postclose = msm_postclose,
1001 .lastclose = drm_fb_helper_lastclose,
1002 .irq_handler = msm_irq,
1003 .irq_preinstall = msm_irq_preinstall,
1004 .irq_postinstall = msm_irq_postinstall,
1005 .irq_uninstall = msm_irq_uninstall,
1006 .dumb_create = msm_gem_dumb_create,
1007 .dumb_map_offset = msm_gem_dumb_map_offset,
1008 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1009 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1010 .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
1011 .gem_prime_mmap = msm_gem_prime_mmap,
1012 #ifdef CONFIG_DEBUG_FS
1013 .debugfs_init = msm_debugfs_init,
1014 #endif
1015 .ioctls = msm_ioctls,
1016 .num_ioctls = ARRAY_SIZE(msm_ioctls),
1017 .fops = &fops,
1018 .name = "msm",
1019 .desc = "MSM Snapdragon DRM",
1020 .date = "20130625",
1021 .major = MSM_VERSION_MAJOR,
1022 .minor = MSM_VERSION_MINOR,
1023 .patchlevel = MSM_VERSION_PATCHLEVEL,
1026 static int __maybe_unused msm_runtime_suspend(struct device *dev)
1028 struct drm_device *ddev = dev_get_drvdata(dev);
1029 struct msm_drm_private *priv = ddev->dev_private;
1030 struct msm_mdss *mdss = priv->mdss;
1032 DBG("");
1034 if (mdss && mdss->funcs)
1035 return mdss->funcs->disable(mdss);
1037 return 0;
1040 static int __maybe_unused msm_runtime_resume(struct device *dev)
1042 struct drm_device *ddev = dev_get_drvdata(dev);
1043 struct msm_drm_private *priv = ddev->dev_private;
1044 struct msm_mdss *mdss = priv->mdss;
1046 DBG("");
1048 if (mdss && mdss->funcs)
1049 return mdss->funcs->enable(mdss);
1051 return 0;
1054 static int __maybe_unused msm_pm_suspend(struct device *dev)
1057 if (pm_runtime_suspended(dev))
1058 return 0;
1060 return msm_runtime_suspend(dev);
1063 static int __maybe_unused msm_pm_resume(struct device *dev)
1065 if (pm_runtime_suspended(dev))
1066 return 0;
1068 return msm_runtime_resume(dev);
1071 static int __maybe_unused msm_pm_prepare(struct device *dev)
1073 struct drm_device *ddev = dev_get_drvdata(dev);
1075 return drm_mode_config_helper_suspend(ddev);
1078 static void __maybe_unused msm_pm_complete(struct device *dev)
1080 struct drm_device *ddev = dev_get_drvdata(dev);
1082 drm_mode_config_helper_resume(ddev);
1085 static const struct dev_pm_ops msm_pm_ops = {
1086 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
1087 SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
1088 .prepare = msm_pm_prepare,
1089 .complete = msm_pm_complete,
1093 * Componentized driver support:
1097 * NOTE: duplication of the same code as exynos or imx (or probably any other).
1098 * so probably some room for some helpers
1100 static int compare_of(struct device *dev, void *data)
1102 return dev->of_node == data;
1106 * Identify what components need to be added by parsing what remote-endpoints
1107 * our MDP output ports are connected to. In the case of LVDS on MDP4, there
1108 * is no external component that we need to add since LVDS is within MDP4
1109 * itself.
1111 static int add_components_mdp(struct device *mdp_dev,
1112 struct component_match **matchptr)
1114 struct device_node *np = mdp_dev->of_node;
1115 struct device_node *ep_node;
1116 struct device *master_dev;
1119 * on MDP4 based platforms, the MDP platform device is the component
1120 * master that adds other display interface components to itself.
1122 * on MDP5 based platforms, the MDSS platform device is the component
1123 * master that adds MDP5 and other display interface components to
1124 * itself.
1126 if (of_device_is_compatible(np, "qcom,mdp4"))
1127 master_dev = mdp_dev;
1128 else
1129 master_dev = mdp_dev->parent;
1131 for_each_endpoint_of_node(np, ep_node) {
1132 struct device_node *intf;
1133 struct of_endpoint ep;
1134 int ret;
1136 ret = of_graph_parse_endpoint(ep_node, &ep);
1137 if (ret) {
1138 DRM_DEV_ERROR(mdp_dev, "unable to parse port endpoint\n");
1139 of_node_put(ep_node);
1140 return ret;
1144 * The LCDC/LVDS port on MDP4 is a speacial case where the
1145 * remote-endpoint isn't a component that we need to add
1147 if (of_device_is_compatible(np, "qcom,mdp4") &&
1148 ep.port == 0)
1149 continue;
1152 * It's okay if some of the ports don't have a remote endpoint
1153 * specified. It just means that the port isn't connected to
1154 * any external interface.
1156 intf = of_graph_get_remote_port_parent(ep_node);
1157 if (!intf)
1158 continue;
1160 if (of_device_is_available(intf))
1161 drm_of_component_match_add(master_dev, matchptr,
1162 compare_of, intf);
1164 of_node_put(intf);
1167 return 0;
1170 static int compare_name_mdp(struct device *dev, void *data)
1172 return (strstr(dev_name(dev), "mdp") != NULL);
1175 static int add_display_components(struct device *dev,
1176 struct component_match **matchptr)
1178 struct device *mdp_dev;
1179 int ret;
1182 * MDP5/DPU based devices don't have a flat hierarchy. There is a top
1183 * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc.
1184 * Populate the children devices, find the MDP5/DPU node, and then add
1185 * the interfaces to our components list.
1187 if (of_device_is_compatible(dev->of_node, "qcom,mdss") ||
1188 of_device_is_compatible(dev->of_node, "qcom,sdm845-mdss") ||
1189 of_device_is_compatible(dev->of_node, "qcom,sc7180-mdss")) {
1190 ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
1191 if (ret) {
1192 DRM_DEV_ERROR(dev, "failed to populate children devices\n");
1193 return ret;
1196 mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
1197 if (!mdp_dev) {
1198 DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
1199 of_platform_depopulate(dev);
1200 return -ENODEV;
1203 put_device(mdp_dev);
1205 /* add the MDP component itself */
1206 drm_of_component_match_add(dev, matchptr, compare_of,
1207 mdp_dev->of_node);
1208 } else {
1209 /* MDP4 */
1210 mdp_dev = dev;
1213 ret = add_components_mdp(mdp_dev, matchptr);
1214 if (ret)
1215 of_platform_depopulate(dev);
1217 return ret;
1221 * We don't know what's the best binding to link the gpu with the drm device.
1222 * Fow now, we just hunt for all the possible gpus that we support, and add them
1223 * as components.
1225 static const struct of_device_id msm_gpu_match[] = {
1226 { .compatible = "qcom,adreno" },
1227 { .compatible = "qcom,adreno-3xx" },
1228 { .compatible = "amd,imageon" },
1229 { .compatible = "qcom,kgsl-3d0" },
1230 { },
1233 static int add_gpu_components(struct device *dev,
1234 struct component_match **matchptr)
1236 struct device_node *np;
1238 np = of_find_matching_node(NULL, msm_gpu_match);
1239 if (!np)
1240 return 0;
1242 if (of_device_is_available(np))
1243 drm_of_component_match_add(dev, matchptr, compare_of, np);
1245 of_node_put(np);
1247 return 0;
1250 static int msm_drm_bind(struct device *dev)
1252 return msm_drm_init(dev, &msm_driver);
1255 static void msm_drm_unbind(struct device *dev)
1257 msm_drm_uninit(dev);
1260 static const struct component_master_ops msm_drm_ops = {
1261 .bind = msm_drm_bind,
1262 .unbind = msm_drm_unbind,
1266 * Platform driver:
1269 static int msm_pdev_probe(struct platform_device *pdev)
1271 struct component_match *match = NULL;
1272 int ret;
1274 if (get_mdp_ver(pdev)) {
1275 ret = add_display_components(&pdev->dev, &match);
1276 if (ret)
1277 return ret;
1280 ret = add_gpu_components(&pdev->dev, &match);
1281 if (ret)
1282 goto fail;
1284 /* on all devices that I am aware of, iommu's which can map
1285 * any address the cpu can see are used:
1287 ret = dma_set_mask_and_coherent(&pdev->dev, ~0);
1288 if (ret)
1289 goto fail;
1291 ret = component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
1292 if (ret)
1293 goto fail;
1295 return 0;
1297 fail:
1298 of_platform_depopulate(&pdev->dev);
1299 return ret;
1302 static int msm_pdev_remove(struct platform_device *pdev)
1304 component_master_del(&pdev->dev, &msm_drm_ops);
1305 of_platform_depopulate(&pdev->dev);
1307 return 0;
1310 static void msm_pdev_shutdown(struct platform_device *pdev)
1312 struct drm_device *drm = platform_get_drvdata(pdev);
1314 drm_atomic_helper_shutdown(drm);
1317 static const struct of_device_id dt_match[] = {
1318 { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
1319 { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
1320 { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
1321 { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
1324 MODULE_DEVICE_TABLE(of, dt_match);
1326 static struct platform_driver msm_platform_driver = {
1327 .probe = msm_pdev_probe,
1328 .remove = msm_pdev_remove,
1329 .shutdown = msm_pdev_shutdown,
1330 .driver = {
1331 .name = "msm",
1332 .of_match_table = dt_match,
1333 .pm = &msm_pm_ops,
1337 static int __init msm_drm_register(void)
1339 if (!modeset)
1340 return -EINVAL;
1342 DBG("init");
1343 msm_mdp_register();
1344 msm_dpu_register();
1345 msm_dsi_register();
1346 msm_edp_register();
1347 msm_hdmi_register();
1348 msm_dp_register();
1349 adreno_register();
1350 return platform_driver_register(&msm_platform_driver);
1353 static void __exit msm_drm_unregister(void)
1355 DBG("fini");
1356 platform_driver_unregister(&msm_platform_driver);
1357 msm_dp_unregister();
1358 msm_hdmi_unregister();
1359 adreno_unregister();
1360 msm_edp_unregister();
1361 msm_dsi_unregister();
1362 msm_mdp_unregister();
1363 msm_dpu_unregister();
1366 module_init(msm_drm_register);
1367 module_exit(msm_drm_unregister);
1369 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
1370 MODULE_DESCRIPTION("MSM DRM Driver");
1371 MODULE_LICENSE("GPL");